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lect7LC
lect7LC
lect7LC
Lecture 7.
Energy Storage Elements
Copyright Statement: The materials provided by the instructor in this course are for the use of the students enrolled in the
course. Copyrighted course materials may not be further disseminated.
Outline
§ Goals
• Learn capacitor and inductor basics
and investigate circuits using them
§ Contents
• Capacitors
• Operation
• Energy
• Combinations
• Inductors
• Operation
• Energy
• Combinations
• Switched circuits
• Integrator (op amp + capacitor)
𝑑
0.5𝑑
𝑄 𝜀𝐴
𝐶= =
𝑄 2𝑄 𝑉 𝑑
𝜖 2𝜖
𝑄 2𝑄
𝑞(𝑡)
𝐶=
𝑣(𝑡)
𝑑𝑞 𝑡 Looks like conductance!
𝑖 𝑡 =
𝑑𝑡
𝑑 Initial voltage
𝑖 𝑡 =𝐶 𝑣 𝑡
𝑑𝑡
1 # 1 # 1 #! 1 #
𝑣 𝑡 = 7 𝑖 𝜏 𝑑𝜏 = 7 𝑖(𝜏) 𝑑𝜏 + 7 𝑖(𝜏) 𝑑𝜏 = 7 𝑖(𝜏) 𝑑𝜏 + 𝑣(𝑡$ )
𝐶 !" 𝐶 #! 𝐶 !" 𝐶 #!
𝑖'( 𝑡 𝑣%&# 𝑡
3A 3V
The voltage increases linearly as charge is flowing into the capacitor due to the constant current
Time-Varying Voltage to Capacitor
𝑑𝑣'( 𝑡
𝑖𝑡 𝑖𝑡 𝑖 𝑡 =𝐶
𝑑𝑡
+
𝑣!" 𝑡 + 𝟑𝐅 𝑣#$% 𝑡
−
− slope of 𝑣'( 𝑡
at time 𝑡
𝑣'( 𝑡 𝑖𝑡
𝟏𝟐 𝐕 𝟑𝟔 𝐀
1s 𝑡 1s 𝑡
The linearly varying voltage source has a constant derivative – thus the current into the capacitor is a constant
Examples – Time-Varying Source
𝐶 = 1𝑚𝐹 𝐶 = 0.5𝐹, 𝑣 0 = 0
𝐼 𝐼) 𝐼 𝐼)
+ + +
𝑉 − 𝐶 𝑉) 𝐼 𝐶 𝑉)
− −
𝑤+ = 7 𝑣(𝜏)𝑖(𝜏) 𝑑𝜏
!"
𝑑𝑣 Wait a second.
𝑖=𝐶
𝑑𝑡 Isn’t this right for DC?
# ,(#)
𝑑𝑣 1 * ,(#)
𝑤+ = 7 𝑣𝐶 𝑑𝜏 = 𝐶 7 𝑣 𝑑𝑣 = 𝐶𝑣 J 𝑊 = 𝑄𝑉
𝑑𝜏 2 ,(!")
!" ,(!") 𝑄 = 𝐶𝑉
𝑎𝑠𝑠𝑢𝑚𝑖𝑛𝑔 𝑣 −∞ = 0 𝑊 = 𝐶𝑉 *
1 11 *
𝑤+ = 𝐶𝑣 * = 𝑞
2 2𝐶
Always positive
Hence passive
Switch t=0
closed R R
FIGURE 7.3-1 A circuit
+ + (a) where the capacitor is cha
+ vc + vc
10 V C 10 V C
–
– –
– and vc ¼ 10 V and (b) the sw
is opened at t ¼ 0.
𝑖=0 𝑣/ = 10
𝑣/ = 10 − 𝑖𝑅 = 10
𝑄/ = 10𝐶
Series and Parallel Capacitor FIGURE 7.4-2 Equivalent circuit for N parallel
7.4 S e r i e s a n d P a r a l l e l C a p a c i t o r s
capacitors.
i
+
v1 v2
– +
v3
– + –
For the e
7.4 S e r i e s a n d P a rFirst,
a l l let
e l usCconsider
a p a cCthe
i1t oparallel
r2s Cconnection
C 3 of N capacitors
+ as sho
v + CN vN
i1 i2 iN
Figure 7.4-1. –Wei wish v1 to vdetermine
2 v3 the equivalent–
For for
circuit the
+ First, let us consider the
+ parallel
– + – connection
+ – of N capacitors Compari
as show
i C1
i1
C2
i2
CN
iN
v parallel capacitors as shown in Figure 7.4-2.
– Figure Using
7.4-1. KCL,
We wishwe to determine the equivalent circuit for t
have
+ FIGURE C
7.4-31 Series C3
C2 connection of +
i C1 C2 CN v parallel capacitors
v –+ as shown in Figure 7.4-2. CN v
– N capacitors. i ¼ i1 þ i2 þ i3 þ & & & þ iN – N
FIGURE 7.4-1 Parallel connection of Using KCL, we have Compa
N capacitors.
Because i ¼ i1 þ iin2 ¼ þC i3 nþdv& & & þ iN Thus, th
FIGURE 7.4-1 Parallel connection of FIGURE 7.4-3 Series connection of
dt simply th
N capacitors. N capacitors. i
dv
Because in ¼ C n the paral
and v appears across each capacitor, dt we obtain
+ + Thus,Not
and v appears across eachdv dv
v – capacitor,
+ dv
weCobtain dv series-co
i Cp
–
v i ¼ C1 þ C 2 þ Cv3– þ s&&& þ C
N simply
+ dt dt i dt dt circuit
the parafo
i Cp v
dv dv dv dv dv
–
i ¼¼ CðC 1 1 þþCC þ C & þþC& N& &Þ þ CN
2 2þdtC 3 þ 3& &dt
UsN
FIGURE 7.4-2 Equivalent circuit for N parallel dt
FIGURE 7.4-4 ! Equivalent circuit
+ for N dt dt ð
v – + dv series-c
C 3 þ & & v& –þ CCNsÞ
N
capacitors. series CX
¼ ðcapacitors.
1 þ C2 þ dv
§ 𝑖 FIGURE
= 𝑖! + ⋯7.4-2+ 𝑖" , Equivalent
𝑣 = 𝑣! = ⋯ circuit
= 𝑣"for N parallel § 𝑣 =¼𝑣! +N⋯ + Cn!𝑣" ,dt 𝑖 = 𝑖! = ⋯ = 𝑖" dt circuitð7
X U
1dv
capacitors. n¼1
𝑑𝑣#
𝑖# = 𝐶# ¼
FIGURE𝑣#7.4-4C = Equivalent
n . 𝑖# 𝑑𝑡 circuit for N
v v 𝑑𝑡 v For the equivalentn¼1circuit 𝐶 dt shown
series capacitors.#
in Figure 7.4-2,
i 1 2
𝑑𝑣 3
+ – + – + –
𝑖 = (𝐶! + ⋯ + 𝐶" ) 1
For the equivalent 𝑣circuit 1 dv 7.4-2,
i v1 v2 v3 𝑑𝑡 = shown ¼inCFigure
+ ⋯i + p . 𝑖 𝑑𝑡 ð
+ C1– + C2– "+ C3– + 𝐶! 𝐶" dt !
v +– 𝐶$ = , 𝐶# CN vN dv
#%! – i ¼ C p'! ð7
C1 C2 C 3 + Comparing Eqs. 7.4-1 and 7.4-2,
" it is clear that
'! dt
v +– CN vN 𝐶& = , 𝐶#
– N
FIGURE 7.4-3 Series connection of Comparing Eqs. 7.4-1 and 7.4-2, it is clear that X
#%!
Cp ¼ C1 þ C2 þ C3 þ & & & þ CN ¼ Cn
N capacitors. XN
Spring 2024 7.4-3 Series connection of
FIGURE Intro. Circ. Theory and Lab., Lect 7 n¼1 14
Cp ¼ C1 þ C2 þ C3 þ & & & þ CN ¼ Cn
Capacitors in Series and Parallel
01
Parallel plate example - 𝐶 = 2
Series combination
A
Parallel combination
d
A
A A A d
d
A
d
films
• Imagine a flat sheet of insulating film with a
conductor deposited on each side, rolled up
into a tight tube
Big capacitors
Tiny capacitors
MLCC [passive-component.eu]
vð t Þ ¼ L
d
i ðt Þ
Inductors
ð7:5-1Þ
dt i(t)
FIGURE 7.5-1 An inductor connected to a current
where the constant of proportionality is L, the inductance ofSymbol
the for inductor: L
source.
inductor.
Integrating both sides of Eq. 7.5-1, we obtain
iL Z t Unit of inductance: Henry (H)
1
iðt Þ ¼ vðtÞdt ð7:5-2Þ
L $1 1 H = 1 Wb/A = 1 W⋅s
This equation says that the inductor current i(t) can be found by
integrating the inductor voltage from time $1 until time t. To do
Opposes a change in current
so requires that we know the value of the inductor voltage from
via the establishment and
time t ¼ $1 until time t ¼ t. Often, we don’t know the value of
the voltage all the way back to t ¼ $1. Instead, we break collapse
the of the magnetic field
integral up into two parts:
Z Z Z L/R units =Courtesy
(W⋅s)/(W)
of Vishay TIME
àIntertechnology, Inc.
1 t0 1 t 1 t
iðt Þ ¼ vðtÞdt þ vðtÞdt ¼ iðt 0 Þ þ vðtÞdt FIGURE 7.5-2 Elements with inductances arranged
L $1 L t0 L t0
various forms of coils.
§ Any structures that can flow current have inductance
ð7:5-3Þ
Inductance
§This equation says is
thatdependent on the
the inductor current geometry
i(t) can be found by i
integrating the inductor voltage from some convenient time t ¼ t 0
+
until time t ¼ t, provided that we also know the inductor current at
time t0. Now we are required to know only the inductor voltage from v L
time t ¼ t 0 until time t ¼ t. The time t0 is called the initial time, and –
the inductor current i(t0) is called the initial condition. Frequently,
it is convenient to select t 0 ¼ 0 as the initial time. FIGURE 7.5-3 Circuit symbol for an inductor.
Equations 7.5-1 and 7.5-3 describe
Spring 2024 the current–voltage
Intro. Circ. Theory and Lab., Lect 7 21
Inductance of a Solenoid
𝜇𝑁 * 𝐴
𝐿=
𝑙
𝜇: permeability [H/m]
Material dependent coefficient
(e.g. in vacuum, 𝜇$ = 4𝜋×10!5 )
𝑁: number of turns [ ]
𝐴: area [m2]
𝑙: length [m]
−12 V
Negative voltage is possible!
Abrupt current change would create infinite voltage!
Spring 2024 Intro. Circ. Theory and Lab., Lect 7 23
Time-Varying Voltage to Inductor
1 #
𝑖𝑡 𝑖𝑡 𝑖 𝑡 = 7 𝑣 𝜏 𝑑𝜏
𝐿 !"
+ 1 #
𝑣'( 𝑡 + 2H 𝑣%&# 𝑡 = 7 𝑣(𝜏) 𝑑𝜏 + 𝑖 𝑡$
− 𝐿 #!
−
! 6 #
𝑖 𝑡$ = ∫!" 𝑣(𝜏) 𝑑𝜏 : initial current
7
𝑣'( 𝑡 𝑖𝑡
6V 9A
6A
3A
0 1 2 3 𝑡 0 1 2 3 𝑡
𝐼 𝐼7 𝐼 𝐼7
+ +
𝑉 +
𝐿 𝑉7 𝐼 𝐿 𝑉7
−
− −
EXERCISE
Try7.5-1 Determine the voltage v(t) for t > 0 for the circuit of Figure E 7.5-1b when is(t)
it
is the currentyourself Example – R and
EXAMPLE 7.5-3
shown in Figure E 7.5-1a.
in WileyPLUS
L Current and Voltage
Inductor
is(t)(V)
5 The input to the circuit shown in Figure
1H 7.5-81 is
Ω the voltage
L
4 iL(t) $20t
vðt Þ +¼ v4e
L(t) –
V + for
vR(t)t >
– 0
3
The output is the current
R2 + v(t) –
i(t) iðt Þ ¼ $1:2e$20t $ 1:5 A for t > 0
1
– The initial inductor current is iL ð0Þ ¼ $3:5
is(t)
A. Determine the values of
+
𝑤; = 7 𝑣(𝜏)𝑖(𝜏) 𝑑𝜏
!"
𝑑𝑖
𝑣=𝐿
𝑑𝑡
# '(#)
𝑑𝑖 1 * '(#)
𝑤; = 7 𝐿𝑖 𝑑𝜏 = 𝐿 7 𝑖 𝑑𝑖 = 𝐿𝑖 J
𝑑𝜏 2 '(!")
!" '(!")
𝑎𝑠𝑠𝑢𝑚𝑖𝑛𝑔 𝑖 −∞ = 0
1
𝑤; = 𝐿𝑖 *
2
Always positive
Hence passive
tors.di current
. The +
a i is equal
1
to the sum 2
of the currents inN the N inductors: v i L1 L2 LN
LN + v – + v – + v – +
Now,dt consider the1set of N inductors 2X N in parallel, asN shown in Figure i1 i2 iN
–
v
The current i is equal to the i ¼sum of in the currents in the N inductors: v L1 L2 LN
n¼1 FIGURE 7.7-3 Connection of N parallel
X N
–
ever, because –inductors.
b
i¼ in FIGURE 7.7-1 Series of N inductors.
e 7.7-2, is represented by1 Z atn¼1i FIGURE 7.7-3 Connection i of N parallel
ver, because in ¼ v dt þ in ðt 0 Þ inductors. +
Ln t+0 v ¼ v 1 þ v 2 þ # # # þ v N
Z t i
may obtain the expression 1 v v
in ¼ ! v dt þ in ðLts0¼ Þ L di þ L di þ # # # þ L di +
Lp
N Ln t 0Z
1 2 N
X 1 – t XN dt dt dt
! –
i¼
ay obtain the expression b v dt þ i n ðt X0 ÞN ð7:7-2Þ v Lp
L n! di FIGURE 7.7-4 Equivalent inductor Lp
ð7:7-1Þ
X
n¼1
N Z t0t X
n¼1
N ¼ L N
FIGURE 17.7-2 Equivalent inductor Ls dt for the connection
– of N parallel inductors.
equivalent inductor i ¼for L , as shown
N series inductors.
p in
v dtFigure
þ 7.7-4,
i n ð t 0
n¼1
Þ is represented by the
ð7:7-2Þ
ion
sum of § 𝑣
Because =
the N the 𝑣 + ⋯L+
% equivalent
n¼1 n 𝑣 t 0 , 𝑖 = 𝑖 n¼1= ⋯ = 𝑖
.
series % Ls, as shown
inductor . in Figure § 𝑣= 𝑣FIGURE
7.7-2, % is=represented
⋯7.7-4
= Equivalent
𝑣.by , 𝑖 =inductor
a
𝑖% i+ L⋯ p + 𝑖
.
for the connection of N parallel inductors.
quivalent inductor
i
+ Lp, as shown 𝑑𝑖/ in Figure Z
1 7.7-4,t
di is represented by the 1 +
wn in Figure /
ion 𝑣 = 𝐿i/
1 i2 i ¼ v ¼ L s v dti N þ ið t 0 Þ 𝑖 / = ∫ 𝑣 / 𝑑𝑡ð7:7-3Þ
N inductors: v
𝑑𝑡L1
LpZ t0 dt
L t LN
𝐿 / v Ls
n Eqs.we require
7.7-2 and that
7.7-3 are set equal 1
i ¼to each
2
𝑑𝑖vother,
dt þ we iðt 0 Þhave 1 1 –
ð7:7-3Þ
𝑣– = 𝐿% + ⋯ + 𝐿L.p tX 𝑖= + ⋯+ ∫ 𝑣𝑑𝑡
𝑑𝑡
0N
X
1 ofother,
Ls each
N
1 we have
LNn parallel 𝐿
ð7:7-1Þ% 𝐿.
b
Eqs. 7.7-2 and𝐿FIGURE7.7-3 .7.7-3
are set𝐿equal to ¼
0 = Σ /
Connection
¼ 𝐿2 = Σ/1% . 3% 3%
𝐿/ 7.7-2 Equivalent inductor Ls
FIGURE ð7:7-4Þ
inductors./1% Lp n¼1n¼1 Ln
N for N series inductors.
1 X 1
Thus, an equivalent inductori for a series ¼ Intro. of inductors is the sum of the N
Spring 2024 Circ. Theory and Lab., Lect 7 i ð7:7-4Þ 28
inductors. + L p n¼1
L n +
current is proportional to the derivative of the capacitor voltage i ¼ C (dv=dt), so the capacitor current is
zero. Consequently, the capacitor acts like a open circuit.
Inductor vs. Capacitor
Table 7.8-1 Characteristics of Energy Storage Elements
+ v – + v –
Z t
Voltage di 1
v¼L v¼ idt þ vð0Þ
dt C 0
Z t
Current 1 dv
i¼ vdt þ ið0Þ i¼C
L 0 dt
Power di dv
i ¼ Li p ¼ Cv
dt dt
Energy 1 1
w ¼ Li2 w ¼ Cv2
2 2
An instantaneous change is not permitted for the Current Voltage
element’s
Will permit an instantaneous change in the Voltage Current
element’s
This element acts as a (see note below) Short circuit to a constant current into its Open circuit to a constant voltage across its
terminals terminals
______________________________________________________________________________
Note: Assumes that the element is in a circuit with steady-state condition.
𝑡=0 𝑖𝑡 𝑣%&# 0! = 0
𝑖𝑡 𝑣%&# 0< = 6
𝑖 0! = 0
+
6V +
6
− 2Ω 𝑣!"# 𝑡 𝑖 0< = = 3
2
−
+ vR(t) – C iC(t)
x(t)
1 2 3
y(t)
𝑖 < = 0, 𝑖 ! = 0
R iR(t) + vC(t) – 𝑣! = 𝑣< = 0
– 𝑥 𝑡 −0 𝑑𝑣) 𝑑 −𝑦 𝑡
= 𝑖) 𝑡 = 𝐶 =𝐶
+ 𝑅 𝑑𝑡 𝑑𝑡
FIGURE 7.9-6 The integrator. #
1
𝑦 𝑡 =− 7 𝑥 𝜏 𝑑𝜏
𝑅𝐶 !"
The input to the integrator is x(t), the node voltage at node 1. Thus, v1 ¼ xðt Þ. The output of the
ntegrator is y(t), the node voltage at node 3. Thus, v3 ¼ yðt Þ. The noninverting input of the ideal
perational amplifier is attached to the reference node, and the inverting input is connected to node 2.
he node voltages at these two nodes must be equal, so v2 ¼ 0.
The voltage across the resistor is related to the node voltages at the resistor nodes by
§ (Inverting) integrator
vR ð t Þ ¼ v 1 ð t Þ $ v2 ð t Þ ¼ xð t Þ $ 0 ¼ xð t Þ
§ Can we make differentiator? Why not!
he resistor current is calculated, using Ohm’s law, to be
• Use inductor instead of capacitor à Inductors are typically bigger in size
• Swap the capacitor and resistor
vR ð t Þ xð t Þ
i R ðt Þ ¼ ¼
• But… differentiation will createR abrupt
R change in the output à not practical
he value of the current flowing into an input of an ideal operational amplifier is zero, so applying KCL
node 2 gives
Spring 2024 Intro. Circ. Theory and Lab., Lect 7 32
Multi-Input Integrator
Operational Amplifier Circuits and Linear Differential Equations 295
+ v1(t) – iC(t)
Superposition
1 3 C 4
x1(t) y(t) 1
R1 + vC(t) – 𝑦6 = − 7 𝑥6 𝑑𝑡
i1 (t) 𝑅6 𝐶
2 + v2(t) –
x2(t) 1
𝑦* = − 7 𝑥* 𝑑𝑡
–
i2(t) R2 + 𝑅* 𝐶
FIGURE 7.9-7 The summing integrator.
𝑦 = 𝑦6 + 𝑦*
age at node 2. The output of the integrator is y(t), the node voltage at node 4. The ideal operational
lifier causes the voltage at node 3 to be zero. Hence,
v1 ðt Þ ¼ x1 ðt Þ; v2 ðt Þ ¼ x2 ðt Þ; v3 ðt Þ ¼ 0; and v 4 ð t Þ ¼ yð t Þ
§ Use
ng Ohm’s law superposition
shows the currents in the resistors to be
§ Weighted sum vof twox1integrals
1 ðt Þ ðt Þ v2 ð t Þ x2 ð t Þ
i1 ðt Þ ¼ ¼ and i2 ðt Þ ¼ ¼
R1 R1 R2 R2
value of the current flowing into an input of an ideal operational amplifier is zero, so applying KCL
ode 3 gives
x1 ð t Þ x2 ð t Þ
iC ðt Þ ¼ i1 ðt Þ þ i2 ðt Þ ¼ þ
Spring 2024
R 1 R2 Lab., Lect 7
Intro. Circ. Theory and 33
d3
Now we must obtain 3 yðt Þ. To do so, solve Eq. 7.9-1
Solving Differential Equation d3
dt
!
d2 d
y ð t Þ ¼ 3x ð t Þ $ 2:5 y ð t Þ þ 2 yð
dt 3 dt 2 dt
𝑑= 𝑑* 𝑑 Next, represent Eq. 7.9-3 by a block diagram such as the diagra
2 = 𝑦 + 5 * 𝑦 + 4 𝑦 + 3𝑦 = 6𝑥 block diagrams in Figures 7.9-2 and 7.9-3 can be combined as sho
𝑑𝑡 𝑑𝑡 𝑑𝑡
2" diagram of Eq. 7.9-1.
Writing for " 𝑦 Our next task is to implement the block diagram as an ope
2#
𝑑= 𝑑* 𝑑 provides operational amplifier circuits to implement both differen
=
𝑦 = −2.5 * 𝑦 − 2 𝑦 − 1.5𝑦 + 3𝑥integrator works, consider Figure 7.9-6. The nodes of the integrat
𝑑𝑡 𝑑𝑡 𝑑𝑡 anticipation of writing node equations. Let v1, v2, and v3 denote t
ifierAssume all initial conditions
Circuits and Linear Differential are 0
Equations 293
respectively.
–1.5 y(t)
d y(t)
d3 y(t) –2
+ dt d y(t)
dt3 d2 y(t) dt
–2.5 3
d y(t)
dt2 ∫ ∫ ∫ y(t)
3 x(t) dt3
d2 y(t)
Operational Amplifier Circuits and Linear
dt2 Differential Equations 293
FIGURE 7.9-3 A block diagram that represents Eq. 7.9-3.
–1.5 y(t)
2"
We can
d3 generate other terms from 𝑦 𝑡 –2
d y(t) –1.5 y(t)
2# " d3 y(t) dt
7.9-1 for yðt Þ to get +
–2
d y(t)
dt 3 2
d y(t) d y(t) dtd33
y(t) + dt –2.5
" dt2 dt dt3 d2 y(t)
d2 y(t)
3 3 –2.5
d d y(t) x(t) 2
yð3t Þ þ 1:5yðt Þ∫ ∫ ∫ y(t)
2 dt ð7:9-3Þ dt2 dt
3 x(t)
dt
FIGURE 7.9-2 The first partial block diagram. FIGURE 7.9-3 A block diagram that represents Eq. 7.9-3.
1 µF
diagram shown in Figure 7.9-3. Finally, the
d as shown in Figure 7.9-4 to obtain the block x(t)
Spring 2024 Intro. Circ. Theory and Lab., Lect 37 34
d3 d
x(t)
d d x(t)
3 –2 – d y(t) diagram from Figure 7.9-3,
– d y(t) + dt 2
d y(t) adjusted to accommodate
Optimizing Equation Solver
dt3 –2.5 –1
dt2 the consequences of using
3 –1 x(t) inverting integrators.
296 7. Energy Storage Elements
Inverting
§modified integrator
versions are
of the block morefrom
diagrams practical
Figures 7.9-2 and 7.9-3. Replace all the integrators in
Figure 7.9-2 by inverting integrators to get Figure d2 y(t)7.9-8. It’s necessary to set the input equal to
d y(t)
3 3 – FIGURE 7.9-8 The block diagram
d d 3 dt 2
dt
from Figure 7.9-2, adjusted to
! 3 yðt Þ instead of 3 yðt Þ to– dcause y(t) the output
–∫ to be equal
–∫ to y(t)–∫instead y(t)
of !y(t).
dt dt dt3 d3 d2 d accommodate inverting integrators.
The block diagram in Figure 7.9-9 produces ! 3 yðt Þ from 2 yðt Þ, ! yðt Þ, and y(t). The block
dt dt dt
= *
𝑑 and 7.9-9 can𝑑 be combined 𝑑 as shown in Figure 7.9-10 to obtain the block
diagrams in Figures 7.9-8
diagram of Eq. 7.9-1. = 𝑦 = −2.5 * 𝑦 − 2 𝑦 − 1.5𝑦 + 3𝑥
𝑑𝑡 𝑑𝑡 𝑑𝑡 –1.5 –1 y(t) FIGURE 7.9-9 The blo
A summing integrator can multiply each of its inputs by a separate constant, add the products, and
𝑑 = d3 𝑑* –2
d
– y(t)𝑑 diagram from Figure 7.9
− block
integrate the sum. The – 𝑦y(t)
=
= 2.5
diagram + 𝑦 +in2Figure
shown
*
−1 −
7.9-11
dt 𝑦 + 1.5𝑦
emphasizes +
the 3(−1)𝑥
blocks
d 2
that adjusted
can be to accommodat
implemented by a single 𝑑𝑡four-input
dt 3
𝑑𝑡
summing integrator. 𝑑𝑡 –2.5 –1
2
y(t)
the consequences of usin
dt
3 –1 x(t) inverting integrators.
d2 y(t)
modified dt2 of
versions
the block diagrams
d from Figures 7.9-2 and 7.9-3. Replace all the integr
– y(t)
Figure3 7.9-2 by inverting integrators dt to get Figure 7.9-8. It’s necessary to set the input e
– d3 y(t) –∫ –∫ –∫ y(t)
ddt3 d3
! 3 yðt Þ instead of 3 yðt Þ to cause the output to be equal to y(t) instead of !y(t).
dt dt d3 d2 d
The block diagram in Figure 7.9-9 produces 1.5 ! 3 yðt Þ from 2 yðt Þ, ! yðt Þ, and y(t). Th
dt dt dt
2 –1
diagrams in Figures+ 7.9-8 and 7.9-9 can be combined as shown in Figure 7.9-10 to obtain th
diagram of Eq. 7.9-1. 2.5
d2 y(t)
dt2 d y(t)
–
3 dt
– d y(t) –∫ –∫ –∫ y(t)
dt3
1.5
2 –1
+
2.5
3 –1 x(t)
FIGURE 7.9-11 The block diagram representing Eq. 7.9-1, emphasizing the part implemented by the summing
integrator.
Operational Amplifie
R4 R2
y(t)
R1 C
d2 y(t)
–x(t)
dt2
R3
d y(t) –
dt
+
FIGUR
400 kΩ
667 kΩ 1 µF 1 MΩ 1 µF 1 MΩ 1 µF
y(t)
20 kΩ 20 kΩ 333 kΩ – –
x(t)
+ +
– 500 kΩ
–
+
+
20 kΩ 20 kΩ
CAPACITOR INDUCTOR
+ v(t) – + v(t) –
L
i(t) C i(t)
Z t
d 1
iðt Þ ¼ C vðtÞ iðt Þ ¼ vðtÞdt þ iðt 0 Þ
dt L t0
Z
1 t d
vðtÞ ¼ iðtÞdt þ vðt0 Þ vðtÞ ¼ L iðt Þ
C t0 dt