Logic Design lab EE325

EX.2
implementation of universal logic gates
1. Draw the logic diagram for AND, OR, NOT, XOR and XNOR
gates by using only NAND gates
2. Draw the logic diagrams for AND, OR, NOT, XOR and XNOR
gates by using only NOR gates.
3. Implement SOP expression using only NAND gates
𝑦 = 𝐴𝐵𝐶 + 𝐵𝐶 + 𝐴𝐶′
4. Implement POS expression using only NOR gates.
𝑦 = (𝐴 + 𝐵 + 𝐶)(𝐴 + 𝐵′ )(𝐵 + 𝐶)
5. Draw the NAND circuit for the following expression:
𝐹 = 𝑤(𝑥 + 𝑦 + 𝑧) + 𝑥𝑦𝑧
6. Draw a logic diagram using only two-input NOR gates to
implement the following function
𝑓 = (𝐴⨁𝐵)′ (𝐶⨁𝐷)

Karnaugh Maps

1. Minimize the logic function and realize using only NAND gate
𝑓(𝑎, 𝑏, 𝑐, 𝑑) = ∑𝑚(1,3,7,10,11,14,15) + 𝑑(0,2,5)
2. Minimize the logic function and realize using only NOR gate
𝑓(𝑎, 𝑏, 𝑐, 𝑑) = ∏𝑀(1,3,8,9,10,11,14). 𝑑(7,15)
3. Given the following functions
a. 𝑓(𝑎, 𝑏, 𝑐, 𝑑) = ∏𝑀(0,1,6,8,11,12). 𝑑(3,7,14,15)
b. 𝑓(𝑎, 𝑏, 𝑐, 𝑑) = ∑𝑚(1,3,4,11). +𝑑(2,7,8,12,14,15)
a. Find the minimum sum of products and the minimum
product of sums for each functions (a&b)
b. Implement the simplified function by using only NAND
gates and check the truth table.
c. Implement the same by using only NOR gates and check the
truth table.

Comment on the observations…