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GA-M52L-S3P

Revision:2.4

SHEET TITLE SHEET TITLE

01 COVER SHEET 26 FRONT PANEL POWER SEQUENCE


02 BOM & PCB MODIFY HISTORY 27 ATX CONN VCC12_DUAL,VDDA25
03 BLOCK DIAGRAM 28 PWM ISL6324A
04 PROCESSOR HT INTERFACE 29 ITE 8718GB/ DUAL SPI BIOS
05 PROCESSOR DDR2 INTERFACE 30 DDRII POWER
06 PROCESSOR CONTROL & DEBUG 31 Realtek 8201CL 10/100 LAN
07 PROCESSOR POWER & GND
08 DIMM 1,2
09 DIMM 3,4
10 DIMM TERMINATION
11 MCP61-CPU

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12 MCP61-PCI_EXPRESS

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13 MCP61-DAC, RGMII
14 MCP61-PCI
15 MCP61-SATA, IDE

a.
16 MCP61-USB, HD-Audio, GPIO
17 MCP61-Power, Gnd
18 PCI EXPRESS x16, x1 SLOT

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19 PCI 1,2,3 SLOT
20 PCI 4 SLOT
21 H/W MONITOR & FAN CONTROL

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22 IDE/FDD/COM/LPT/KB/MS
23 F_USB/ R_USB
24 ALC883 HD-AUDIO
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GIGABYTE
25 AUDIO JACK, L_OUT, F_AUDIO Title
BLOCK DIAGRAM
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Monday, July 12, 2010 Sheet 1 of 32
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5 4 3 2 1

Model Name:GA-M52L-S3P Revision:2.4 Circuit or PCB layout change for next version
Component value change history Date Change Item Reason
P-Code: U96058-0
2010.01.20 2.0 Gerber Out Modify from M52LT-S3P 1.0, change to DDR2.
Date Change Item Reason
2010.02.11 2.01 Gerber Out Fix Dual-BIOS can't boot issue when first AC on.
2009.06.15 0.1 E_BOM release PCB:0.1 New BOM
D 2010.03.11 2.02 Gerber Out Fix audio jack detect issue. D
2010.03.16 3.0 E_BOM release PCB:3.0 modify M52L-S3P Rev2.02 , add EC schmatic
2010.03.16 3.0 Gerber Out ADD EC SCHMATIC
2010.04.07 3.0 E_BOM release PCB:3.0 modify M52L-S3P Rev2.02 , add EC schmatic ,8201CL change to 8201EL(10/100)
2010.04.30 2.3 Gerber Out Change version back to 2.3 for all NV EC function with BIOS
NV chipset change to NF520LE
modify M52L-S3P Rev :3.0 , DDR SLOT BULE & WHIDE / F-USB&SATA CONN Change Blue 2010.07.9 2.4 Gerber Out Location: LEC1,CE4,CEC10,EC26,EC40,EC44,CEC34,CEC9,CEC35,EC168.EC169 change 6φ
2010.04.30 2.3 E_BOM release PCB:2.3 Fuse F7,F8 Change 3.5A
Location: DR60/DR22 change 100/04/1
2010.05.19 2.3 P_BOM release PCB:2.3 change LR48 value from 1K to 8.2k PCB:2.3

2010.05.27 2.3 P_BOM release PCB:2.3 Add R501/Q62/R500/Q61 for fix IPOD nano issue PCB2.3
DDR SLOT BULE & WHIDE / F-USB&SATA CONN Change Blue ;EC168,EC169 change 6φ
2010.07.12 2.4 E_BOM release PCB:2.4

DR60/DR22 change 100/04/1

C C

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B B

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A

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GIGABYTE
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Monday, July 12, 2010 Sheet 2 of 32
5 4 3 2 1
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BLOCK DIAGRAM

DDRII 400/533/667/800
POWER
SUPPLY VREG
CONNECTOR 128-BIT 200/266/333/400MHZ DDRII SDRAM CONN 1 1L
AMD CPU
SOCKET AM2
DDRII SDRAM CONN 2 1H

DDRII SDRAM CONN 3 2L

DDRII SDRAM CONN 4 2H

HT 16X16 1GHZ

PEX X16 PCI EXPRESS X16 CONNECTOR

PEX X1 PCI EXPRESS X1 CONNECTOR

PEX X1 PCI EXPRESS X1 CONNECTOR

NVIDIA

m
MCP61D

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PRIMARY IDE ATA 133 PCI 33MHZ PCI SLOT 1

INTEGRATED SATA AZILIA RTL ALC892R CODEC PCI SLOT 2


X2 - SATA CONN

USB2.0 X8 PORT
LPC BUS 33MHZ PCI SLOT 3
SIO
FLOPPY CONN ITE
8720 JX_GB

a.
PCI SLOT 4
PS2/KB CONN BACK PANEL
MII USB2.0 PORTS 0-1
X2
PARALLEL CONN
USB2.0 PORTS 2-3
8Mb Dual FLASH X2/10/100 LAN
SERIAL CONN RTL8201EL PHY

si
RJ45 FRONT PANEL

BACK PANEL USB2.0 PORTS 4-5

USB2.0 PORTS 6-7

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GIGABYTE
Title
BLOCK DIAGRAM
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 3 of 32
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L0_CADIN_L[0..15]
L0_CADIN_L[0..15] <11>
L0_CADIN_H[0..15]
L0_CADIN_H[0..15] <11> CPU_VDD_RUN = VCORE
CPU_VDDA_RUN = VDDA25
L0_CLKIN_L[0..1]
L0_CLKIN_L[0..1] <11>
L0_CLKIN_H[0..1]
L0_CLKIN_H[0..1] <11>
L0_CADOUT_L[0..15]
L0_CADOUT_L[0..15] <11>
VLDT_RUN = VCC12_HT
L0_CADOUT_H[0..15]

L0_CLKOUT_L[0..1]
L0_CADOUT_H[0..15] <11> CPU_VDDIO_SUS = DDR18V
CPU_VTT_SUS = DDRVTT
L0_CLKOUT_L[0..1] <11>
L0_CLKOUT_H[0..1]
L0_CLKOUT_H[0..1] <11>

VLDT_A = VCC12_HT
VLDT_B = HT12B
M2CPUA
HYPERTRANSPORT
L0_CLKIN_H1 N6 AD5 L0_CLKOUT_H1
L0_CLKIN_L1 L0_CLKIN_H(1) L0_CLKOUT_H(1) L0_CLKOUT_L1
P6 L0_CLKIN_L(1) L0_CLKOUT_L(1) AD4
L0_CLKIN_H0 N3 AD1 L0_CLKOUT_H0
L0_CLKIN_L0 L0_CLKIN_H(0) L0_CLKOUT_H(0) L0_CLKOUT_L0
N2 L0_CLKIN_L(0) L0_CLKOUT_L(0) AC1

VCC12_HT R3 49.9/4/1 V4 Y6 1
R4 49.9/4/1 L0_CTLIN_H(1) L0_CTLOUT_H(1) TP78
V5 L0_CTLIN_L(1) L0_CTLOUT_L(1) W6 1 TP79
L0_CTLIN_H0 U1 W2 L0_CTLOUT_H0
<11> L0_CTLIN_H0 L0_CTLIN_H(0) L0_CTLOUT_H(0) L0_CTLOUT_H0 <11>
L0_CTLIN_L0 V1 W3 L0_CTLOUT_L0
<11> L0_CTLIN_L0 L0_CTLIN_L(0) L0_CTLOUT_L(0) L0_CTLOUT_L0 <11>
L0_CADIN_H15 U6 Y5 L0_CADOUT_H15
L0_CADIN_L15 L0_CADIN_H(15) L0_CADOUT_H(15) L0_CADOUT_L15
V6 L0_CADIN_L(15) L0_CADOUT_L(15) Y4
L0_CADIN_H14 T4 AB6 L0_CADOUT_H14
L0_CADIN_L14 L0_CADIN_H(14) L0_CADOUT_H(14) L0_CADOUT_L14
T5 L0_CADIN_L(14) L0_CADOUT_L(14) AA6
L0_CADIN_H13 R6 AB5 L0_CADOUT_H13
L0_CADIN_L13 L0_CADIN_H(13) L0_CADOUT_H(13) L0_CADOUT_L13
T6 L0_CADIN_L(13) L0_CADOUT_L(13) AB4
L0_CADIN_H12 P4 AD6 L0_CADOUT_H12
L0_CADIN_L12 L0_CADIN_H(12) L0_CADOUT_H(12) L0_CADOUT_L12
P5 L0_CADIN_L(12) L0_CADOUT_L(12) AC6
L0_CADIN_H11 M4 AF6 L0_CADOUT_H11
L0_CADIN_L11 L0_CADIN_H(11) L0_CADOUT_H(11) L0_CADOUT_L11
M5 L0_CADIN_L(11) L0_CADOUT_L(11) AE6
L0_CADIN_H10 L6 AF5 L0_CADOUT_H10
L0_CADIN_L10 L0_CADIN_H(10) L0_CADOUT_H(10) L0_CADOUT_L10
M6 L0_CADIN_L(10) L0_CADOUT_L(10) AF4
L0_CADIN_H9 K4 AH6 L0_CADOUT_H9
L0_CADIN_L9 L0_CADIN_H(9) L0_CADOUT_H(9) L0_CADOUT_L9
K5 L0_CADIN_L(9) L0_CADOUT_L(9) AG6
L0_CADIN_H8 J6 AH5 L0_CADOUT_H8
L0_CADIN_L8 L0_CADIN_H(8) L0_CADOUT_H(8) L0_CADOUT_L8
K6 L0_CADIN_L(8) L0_CADOUT_L(8) AH4

m
L0_CADIN_H7 U3 Y1 L0_CADOUT_H7
L0_CADIN_L7 L0_CADIN_H(7) L0_CADOUT_H(7) L0_CADOUT_L7
U2 L0_CADIN_L(7) L0_CADOUT_L(7) W1
L0_CADIN_H6 R1 AA2 L0_CADOUT_H6
L0_CADIN_L6 L0_CADIN_H(6) L0_CADOUT_H(6) L0_CADOUT_L6
T1 L0_CADIN_L(6) L0_CADOUT_L(6) AA3
L0_CADIN_H5 R3 AB1 L0_CADOUT_H5
L0_CADIN_L5 L0_CADIN_H(5) L0_CADOUT_H(5) L0_CADOUT_L5
R2 L0_CADIN_L(5) L0_CADOUT_L(5) AA1

co
L0_CADIN_H4 N1 AC2 L0_CADOUT_H4
L0_CADIN_L4 L0_CADIN_H(4) L0_CADOUT_H(4) L0_CADOUT_L4
P1 L0_CADIN_L(4) L0_CADOUT_L(4) AC3
L0_CADIN_H3 L1 AE2 L0_CADOUT_H3
L0_CADIN_L3 L0_CADIN_H(3) L0_CADOUT_H(3) L0_CADOUT_L3
M1 L0_CADIN_L(3) L0_CADOUT_L(3) AE3
L0_CADIN_H2 L3 AF1 L0_CADOUT_H2
L0_CADIN_L2 L0_CADIN_H(2) L0_CADOUT_H(2) L0_CADOUT_L2
L2 L0_CADIN_L(2) L0_CADOUT_L(2) AE1
L0_CADIN_H1 J1 AG2 L0_CADOUT_H1
L0_CADIN_L1 L0_CADIN_H(1) L0_CADOUT_H(1) L0_CADOUT_L1
K1 L0_CADIN_L(1) L0_CADOUT_L(1) AG3
L0_CADIN_H0 J3 AH1 L0_CADOUT_H0
L0_CADIN_L0 L0_CADIN_H(0) L0_CADOUT_H(0) L0_CADOUT_L0
J2 L0_CADIN_L(0) L0_CADOUT_L(0) AG1

CPU-SK/940AM2/S/GF

a.
M2CPU

si
AM3RM/SC/OR/MB/[12KRC-04K812-12R_12KRC-04K812-14R]

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do
GIGABYTE
Title
CPU HYPER TRANSPORT
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 4 of 32
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M2CPUB M2CPUC
MEMORY INTERFACE A MEMORY INTERFACE B
DCLKA2 AG21 AE14 MDA63 DCLKB2 AJ19 AH13 MDB63
<8,10> DCLKA2 MA0_CLK_H(2) MA_DATA(63) MDA[0..63] <8,9> <8,10> DCLKB2 MB0_CLK_H(2) MB_DATA(63) MDB[0..63] <8,9>
-DCLKA2 AG20 AG14 MDA62 -DCLKB2 AK19 AL13 MDB62
<8,10> -DCLKA2 MA0_CLK_L(2) MA_DATA(62) <8,10> -DCLKB2 MB0_CLK_L(2) MB_DATA(62)
DCLKA1 G19 AG16 MDA61 DCLKB1 A18 AL15 MDB61
<8,10> DCLKA1 MA0_CLK_H(1) MA_DATA(61) <8,10> DCLKB1 MB0_CLK_H(1) MB_DATA(61)
-DCLKA1 H19 AD17 MDA60 -DCLKB1 A19 AJ15 MDB60
<8,10> -DCLKA1 MA0_CLK_L(1) MA_DATA(60) <8,10> -DCLKB1 MB0_CLK_L(1) MB_DATA(60)
DCLKA0 U27 AD13 MDA59 DCLKB0 U31 AF13 MDB59
<8,10> DCLKA0 MA0_CLK_H(0) MA_DATA(59) <8,10> DCLKB0 MB0_CLK_H(0) MB_DATA(59)
-DCLKA0 U26 AE13 MDA58 -DCLKB0 U30 AG13 MDB58
<8,10> -DCLKA0 MA0_CLK_L(0) MA_DATA(58) <8,10> -DCLKB0 MB0_CLK_L(0) MB_DATA(58)
AG15 MDA57 AL14 MDB57
MA_DATA(57) MDA56 MB_DATA(57) MDB56
<8,10> -CSA1 AC25 MA0_CS_L(1) MA_DATA(56) AE16 <8,10> -CSB1 AE30 MB0_CS_L(1) MB_DATA(56) AK15
AA24 AG17 MDA55 AC31 AL16 MDB55
<8,10> -CSA0 MA0_CS_L(0) MA_DATA(55) <8,10> -CSB0 MB0_CS_L(0) MB_DATA(55)
AE18 MDA54 AL17 MDB54
MODT_A0 AC28 MA_DATA(54) MDA53 MODT_BA0 AD29 MB_DATA(54) MDB53
<8,10> MODT_A0 MA0_ODT(0) MA_DATA(53) AD21 <8,10> MODT_B0 MB0_ODT(0) MB_DATA(53) AK21
AG22 MDA52 AL21 MDB52
DCLKA5 MA_DATA(52) MDA51 DCLKB5 MB_DATA(52) MDB51
<9,10> DCLKA5 AE20 MA1_CLK_H(2) MA_DATA(51) AE17 <9,10> DCLKB5 AL19 MB1_CLK_H(2) MB_DATA(51) AH15
-DCLKA5 AE19 AF17 MDA50 -DCLKB5 AL18 AJ16 MDB50
<9,10> -DCLKA5 MA1_CLK_L(2) MA_DATA(50) <9,10> -DCLKB5 MB1_CLK_L(2) MB_DATA(50)
DCLKA4 G20 AF21 MDA49 DCLKB4 C19 AH19 MDB49
<9,10> DCLKA4 MA1_CLK_H(1) MA_DATA(49) <9,10> DCLKB4 MB1_CLK_H(1) MB_DATA(49)
-DCLKA4 G21 AE21 MDA48 -DCLKB4 D19 AL20 MDB48
<9,10> -DCLKA4 MA1_CLK_L(1) MA_DATA(48) <9,10> -DCLKB4 MB1_CLK_L(1) MB_DATA(48)
DCLKA3 V27 AF23 MDA47 DCLKB3 W29 AJ22 MDB47
<9,10> DCLKA3 MA1_CLK_H(0) MA_DATA(47) <9,10> DCLKB3 MB1_CLK_H(0) MB_DATA(47)
-DCLKA3 W27 AE23 MDA46 -DCLKB3 W28 AL22 MDB46
<9,10> -DCLKA3 MA1_CLK_L(0) MA_DATA(46) <9,10> -DCLKB3 MB1_CLK_L(0) MB_DATA(46)
AJ26 MDA45 AL24 MDB45
MA_DATA(45) MDA44 MB_DATA(45) MDB44
<9,10> -CSA3 AD27 MA1_CS_L(1) MA_DATA(44) AG26 <9,10> -CSB3 AE29 MB1_CS_L(1) MB_DATA(44) AK25
AA25 AE22 MDA43 AB31 AJ21 MDB43
<9,10> -CSA2 MA1_CS_L(0) MA_DATA(43) <9,10> -CSB2 MB1_CS_L(0) MB_DATA(43)
AG23 MDA42 AH21 MDB42
MODT_A1 AC27 MA_DATA(42) MDA41 MODT_B1 AD31 MB_DATA(42) MDB41
<9,10> MODT_A1 MA1_ODT(0) MA_DATA(41) AH25 <9,10> MODT_B1 MB1_ODT(0) MB_DATA(41) AH23
AF25 MDA40 AJ24 MDB40
MA_DATA(40) MDA39 MB_DATA(40) MDB39
MA_DATA(39) AJ28 MB_DATA(39) AL27
-SCASA AB25 AJ29 MDA38 -SCASB AC29 AK27 MDB38
<8,9,10> -SCASA MA_CAS_L MA_DATA(38) <8,9,10> -SCASB MB_CAS_L MB_DATA(38)
-SWEA AB27 AF29 MDA37 -SWEB AC30 AH31 MDB37
<8,9,10> -SWEA MA_WE_L MA_DATA(37) <8,9,10> -SWEB MB_WE_L MB_DATA(37)
-SRASA AA26 AE26 MDA36 -SRASB AB29 AG30 MDB36
<8,9,10> -SRASA MA_RAS_L MA_DATA(36) <8,9,10> -SRASB MB_RAS_L MB_DATA(36)
AJ27 MDA35 AL25 MDB35
SBAA2 MA_DATA(35) MDA34 SBAB2 MB_DATA(35) MDB34
<8,9,10> SBAA2 N25 MA_BANK(2) MA_DATA(34) AH27 <8,9,10> SBAB2 N31 MB_BANK(2) MB_DATA(34) AL26
SBAA1 Y27 AG29 MDA33 SBAB1 AA31 AJ30 MDB33
<8,9,10> SBAA1 MA_BANK(1) MA_DATA(33) <8,9,10> SBAB1 MB_BANK(1) MB_DATA(33)
SBAA0 AA27 AF27 MDA32 SBAB0 AA28 AJ31 MDB32
<8,9,10> SBAA0 MA_BANK(0) MA_DATA(32) <8,9,10> SBAB0 MB_BANK(0) MB_DATA(32)
E29 MDA31 E31 MDB31
CKEA1 MA_DATA(31) MDA30 CKEB1 MB_DATA(31) MDB30
<9,10> CKEA1 L27 MA_CKE(1) MA_DATA(30) E28 <9,10> CKEB1 M31 MB_CKE(1) MB_DATA(30) E30
CKEA0 M25 D27 MDA29 CKEB0 M29 B27 MDB29
<8,10> CKEA0 MA_CKE(0) MA_DATA(29) <8,10> CKEB0 MB_CKE(0) MB_DATA(29)
C27 MDA28 A27 MDB28
MAAA15 MA_DATA(28) MDA27 MAAB15 MB_DATA(28) MDB27
M27 MA_ADD(15) MA_DATA(27) G26 N28 MB_ADD(15) MB_DATA(27) F29
<8,9,10> MAAA[0..15] MAAA14 N24 F27 MDA26 <8,9,10> MAAB[0..15] MAAB14 N29 F31 MDB26
MAAA13 MA_ADD(14) MA_DATA(26) MDA25 MAAB13 MB_ADD(14) MB_DATA(26) MDB25
AC26 MA_ADD(13) MA_DATA(25) C28 AE31 MB_ADD(13) MB_DATA(25) A29
MAAA12 N26 E27 MDA24 MAAB12 N30 A28 MDB24
MAAA11 MA_ADD(12) MA_DATA(24) MDA23 MAAB11 MB_ADD(12) MB_DATA(24) MDB23
P25 MA_ADD(11) MA_DATA(23) F25 P29 MB_ADD(11) MB_DATA(23) A25
MAAA10 Y25 E25 MDA22 MAAB10 AA29 A24 MDB22
MAAA9 MA_ADD(10) MA_DATA(22) MDA21 MAAB9 MB_ADD(10) MB_DATA(22) MDB21
N27 MA_ADD(9) MA_DATA(21) E23 P31 MB_ADD(9) MB_DATA(21) C22
MAAA8 R24 D23 MDA20 MAAB8 R29 D21 MDB20
MAAA7 MA_ADD(8) MA_DATA(20) MDA19 MAAB7 MB_ADD(8) MB_DATA(20) MDB19
P27 MA_ADD(7) MA_DATA(19) E26 R28 MB_ADD(7) MB_DATA(19) A26
MAAA6 R25 C26 MDA18 MAAB6 R31 B25 MDB18
MAAA5 MA_ADD(6) MA_DATA(18) MDA17 MAAB5 MB_ADD(6) MB_DATA(18) MDB17
R26 MA_ADD(5) MA_DATA(17) G23 R30 MB_ADD(5) MB_DATA(17) B23
MAAA4 R27 F23 MDA16 MAAB4 T31 A22 MDB16
MAAA3 MA_ADD(4) MA_DATA(16) MDA15 MAAB3 MB_ADD(4) MB_DATA(16) MDB15
T25 MA_ADD(3) MA_DATA(15) E22 T29 MB_ADD(3) MB_DATA(15) B21
MAAA2 U25 E21 MDA14 MAAB2 U29 A20 MDB14
MAAA1 MA_ADD(2) MA_DATA(14) MDA13 MAAB1 MB_ADD(2) MB_DATA(14) MDB13
T27 MA_ADD(1) MA_DATA(13) F17 U28 MB_ADD(1) MB_DATA(13) C16

m
MAAA0 W24 G17 MDA12 MAAB0 AA30 D15 MDB12
MA_ADD(0) MA_DATA(12) MDA11 MB_ADD(0) MB_DATA(12) MDB11
MA_DATA(11) G22 MB_DATA(11) C21
DQSA7 AD15 F21 MDA10 DQSB7 AK13 A21 MDB10
-DQSA7 MA_DQS_H(7) MA_DATA(10) MDA9 -DQSB7 MB_DQS_H(7) MB_DATA(10) MDB9
AE15 MA_DQS_L(7) MA_DATA(9) G18 AJ13 MB_DQS_L(7) MB_DATA(9) A17
DQSA6 AG18 E17 MDA8 DQSB6 AK17 A16 MDB8
-DQSA6 MA_DQS_H(6) MA_DATA(8) MDA7 -DQSB6 MB_DQS_H(6) MB_DATA(8) MDB7
AG19 MA_DQS_L(6) MA_DATA(7) G16 AJ17 MB_DQS_L(6) MB_DATA(7) B15

co
DQSA5 AG24 E15 MDA6 DQSB5 AK23 A14 MDB6
-DQSA5 MA_DQS_H(5) MA_DATA(6) MDA5 -DQSB5 MB_DQS_H(5) MB_DATA(6) MDB5
AG25 MA_DQS_L(5) MA_DATA(5) G13 AL23 MB_DQS_L(5) MB_DATA(5) E13
DQSA4 AG27 H13 MDA4 DQSB4 AL28 F13 MDB4
-DQSA4 MA_DQS_H(4) MA_DATA(4) MDA3 -DQSB4 MB_DQS_H(4) MB_DATA(4) MDB3
AG28 MA_DQS_L(4) MA_DATA(3) H17 AL29 MB_DQS_L(4) MB_DATA(3) C15
DQSA3 D29 E16 MDA2 DQSB3 D31 A15 MDB2
-DQSA3 MA_DQS_H(3) MA_DATA(2) MDA1 -DQSB3 MB_DQS_H(3) MB_DATA(2) MDB1
C29 MA_DQS_L(3) MA_DATA(1) E14 C31 MB_DQS_L(3) MB_DATA(1) A13
DQSA2 C25 G14 MDA0 DQSB2 C24 D13 MDB0
-DQSA2 MA_DQS_H(2) MA_DATA(0) -DQSB2 MB_DQS_H(2) MB_DATA(0)
D25 MA_DQS_L(2) C23 MB_DQS_L(2)
DQSA1 E19 J28 DQSB1 D17 J31
-DQSA1 MA_DQS_H(1) MA_DQS_H(8) -DQSB1 MB_DQS_H(1) MB_DQS_H(8)
F19 MA_DQS_L(1) MA_DQS_L(8) J27 C17 MB_DQS_L(1) MB_DQS_L(8) J30
DQSA0 F15 DQSB0 C14
-DQSA0 MA_DQS_H(0) -DQSB0 MB_DQS_H(0)
G15 J25 C13 J29

a.
MA_DQS_L(0) MA_DM(8) MB_DQS_L(0) MB_DM(8)
DMA7 AF15 K25 DMB7 AJ14 K29
DMA6 MA_DM(7) MA_CHECK(7) DMB6 MB_DM(7) MB_CHECK(7)
AF19 MA_DM(6) MA_CHECK(6) J26 AH17 MB_DM(6) MB_CHECK(6) K31
DMA5 AJ25 G28 DMB5 AJ23 G30
DMA4 MA_DM(5) MA_CHECK(5) DMB4 MB_DM(5) MB_CHECK(5)
AH29 MA_DM(4) MA_CHECK(4) G27 AK29 MB_DM(4) MB_CHECK(4) G29
DMA3 B29 L24 DMB3 C30 L29
DMA2 MA_DM(3) MA_CHECK(3) DMB2 MB_DM(3) MB_CHECK(3)
E24 MA_DM(2) MA_CHECK(2) K27 A23 MB_DM(2) MB_CHECK(2) L28
DMA1 E18 H29 DMB1 B17 H31
DMA0 MA_DM(1) MA_CHECK(1) DMB0 MB_DM(1) MB_CHECK(1)
H15 MA_DM(0) MA_CHECK(0) H27 B13 MB_DM(0) MB_CHECK(0) G31

CPU-SK/940AM2/S/GF CPU-SK/940AM2/S/GF

si
-DQSA[0..7] -DQSB[0..7]
-DQSA[0..7] <8,9> -DQSB[0..7] <8,9>
DQSA[0..7] DQSB[0..7] DQSB[0..7] <8,9>
DQSA[0..7] <8,9>
DMA[0:7] DMB[0..7]
DMA[0..7] <8,9> DMB[0..7] <8,9>

ne
do
GIGABYTE
Title
CPU DDRII MEMORY
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 5 of 32
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DDR18V

-HTSTOP_L R21 300/4

C5 150p/4/NPO/50V/J/X
2.5V/0.25A
-CPURST R22 300/4 FB1 0/6
VDDA25
DDR18V
CPU_PWRGD R23 300/4 30/6/4A/S
C3 C13 C4
4.7u/8/Y5V/10V/Z 0.22u/6/X7R/16V/K
3.3n/4/X7R/50V/K M2CPUD
MISC
C10 VDDA1
CPUCLK0_H C1 CLKIN_H D10 R56 R86 R59 R57 R60
<11> CPUCLK0_H VDDA2 300/4 300/4 300/4 300/4 300/4
3.9n/4/X7R/50V/K A8
R5 CLKIN_H
B8 CLKIN_L
CPUCLK0_L C2 169/4/1 CLKIN_L
<11> CPUCLK0_L
<11,28> CPU_PWRGD CPU_PWRGD C9 D2
PWROK VID(5) VID5 <28>
3.9n/4/X7R/50V/K -HTSTOP_L D8 D1
<11> -HTSTOP_L LDTSTOP_L VID(4) VID4 <28>
-CPURST C7 C1
<11> -CPURST RESET_L VID(3) VID3 <28>
VID(2) E3 VID2 <28>
CPU_PRESENT_L AL3 E2
CPU_PRESENT_L VID(1) VID1 <28>
VID(0) E1 VID0 <28>
R8 22/4/X SIC AL6 AK7 THERMTRIP_L
<16> SI_CLK SIC THERMTRIP_L THERMTRIP_L <11>
R9 22/4/X SID AK6 AL7 -PROCHOT
<16> SI_DAT SID PROCHOT_L -PROCHOT <11>
DDR18V R17 390/4/1
R19 1K/4/1 CPU_TDI AL10 AK10
<14> CPU_TDI TDI TDO
AJ10 TRST_L
DG 1.04 <14> CPU_TCK CPU_TCK AH10 TCK
<14> CPU_TMS CPU_TMS AL9 TMS
A5 DBREQ_L DBRDY B6

<28> COREFB+ G2 VDD_FB_H VDDIO_FB_H AK11


<27,28> COREFB- G1 VDD_FB_L VDDIO_FB_L AL11

E12 VTT_SENSE PSI_L F1


DG 1.04 DDR18V

CPU_M_VREF F12 V8 R53 44.2/4/1 VCC12_HT


R11 39.2/4/1 M_VREF HTREF1 R54 44.2/4/1 CPU_TEST26 R37 300/4
DDR18V AH11 M_ZN HTREF0 V7
R12 39.2/4/1 AJ11
<27,28> COREFB- M_ZP
DG 1.04
BC8 CPU_TEST25_H A10 C11 R55 80.6/4/1 CPU_PRESENT_L R49 1K/4/X
TEST25_H TEST29_H
0.1U/4/Y5V/16V/Z CPU_TEST25_L B10
TEST25_L TEST29_L D11 DG 1.04. NC CPU_TEST25_H R42 510/4/1
R13 300/4 F10
<28> COREFB+ TEST19
R14 300/4 E9 CPU_TEST25_L R43 510/4/1
TEST18
AJ7 TEST13
F6 TEST9
Erratum 133, Revision Guide for
D6 AK8 CPU_TEST24 R224 1K/4/1
E7
TEST17
TEST16
TEST24
TEST23 AH8 AMD NPT 0Fh Processors
R175 300/4/X CPU_TEST15 F8 AJ9 CPU_TEST22 R104 1K/4/1
R210 300/4 CPU_TEST14 TEST15 TEST22 CPU_TEST21 R47 300/4
C5 TEST14 TEST21 AL8

m
R174 1K/4/1 CPU_TEST12 AH9 AJ8 CPU_TEST20 R225 1K/4/1
TEST12 TEST20
E5 TEST7 TEST28_H J10
AJ5 TEST6 TEST28_L H9
R15 0/4/SHT/X AG9 AK9 CPU_TEST27 R34 300/4
CPUVREF DDR18V <29> GNDA
<21,29> TMPIN3
R16 0/4/SHT/X AG8
THERMDC
THERMDA
TEST27
TEST26 AK5 CPU_TEST26
DDR18V

co
AH7 TEST3 TEST10 G7
AJ6 TEST2 TEST8 D4 LAYOUT: Route trace 50 mils wide and
40 MILS WIDTH 500 to 750 mils long between these caps.
SR19 CPU-SK/940AM2/S/GF
CPU_M_VREF 16.9/4/1

M2CPUE
1

SBC12 SBC31 SR20 INTERNAL MISC

a.
SC35 16.9/4/1 L25 E20
1u/6/Y5V/10V/Z RSVD1 RSVD17
L26 B19
2

1N/4/X7R/50V/K RSVD2 RSVD18


L31 RSVD3
L30 RSVD4 RSVD19 AL4
RSVD20 AK4
RSVD21 AK3
0.1U/4/Y5V/16V/Z
RSVD22 F2
RSVD23 F3
W26 RSVD5
W25 RSVD6 RSVD24 G4
AE27 G3

si
RSVD7 RSVD25 CORE_TYPE_DET R102 300/4
U24 RSVD8 RSVD26 G5 DDR18V
V24 RSVD9
AE28 RSVD10 RSVD27 AD25 CORE_TYPE_DET <28>
RSVD28 AE24
RSVD29 AE25 AM2: high, AM2R2: low
RSVD30 AJ18
RSVD31 AJ20
RSVD32 C18
Y31 RSVD11 RSVD33 C20
Y30 RSVD12 RSVD34 G24
AG31 RSVD13 RSVD35 G25

ne
V31 RSVD14 RSVD36 H25
W31 RSVD15 RSVD37 V29
AF31 RSVD16 RSVD38 W30

CPU-SK/940AM2/S/GF
do
GIGABYTE
Title
CPU CONTROL
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 6 of 32
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VCORE_NB
VLDT_RUN_B is connected to the VLDT_RUN power
supply through the package or on the die. It is only connected
on the board to decoupling near the CPU package. C1344 C1343 C1342 C1345 C1346
M2CPUF VCORE M2CPUI 22u/8/X5R/6.3V/M 0.1U/4/Y5V/16V/Z 180P/4/NPO/50V/J
VDD1 M2CPUG VCORE M2CPUH HT12B 1U/6/Y5V/10V/Z 0.01U/4/X7R/25V/K
A4 VDD1 VSS1 A3 VDDIO
VCORE_NB A6 VDD2 VSS2 A7 VDD2 VDD3 VCC12_HT AJ4 VLDT_A1 VLDT_B1 H6
AA8 A9 L14 AK20 AA20 N17 AJ3 H5 GND
VCORE VDD3 VSS3 VDD1 VSS1 VDD1 VSS1 VLDT_A2 VLDT_B2
AA10 A11 L16 AK22 AA22 N19 AJ2 H2 BC795
VDD4 VSS4 VDD2 VSS2 VDD2 VSS2 VLDT_A3 VLDT_B3 22U/8/X5R/6.3V/M
AA12 VDD5 VSS5 AA4 L18 VDD3 VSS3 AK24 AB13 VDD3 VSS3 N21 AJ1 VLDT_A4 VLDT_B4 H1
AA14 AA5 M2 AK26 AB15 N23 DDRVTT
VDD6 VSS6 VDD4 VSS4 VDD4 VSS4
AA16 VDD7 VSS7 AA7 M3 VDD5 VSS5 AK28 AB17 VDD5 VSS5 P2 DDRVTT D12 VTT1 VTT5 AK12
AA18
AB7
VDD8 VSS8 AA9
AA11
M7
M9
VDD6 VSS6 AK30
AL5
AB19
AB21
VDD6 VSS6 P3
P8
C12
B12
VTT2 VTT6 AJ12
AH12
DDR18V
BUTTOM SIDE
VDD9 VSS9 VDD7 VSS7 VDD7 VSS7 VTT3 VTT7
AB9 VDD10 VSS10 AA13 M11 VDD8 VSS8 B4 AB23 VDD8 VSS8 P10 A12 VTT4 VTT8 AG12
AB11 VDD11 VSS11 AA15 M13 VDD9 VSS9 B9 AC12 VDD9 VSS9 P12 VTT9 AL12
AC4 VDD12 VSS12 AA17 M15 VDD10 VSS10 B11 AC14 VDD10 VSS10 P14 DDR18V AB24 VDDIO1
AC5 AA19 M17 B14 AC16 P16 AB26 K24 SC2 SC4 SC5 SC6
VDD13 VSS13 VDD11 VSS11 VDD11 VSS11 VDDIO2 VSS1 0.22u/6/X7R/16V/K 0.01u/6/X7R/50V/K
180P/6/NPO/50V/J
AC8 VDD14 VSS14 AA21 M19 VDD12 VSS12 B16 AC18 VDD12 VSS12 P18 AB28 VDDIO3 VSS2 K26
AC10 AA23 N8 B18 AC20 P20 AB30 K28 0.22u/6/X5R/10V/K/X
VDD15 VSS15 VDD13 VSS13 VDD13 VSS13 VDDIO4 VSS3
AD2 VDD16 VSS16 AB2 N10 VDD14 VSS14 B20 AC22 VDD14 VSS14 P22 AC24 VDDIO5 VSS4 K30
AD3 VDD17 VSS17 AB3 N12 VDD15 VSS15 B22 AD11 VDD15 VSS15 R7 AD26 VDDIO6 VSS5 L7
AD7 VDD18 VSS18 AB8 N14 VDD16 VSS16 B24 AD23 VDD16 VSS16 R9 AD28 VDDIO7 VSS6 L9
AD9 VDD19 VSS19 AB10 N16 VDD17 VSS17 B26 AE12 VDD17 VSS17 R11 AD30 VDDIO8 VSS7 L11
AE10 AB12 N18 B28 AF11 R13 AF30 L13 DDR18V
VDD20 VSS20 VDD18 VSS18 VDD18 VSS18 VDDIO29 VSS8
AF7 VDD21 VSS21 AB14 P7 VDD19 VSS19 B30 L20 VDD19 VSS19 R15 M24 VDDIO9 VSS9 L15
AF9 VDD22 VSS22 AB16 P9 VDD20 VSS20 C3 L22 VDD20 VSS20 R17 M26 VDDIO10 VSS10 L17
AG4 VDD23 VSS23 AB18 P11 VDD21 VSS21 D14 M21 VDD21 VSS21 R19 M28 VDDIO11 VSS11 L19
AG5 VDD24 VSS24 AB20 P13 VDD22 VSS22 D16 M23 VDD22 VSS22 R21 M30 VDDIO12 VSS12 L21
AG7 AB22 P15 D18 N20 R23 P24 L23 SC9 SC10 SC7 SC8 SC31
VDD25 VSS25 VDD23 VSS23 VDD23 VSS23 VDDIO13 VSS13 22u/8/X5R/6.3V/M/X 4.7u/8/Y5V/10V/Z 180P/6/NPO/50V/J/X
AH2 VDD26 VSS26 AC7 P17 VDD24 VSS24 D20 N22 VDD24 VSS24 T8 P26 VDDIO14 VSS14 M8
AH3 AC9 P19 D22 P21 T10 P28 M10 22u/8/X5R/6.3V/M 4.7u/8/Y5V/10V/Z/X
VDD27 VSS27 VDD25 VSS25 VDD25 VSS25 VDDIO15 VSS15
B3 VDD28 VSS28 AC11 R4 VDD26 VSS26 D24 P23 VDD26 VSS26 T12 P30 VDDIO16 VSS16 M12
B5 VDD29 VSS29 AC13 R5 VDD27 VSS27 D26 R22 VDD27 VSS27 T14 T24 VDDIO17 VSS17 M14
VCORE_NB B7 VDD30 VSS30 AC15 R8 VDD28 VSS28 D28 T23 VDD28 VSS28 T16 T26 VDDIO18 VSS18 M16
VCORE C2 VDD31 VSS31 AC17 R10 VDD29 VSS29 D30 U22 VDD29 VSS29 T18 T28 VDDIO19 VSS19 M18
C4 VDD32 VSS32 AC19 R12 VDD30 VSS30 E11 V23 VDD30 VSS30 T20 T30 VDDIO20 VSS20 M20
C6 VDD33 VSS33 AC21 R14 VDD31 VSS31 F4 W22 VDD31 VSS31 T22 V25 VDDIO21 VSS21 M22
VCORE_NB C8 VDD34 VSS34 AC23 R16 VDD32 VSS32 F14 Y23 VDD32 VSS32 U4 V26 VDDIO22 VSS22 N4
VCORE D3 VDD35 VSS35 AD8 R18 VDD33 VSS33 F16 VSS33 U5 V28 VDDIO23 VSS23 N5
D5 VDD36 VSS36 AD10 R20 VDD34 VSS34 F18 VSS34 U7 V30 VDDIO24 VSS24 N7

VCORE_NB
D7
D9
VDD37 VSS37 AD12
AD14
T2
T3
VDD35 VSS35 F20
F22
VSS35 U9
U11
Y24
Y26
VDDIO25 VSS25 N9
N11 VCORE BUTTOM SIDE
VDD38 VSS38 VDD36 VSS36 VSS36 VDDIO26 VSS26
VCORE E4 VDD39 VSS39 AD16 T7 VDD37 VSS37 F24 VSS37 U13 Y28 VDDIO27 VSS27 N13
E6 VDD40 VSS40 AD20 T9 VDD38 VSS38 F26 VSS38 U15 Y29 VDDIO28 VSS28 N15
E8 VDD41 VSS41 AD22 T11 VDD39 VSS39 F28 VSS39 U17
VCORE_NB E10 VDD42 VSS42 AD24 T13 VDD40 VSS40 F30 VSS40 U19
F5 AE4 T15 G9 U21 SC11 SC12 SC13 SC14 SC15
VCORE VDD43 VSS43 VDD41 VSS41 VSS41
F7 AE5 T17 G11 U23 CPU-SK/940AM2/S/GF 0.22u/6/X7R/16V/K 0.22u/6/X5R/10V/K/X 180P/6/NPO/50V/J
VDD44 VSS44 VDD42 VSS42 VSS42 0.22u/6/X5R/10V/K/X 0.01u/6/X7R/25V/K/X
F9 VDD45 VSS45 AE9 T19 VDD43 VSS43 H8 VSS43 V2

m
VCORE_NB F11 VDD46 VSS46 AE11 T21 VDD44 VSS44 H10 VSS44 V3
VCORE G6 VDD47 VSS47 AF2 U8 VDD45 VSS45 H12 VSS45 V10
G8 VDD48 VSS48 AF3 U10 VDD46 VSS46 H14 VSS46 V12
G10 VDD49 VSS49 AF8 U12 VDD47 VSS47 H16 VSS47 V14
VCORE_NB G12 VDD50 VSS50 AF10 U14 VDD48 VSS48 H18 VSS48 V16
VCORE H7 VDD51 VSS51 AF12 U16 VDD49 VSS49 H22 VSS49 V18

co
H11
H23
VDD52 VSS52 AF14
AF16
U18
U20
VDD50 VSS50 H24
H26
VSS50 V20
V22
BUTTOM SIDE
VDD53 VSS53 VDD51 VSS51 VSS51
J8 VDD54 VSS54 AF18 V9 VDD52 VSS52 H28 VSS52 W9
J12 AF20 V11 H30 W11 VCORE
VDD55 VSS55 VDD53 VSS53 VSS53
J14 VDD56 VSS56 AF22 V13 VDD54 VSS54 J4 VSS54 W13
J16 VDD57 VSS57 AF24 V15 VDD55 VSS55 J5 VSS55 W15
J18 VDD58 VSS58 AF26 V17 VDD56 VSS56 J7 VSS56 W17
J20 VDD59 VSS59 AF28 V19 VDD57 VSS57 J9 VSS57 W19
J22 AG10 V21 J11 W21 SC16 SC17 SC18 SC19 SC20 SC21 SC22 SC23
VDD60 VSS61 VDD58 VSS58 VSS58 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M
J24 VDD61 VSS62 AG11 W4 VDD59 VSS59 J13 VSS59 W23
K7 AH14 W5 J15 Y8 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X
VDD62 VSS63 VDD60 VSS60 VSS60
K9 AH16 W8 J17 Y10

a.
VDD63 VSS64 VDD61 VSS61 VSS61
K11 VDD64 VSS65 AH18 W10 VDD62 VSS62 J19 VSS62 Y12
K13 VDD65 VSS66 AH20 W12 VDD63 VSS63 J21 VSS63 W7
K15 AH22 W14 J23 Y20 VCORE
VDD66 VSS67 VDD64 VSS64 VSS64
K17 VDD67 VSS68 AH24 W16 VDD65 VSS65 K2 VSS65 Y22
K19 VDD68 VSS69 AH26 W18 VDD66 VSS66 K3
K21 VDD69 VSS70 AH28 W20 VDD67 VSS67 K8
K23 VDD70 VSS71 AH30 Y2 VDD68 VSS68 K10
L4 AK2 Y3 K12 CPU-SK/940AM2/S/GF SC24 SC25 SC26 SC27 SC28 SC29 SC30
VDD71 VSS72 VDD69 VSS69 22u/8/X5R/6.3V/M
22u/8/X5R/6.3V/M22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M 22u/8/X5R/6.3V/M
L5 VDD72 VSS73 AK14 Y7 VDD70 VSS70 K14
L8 AK16 Y9 K16 22u/8/X5R/6.3V/M/X 22u/8/X5R/6.3V/M/X
VDD73 VSS74 VDD71 VSS71
L10 VDD74 VSS75 AK18 Y11 VDD72 VSS72 K18
L12 Y14 Y13 K20

si
VDD75 VSS240 VDD73 VSS73
Y17 VDD150 VSS241 Y16 Y15 VDD74 VSS74 K22
Y19 VDD151 Y21 VDD75 VSS75 Y18

CPU-SK/940AM2/S/GF
CPU-SK/940AM2/S/GF

DDRVTT

ne
C1316 C1317 C1318 C1320 C1321 C1322 C1323
DDR18V 4.7u/8/Y5V/10V/Z
4.7u/8/Y5V/10V/Z 0.22u/6/X7R/16V/K 1n/6/X7R/50V/K1n/6/X7R/50V/K 180P/6/NPO/50V/J
180P/6/NPO/50V/J
VCC12_HT

C1324 C1325 DDRVTT


C1330 C1331 C1332 C1333 4.7u/8/Y5V/10V/Z
4.7u/8/Y5V/10V/Z
0.22u/6/X7R/16V/K
0.22u/6/X7R/16V/K
180P/6/NPO/50V/J
180P/6/NPO/50V/J
do
C1334 C1335 C1336 C1338 C1339 C1340 C1341 GIGABYTE
4.7u/8/Y5V/10V/Z
4.7u/8/Y5V/10V/Z 0.22u/6/X7R/16V/K 1n/6/X7R/50V/K1n/6/X7R/50V/K 180P/6/NPO/50V/J
180P/6/NPO/50V/J
Title
CPU POWER & GND
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 7 of 32
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8 7 6 5 4 3 2 1

DQSB[0..7] DQSB[0..7] <5,9>


DDR2_2
DDR2_1 -DQSB[0..7]
-DQSB[0..7] <5,9>
2 68 DMB[0..7]
VSS NC DMB[0..7] <5,9>
2 VSS NC 68 5 VSS NC/TEST 102
5 VSS NC/TEST 102 8 VSS NC 19
8 VSS NC 19 11 VSS
11 VSS 14 VSS ODT1 77
14 77 17 195 MODT_B0
VSS ODT1 VSS ODT0 MODT_B0 <5,10>
17 195 MODT_A0 20
VSS ODT0 MODT_A0 <5,10> VSS
20 VSS 23 VSS CB(0) 42
23 VSS CB(0) 42 26 VSS CB(1) 43
26 VSS CB(1) 43 29 VSS CB(2) 48
29 VSS CB(2) 48 32 VSS CB(3) 49
32 VSS CB(3) 49 35 VSS CB(4) 161
35 VSS CB(4) 161 38 VSS CB(5) 162
38 VSS CB(5) 162 41 VSS CB(6) 167
D 41 VSS CB(6) 167 44 VSS CB(7) 168 D
44 VSS CB(7) 168 47 VSS
47 50 7 DQSB0
VSS DQSA0 VSS DQS(0) -DQSB0
50 VSS DQS(0) 7 65 VSS DQS*(0) 6
65 6 -DQSA0 66
VSS DQS*(0) VSS DQSB1
66 VSS 79 VSS DQS(1) 16
79 16 DQSA1 82 15 -DQSB1
VSS DQS(1) -DQSA1 VSS DQS*(1)
82 VSS DQS*(1) 15 85 VSS
85 88 28 DQSB2
VSS DQSA2 VSS DQS(2) -DQSB2
88 VSS DQS(2) 28 91 VSS DQS*(27) 27
91 27 -DQSA2 94
VSS DQS*(27) VSS DQSB3
94 VSS 97 VSS DQS(3) 37
97 37 DQSA3 100 36 -DQSB3
VSS DQS(3) -DQSA3 VSS DQS*(3)
100 VSS DQS*(3) 36 103 VSS
103 106 84 DQSB4
VSS DQSA4 VSS DQS(4) -DQSB4
106 VSS DQS(4) 84 109 VSS DQS*(4) 83
109 83 -DQSA4 112
VSS DQS*(4) VSS DQSB5
112 VSS 115 VSS DQS(5) 93
115 93 DQSA5 118 92 -DQSB5
VSS DQS(5) -DQSA5 VSS DQS*(5)
118 VSS DQS*(5) 92 121 VSS
121 124 105 DQSB6
VSS DQSA6 VSS DQS(6) -DQSB6
124 VSS DQS(6) 105 127 VSS DQS*(6) 104
127 104 -DQSA6 130
VSS DQS*(6) VSS DQSB7
130 VSS 133 VSS DQS(7) 114
133 114 DQSA7 136 113 -DQSB7
VSS DQS(7) -DQSA7 VSS DQS*(7)
136 VSS DQS*(7) 113 139 VSS
139 VSS 142 VSS DQS8 46
142 VSS DQS8 46 145 VSS DQS8* 45
145 VSS DQS8* 45 148 VSS
148 151 125 DMB0
VSS DMA0 VSS DM0/DQS9
151 VSS DM0/DQS9 125 154 VSS NC/DQS9* 126
D3 154 126 157
VSS NC/DQS9* VSS DMB1
2 157 VSS 160 VSS DM1/DQS10 134
MEM_SMBDATA 3 160 134 DMA1 163 135
VSS DM1/DQS10 VSS NC/DQS10*
1 3VDUAL 163 VSS NC/DQS10* 135 166 VSS DMB2

m
166 VSS 169 VSS DM2/DQS11 146
BAV99/SOT23/300mA 169 146 DMA2 198 147
VSS DM2/DQS11 VSS NC/DQS11*
SOT23

198 VSS NC/DQS11* 147 201 VSS


201 204 155 DMB3
VSS DMA3 VSS DM3/DQS12
204 VSS DM3/DQS12 155 207 VSS NC/DQS12* 156
207 156 210

co
C D4 VSS NC/DQS12* VSS DMB4 C
210 VSS 213 VSS DM4/DQS13 202
2 213 202 DMA4 216 203
MEM_SMBCLK VSS DM4/DQS13 VSS NC/DQS13*
3 216 VSS NC/DQS13* 203 219 VSS
1 3VDUAL 219 222 211 DMB5
VSS DMA5 VSS DM5/DQS14
222 VSS DM5/DQS14 211 225 VSS NC/DQS14* 212
BAV99/SOT23/300mA 225 212 228
VSS NC/DQS14* VSS DMB6
SOT23

228 VSS 231 VSS DM6/DQS15 223


231 223 DMA6 234 224
VSS DM6/DQS15 VSS NC/DQS15*
234 VSS NC/DQS15* 224 237 VSS
237 51 232 DMB7
VSS DMA7 VDDQ DM7/DQS16
51 VDDQ DM7/DQS16 232 56 VDDQ 233

a.
NC/DQS16*
56 VDDQ NC/DQS16* 233 62 VDDQ
62 VDDQ 72 VDDQ DM8/DQS17 164
72 VDDQ DM8/DQS17 164 75 VDDQ NC/DQS17* 165
VCC3 75 165 78
VDDQ NC/DQS17* VDDQ MDB0
78 VDDQ 191 VDDQ DQ(0) 3
191 3 MDA0 DDR18V 194 4 MDB1 MDB[0..63] <5,9>
VDDQ DQ(0) MDA[0..63] <5,9> VDDQ DQ(1)
DDR18V 194 4 MDA1 181 9 MDB2
BC9 BC16 BC18 BC19 VDDQ DQ(1) MDA2 VDDQ DQ(2) MDB3
181 VDDQ DQ(2) 9 175 VDDQ DQ(3) 10
175 10 MDA3 170 122 MDB4
0.1U/4/Y5V/16V/Z VDDQ DQ(3) MDA4 VDDQ DQ(4) MDB5
170 VDDQ DQ(4) 122 53 VDD DQ(5) 123
53 123 MDA5 59 128 MDB6
VDD DQ(5) VDD DQ(6)

si
0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z 59 128 MDA6 64 129 MDB7
VDD DQ(6) MDA7 VDD DQ(7) MDB8
64 VDD DQ(7) 129 197 VDD DQ(8) 12
0.1U/6/X7R/25V/K 197 12 MDA8 69 13 MDB9
VDD DQ(8) MDA9 VDD DQ(9) MDB10
69 VDD DQ(9) 13 172 VDD DQ(10) 21
172 21 MDA10 187 22 MDB11
VDD DQ(10) MDA11 VDD DQ(11) MDB12
187 VDD DQ(11) 22 184 VDD DQ(12) 131
184 131 MDA12 178 132 MDB13
VDD DQ(12) MDA13 VDD DQ(13) MDB14
DDR_VREF 178 VDD DQ(13) 132 189 VDD DQ(14) 140
189 140 MDA14 67 141 MDB15
VDD DQ(14) MDA15 VDD DQ(15) MDB16
67 VDD DQ(15) 141 DQ(16) 24
24 MDA16 VREF_DDRB 18 25 MDB17
DQ(16) DDR_VREF RC1 DQ(17)

ne
18 25 MDA17 55 30 MDB18
RC1 DQ(17) MDA18 C124 RC0 DQ(18) MDB19
55 RC0 DQ(18) 30 VCC3 238 VDDSPD DQ(19) 31
C123 VCC3 238 31 MDA19 0.1U/4/Y5V/16V/Z 1 143 MDB20
0.1U/4/Y5V/16V/Z VREF_DDRA VDDSPD DQ(19) MDA20 MEM_SMBCLK VREF DQ(20) MDB21
1 VREF DQ(20) 143 <9,16> MEM_SMBCLK 120 SCL DQ(21) 144
MEM_SMBCLK 120 144 MDA21 MEM_SMBDATA 119 149 MDB22
<9,16> MEM_SMBCLK SCL DQ(21) <9,16> MEM_SMBDATA SDA DQ(22)
MEM_SMBDATA 119 149 MDA22 101 150 MDB23
<9,16> MEM_SMBDATA SDA DQ(22) SA2 DQ(23)
101 150 MDA23 240 33 MDB24
SA2 DQ(23) MDA24 SA1 DQ(24) MDB25
240 SA1 DQ(24) 33 VCC3 239 SA0 DQ(25) 34
B MDA25 MDB26 B
239 SA0 DQ(25) 34 DQ(26) 39
39 MDA26 SBAB1 190 40 MDB27
SBAA1 DQ(26) MDA27 <5,9,10> SBAB1 SBAB0 BA1 DQ(27) MDB28
<5,9,10> SBAA1 190 BA1 DQ(27) 40 <5,9,10> SBAB0 71 BA0 DQ(28) 152
do
SBAA0 71 152 MDA28 153 MDB29
<5,9,10> SBAA0 BA0 DQ(28) DQ(29)
153 MDA29 171 158 MDB30
DQ(29) MDA30 CKEB0 CKE1 DQ(30) MDB31
171 CKE1 DQ(30) 158 <5,10> CKEB0 52 CKE0 DQ(31) 159
CKEA0 52 159 MDA31 80 MDB32
<5,10> CKEA0 CKE0 DQ(31) DQ(32)
80 MDA32 76 81 MDB33
DQ(32) <5,10> -CSB1 S1* DQ(33)
76 81 MDA33 193 86 MDB34
<5,10> -CSA1 S1* DQ(33) <5,10> -CSB0 S0* DQ(34)
193 86 MDA34 87 MDB35
<5,10> -CSA0 S0* DQ(34) DQ(35)
87 MDA35 -DCLKB2 221 199 MDB36
DQ(35) <5,10> -DCLKB2 CK2*/RFU DQ(36)
-DCLKA2 221 199 MDA36 DCLKB2 220 200 MDB37
<5,10> -DCLKA2 CK2*/RFU DQ(36) <5,10> DCLKB2 CK2/RFU DQ(37)
DCLKA2 220 200 MDA37 -DCLKB1 138 205 MDB38
<5,10> DCLKA2 CK2/RFU DQ(37) <5,10> -DCLKB1 CK1*/RFU DQ(38)
-DCLKA1 138 205 MDA38 DCLKB1 137 206 MDB39
<5,10> -DCLKA1 CK1*/RFU DQ(38) <5,10> DCLKB1 CK1/RFU DQ(39)
in

DCLKA1 137 206 MDA39 -DCLKB0 186 89 MDB40


<5,10> DCLKA1 CK1/RFU DQ(39) <5,10> -DCLKB0 CK0* DQ(40)
-DCLKA0 186 89 MDA40 DCLKB0 185 90 MDB41
<5,10> -DCLKA0 CK0* DQ(40) <5,10> DCLKB0 CK0 DQ(41)
DCLKA0 185 90 MDA41 95 MDB42
<5,10> DCLKA0 CK0 DQ(41) DQ(42)
95 MDA42 MAAB0 188 96 MDB43
MAAA0 DQ(42) MDA43 <5,9,10> MAAB[0..15] MAAB1 A0 DQ(43) MDB44
188 A0 DQ(43) 96 183 A1 DQ(44) 208
<5,9,10> MAAA[0..15] MAAA1 183 208 MDA44 MAAB2 63 209 MDB45
MAAA2 A1 DQ(44) MDA45 MAAB3 A2 DQ(45) MDB46
63 A2 DQ(45) 209 182 A3 DQ(46) 214
MAAA3 182 214 MDA46 MAAB4 61 215 MDB47
MAAA4 A3 DQ(46) MDA47 MAAB5 A4 DQ(47) MDB48
61 A4 DQ(47) 215 60 A5 DQ(48) 98
MAAA5 60 98 MDA48 MAAB6 180 99 MDB49
MAAA6 A5 DQ(48) MDA49 MAAB7 A6 DQ(49) MDB50
180 A6 DQ(49) 99 58 A7 DQ(50) 107
i-

MAAA7 58 107 MDA50 MAAB8 179 108 MDB51


MAAA8 A7 DQ(50) MDA51 MAAB9 A8 DQ(51) MDB52
179 A8 DQ(51) 108 177 A9 DQ(52) 217
MAAA9 177 217 MDA52 MAAB10 70 218 MDB53
MAAA10 A9 DQ(52) MDA53 MAAB11 A10/AP DQ(53) MDB54
70 A10/AP DQ(53) 218 57 A11 DQ(54) 226
MAAA11 57 226 MDA54 MAAB12 176 227 MDB55
MAAA12 A11 DQ(54) MDA55 MAAB13 A12 DQ(55) MDB56
176 A12 DQ(55) 227 196 A13 DQ(56) 110
MAAA13 196 110 MDA56 MAAB14 174 111 MDB57
MAAA14 A13 DQ(56) MDA57 MAAB15 A14 DQ(57) MDB58
174 A14 DQ(57) 111 173 A15 DQ(58) 116
MAAA15 173 116 MDA58 SBAB2 54 117 MDB59
A15 DQ(58) <5,9,10> SBAB2 A16/BA2 DQ(59)
SBAA2 54 117 MDA59 229 MDB60
<5,9,10> SBAA2 A16/BA2 DQ(59) DQ(60)
229 MDA60 -SCASB 74 230 MDB61
DQ(60) <5,9,10> -SCASB CAS* DQ(61)
is

-SCASA 74 230 MDA61 -SRASB 192 235 MDB62


<5,9,10> -SCASA CAS* DQ(61) <5,9,10> -SRASB RSA* DQ(62)
-SRASA 192 235 MDA62 -SWEB 73 236 MDB63
<5,9,10> -SRASA RSA* DQ(62) <5,9,10> -SWEB WE* DQ(63)
-SWEA 73 236 MDA63
<5,9,10> -SWEA WE* DQ(63)

A A

DDR2/240/BL/VA/D
DDR2/240/BL/VA/D
DDR18V MEM_SMBCLK
-DQSA[0..8] <9,16> MEM_SMBCLK
MEM_SMBDATA
-DQSA[0..8] <5,9> <9,16> MEM_SMBDATA
DQSA[0..8]
kn

DQSA[0..8] <5,9>
R154 DDR_VREF DMA[0:8] C125 C126
DMA[0..8] <5,9>
59/4/1 BC6 100P/4/NPO/50V/X 100P/4/N/50V/X
0.1U/6/Y/25V/X
GIGABYTE
R155 BC14 BC11 Title
59/4/1 0.1U/4/Y5V/16V/Z 1N/4/X7R/50V/K DDR3 CHANNEL A
Size Document Number Rev
GA-M52L-S3P 2.4
te

Custom

Date: Sheet 8 of 32
8 7 6 5 4 3 2 1
w.
ww
8 7 6 5 4 3 2 1

-DQSA[0..7]
-DQSA[0..7] <5,8>
DQSA[0..7]
DDR2_3 DQSA[0..7] <5,8>
DDR2_4
DMA[0:7]
DMA[0..7] <5,8>
2 VSS NC 68 2 VSS NC 68
5 VSS NC/TEST 102 5 VSS NC/TEST 102
8 VSS NC 19 8 VSS NC 19
11 VSS 11 VSS
14 VSS ODT1 77 14 VSS ODT1 77
17 195 MODT_A1 17 195 MODT_B1
VSS ODT0 MODT_A1 <5,10> VSS ODT0 MODT_B1 <5,10>
20 VSS 20 VSS
23 VSS CB(0) 42 23 VSS CB(0) 42
26 VSS CB(1) 43 26 VSS CB(1) 43
29 VSS CB(2) 48 29 VSS CB(2) 48
32 VSS CB(3) 49 32 VSS CB(3) 49
35 VSS CB(4) 161 35 VSS CB(4) 161
D 38 VSS CB(5) 162 38 VSS CB(5) 162 D
41 VSS CB(6) 167 41 VSS CB(6) 167
44 VSS CB(7) 168 44 VSS CB(7) 168
47 VSS 47 VSS
50 7 DQSA0 50 7 DQSB0
VSS DQS(0) -DQSA0 VSS DQS(0) -DQSB0
65 VSS DQS*(0) 6 65 VSS DQS*(0) 6
66 VSS 66 VSS
79 16 DQSA1 79 16 DQSB1
VSS DQS(1) -DQSA1 VSS DQS(1) -DQSB1
82 VSS DQS*(1) 15 82 VSS DQS*(1) 15
85 VSS 85 VSS
88 28 DQSA2 88 28 DQSB2
VSS DQS(2) -DQSA2 VSS DQS(2) -DQSB2
91 VSS DQS*(27) 27 91 VSS DQS*(27) 27
94 VSS 94 VSS
97 37 DQSA3 97 37 DQSB3
VSS DQS(3) -DQSA3 VSS DQS(3) -DQSB3
100 VSS DQS*(3) 36 100 VSS DQS*(3) 36
103 VSS 103 VSS
106 84 DQSA4 106 84 DQSB4
VSS DQS(4) -DQSA4 VSS DQS(4) -DQSB4
109 VSS DQS*(4) 83 109 VSS DQS*(4) 83
112 VSS 112 VSS
-DQSB[0..8] 115 93 DQSA5 115 93 DQSB5
-DQSB[0..8] <5,8> VSS DQS(5) -DQSA5 VSS DQS(5) -DQSB5
118 VSS DQS*(5) 92 118 VSS DQS*(5) 92
121 VSS 121 VSS
124 105 DQSA6 124 105 DQSB6
DQSB[0..8] VSS DQS(6) -DQSA6 VSS DQS(6) -DQSB6
DQSB[0..8] <5,8> 127 VSS DQS*(6) 104 127 VSS DQS*(6) 104
130 VSS 130 VSS
133 114 DQSA7 133 114 DQSB7
DMB[0..8] VSS DQS(7) -DQSA7 VSS DQS(7) -DQSB7
DMB[0..8] <5,8> 136 VSS DQS*(7) 113 136 VSS DQS*(7) 113
139 VSS 139 VSS
142 VSS DQS8 46 142 VSS DQS8 46
145 VSS DQS8* 45 145 VSS DQS8* 45
148 VSS 148 VSS
151 125 DMA0 151 125 DMB0
VSS DM0/DQS9 VSS DM0/DQS9
154 VSS NC/DQS9* 126 154 VSS NC/DQS9* 126
157 VSS 157 VSS
160 134 DMA1 160 134 DMB1
VSS DM1/DQS10 VSS DM1/DQS10

m
163 VSS NC/DQS10* 135 163 VSS NC/DQS10* 135
166 VSS 166 VSS
169 146 DMA2 169 146 DMB2
VSS DM2/DQS11 VSS DM2/DQS11
198 VSS NC/DQS11* 147 198 VSS NC/DQS11* 147
201 VSS 201 VSS
204 155 DMA3 204 155 DMB3

co
C VSS DM3/DQS12 VSS DM3/DQS12 C
207 VSS NC/DQS12* 156 207 VSS NC/DQS12* 156
210 VSS 210 VSS
213 202 DMA4 213 202 DMB4
VSS DM4/DQS13 VSS DM4/DQS13
216 VSS NC/DQS13* 203 216 VSS NC/DQS13* 203
219 VSS 219 VSS
222 211 DMA5 222 211 DMB5
VSS DM5/DQS14 VSS DM5/DQS14
225 VSS NC/DQS14* 212 225 VSS NC/DQS14* 212
228 VSS 228 VSS
231 223 DMA6 231 223 DMB6
VSS DM6/DQS15 VSS DM6/DQS15
234 VSS NC/DQS15* 224 234 VSS NC/DQS15* 224
237 VSS 237 VSS

a.
51 232 DMA7 51 232 DMB7
VDDQ DM7/DQS16 VDDQ DM7/DQS16
56 VDDQ NC/DQS16* 233 56 VDDQ NC/DQS16* 233
62 VDDQ 62 VDDQ
72 VDDQ DM8/DQS17 164 72 VDDQ DM8/DQS17 164
75 VDDQ NC/DQS17* 165 75 VDDQ NC/DQS17* 165
78 VDDQ 78 VDDQ
191 3 MDA0 191 3 MDB0
VDDQ DQ(0) MDA[0..63] <5,8> VDDQ DQ(0)
DDR18V 194 4 MDA1 DDR18V 194 4 MDB1 MDB[0..63] <5,8>
VDDQ DQ(1) MDA2 VDDQ DQ(1) MDB2
181 VDDQ DQ(2) 9 181 VDDQ DQ(2) 9
175 10 MDA3 175 10 MDB3
VDDQ DQ(3) MDA4 VDDQ DQ(3) MDB4
170 VDDQ DQ(4) 122 170 VDDQ DQ(4) 122

si
53 123 MDA5 53 123 MDB5
VDD DQ(5) MDA6 VDD DQ(5) MDB6
59 VDD DQ(6) 128 59 VDD DQ(6) 128
64 129 MDA7 64 129 MDB7
VDD DQ(7) MDA8 VDD DQ(7) MDB8
197 VDD DQ(8) 12 197 VDD DQ(8) 12
69 13 MDA9 69 13 MDB9
VDD DQ(9) MDA10 VDD DQ(9) MDB10
172 VDD DQ(10) 21 172 VDD DQ(10) 21
187 22 MDA11 187 22 MDB11
VDD DQ(11) MDA12 VDD DQ(11) MDB12
184 VDD DQ(12) 131 184 VDD DQ(12) 131
178 132 MDA13 178 132 MDB13
VDD DQ(13) MDA14 VDD DQ(13) MDB14
189 VDD DQ(14) 140 189 VDD DQ(14) 140
67 141 MDA15 67 141 MDB15
DDR_VREF VDD DQ(15) DDR_VREF VDD DQ(15)

ne
24 MDA16 24 MDB16
DQ(16) MDA17 DQ(16) MDB17
18 RC1 DQ(17) 25 18 RC1 DQ(17) 25
55 30 MDA18 55 30 MDB18
C121 RC0 DQ(18) MDA19 C122 RC0 DQ(18) MDB19
VCC3 238 VDDSPD DQ(19) 31 VCC3 238 VDDSPD DQ(19) 31
0.1U/4/Y5V/16V/Z 1 143 MDA20 0.1U/4/Y5V/16V/Z 1 143 MDB20
MEM_SMBCLK VREF DQ(20) MDA21 MEM_SMBCLK VREF DQ(20) MDB21
<8,16> MEM_SMBCLK 120 SCL DQ(21) 144 <8,16> MEM_SMBCLK 120 SCL DQ(21) 144
MEM_SMBDATA 119 149 MDA22 MEM_SMBDATA 119 149 MDB22
<8,16> MEM_SMBDATA SDA DQ(22) <8,16> MEM_SMBDATA SDA DQ(22)
101 150 MDA23 101 150 MDB23
B SA2 DQ(23) MDA24 SA2 DQ(23) MDB24 B
VCC3 240 SA1 DQ(24) 33 VCC3 240 SA1 DQ(24) 33
239 34 MDA25 239 34 MDB25
SA0 DQ(25) MDA26 SA0 DQ(25) MDB26
DQ(26) 39 DQ(26) 39
do
SBAA1 190 40 MDA27 SBAB1 190 40 MDB27
<5,8,10> SBAA1 BA1 DQ(27) <5,8,10> SBAB1 BA1 DQ(27)
SBAA0 71 152 MDA28 SBAB0 71 152 MDB28
<5,8,10> SBAA0 BA0 DQ(28) <5,8,10> SBAB0 BA0 DQ(28)
153 MDA29 153 MDB29
DQ(29) MDA30 DQ(29) MDB30
171 CKE1 DQ(30) 158 171 CKE1 DQ(30) 158
CKEA1 52 159 MDA31 CKEB1 52 159 MDB31
<5,10> CKEA1 CKE0 DQ(31) <5,10> CKEB1 CKE0 DQ(31)
80 MDA32 80 MDB32
DQ(32) MDA33 DQ(32) MDB33
<5,10> -CSA3 76 S1* DQ(33) 81 <5,10> -CSB3 76 S1* DQ(33) 81
193 86 MDA34 193 86 MDB34
<5,10> -CSA2 S0* DQ(34) <5,10> -CSB2 S0* DQ(34)
87 MDA35 87 MDB35
-DCLKA5 DQ(35) MDA36 -DCLKB5 DQ(35) MDB36
<5,10> -DCLKA5 221 CK2*/RFU DQ(36) 199 <5,10> -DCLKB5 221 CK2*/RFU DQ(36) 199
DCLKA5 220 200 MDA37 DCLKB5 220 200 MDB37
<5,10> DCLKA5 CK2/RFU DQ(37) <5,10> DCLKB5 CK2/RFU DQ(37)
in

-DCLKA4 138 205 MDA38 -DCLKB4 138 205 MDB38


<5,10> -DCLKA4 CK1*/RFU DQ(38) <5,10> -DCLKB4 CK1*/RFU DQ(38)
DCLKA4 137 206 MDA39 DCLKB4 137 206 MDB39
<5,10> DCLKA4 CK1/RFU DQ(39) <5,10> DCLKB4 CK1/RFU DQ(39)
-DCLKA3 186 89 MDA40 -DCLKB3 186 89 MDB40
<5,10> -DCLKA3 CK0* DQ(40) <5,10> -DCLKB3 CK0* DQ(40)
DCLKA3 185 90 MDA41 DCLKB3 185 90 MDB41
<5,10> DCLKA3 CK0 DQ(41) <5,10> DCLKB3 CK0 DQ(41)
95 MDA42 95 MDB42
MAAA0 DQ(42) MDA43 MAAB0 DQ(42) MDB43
188 A0 DQ(43) 96 <5,8,10> MAAB[0..15] 188 A0 DQ(43) 96
<5,8,10> MAAA[0..15] MAAA1 183 208 MDA44 MAAB1 183 208 MDB44
MAAA2 A1 DQ(44) MDA45 MAAB2 A1 DQ(44) MDB45
63 A2 DQ(45) 209 63 A2 DQ(45) 209
MAAA3 182 214 MDA46 MAAB3 182 214 MDB46
MAAA4 A3 DQ(46) MDA47 MAAB4 A3 DQ(46) MDB47
61 A4 DQ(47) 215 61 A4 DQ(47) 215
MAAA5 60 98 MDA48 MAAB5 60 98 MDB48
A5 DQ(48) A5 DQ(48)
i-

MAAA6 180 99 MDA49 MAAB6 180 99 MDB49


MAAA7 A6 DQ(49) MDA50 MAAB7 A6 DQ(49) MDB50
58 A7 DQ(50) 107 58 A7 DQ(50) 107
MAAA8 179 108 MDA51 MAAB8 179 108 MDB51
MAAA9 A8 DQ(51) MDA52 MAAB9 A8 DQ(51) MDB52
177 A9 DQ(52) 217 177 A9 DQ(52) 217
MAAA10 70 218 MDA53 MAAB10 70 218 MDB53
MAAA11 A10/AP DQ(53) MDA54 MAAB11 A10/AP DQ(53) MDB54
57 A11 DQ(54) 226 57 A11 DQ(54) 226
MAAA12 176 227 MDA55 MAAB12 176 227 MDB55
MAAA13 A12 DQ(55) MDA56 MAAB13 A12 DQ(55) MDB56
196 A13 DQ(56) 110 196 A13 DQ(56) 110
MAAA14 174 111 MDA57 MAAB14 174 111 MDB57
MAAA15 A14 DQ(57) MDA58 MAAB15 A14 DQ(57) MDB58
173 A15 DQ(58) 116 173 A15 DQ(58) 116
SBAA2 54 117 MDA59 SBAB2 54 117 MDB59
<5,8,10> SBAA2 A16/BA2 DQ(59) <5,8,10> SBAB2 A16/BA2 DQ(59)
is

229 MDA60 229 MDB60


-SCASA DQ(60) MDA61 -SCASB DQ(60) MDB61
<5,8,10> -SCASA 74 CAS* DQ(61) 230 <5,8,10> -SCASB 74 CAS* DQ(61) 230
-SRASA 192 235 MDA62 -SRASB 192 235 MDB62
<5,8,10> -SRASA RSA* DQ(62) <5,8,10> -SRASB RSA* DQ(62)
-SWEA 73 236 MDA63 -SWEB 73 236 MDB63
<5,8,10> -SWEA WE* DQ(63) <5,8,10> -SWEB WE* DQ(63)
A A

DDR2/240/WH/VA/D DDR2/240/WH/VA/D
kn

GIGABYTE
Title
DDR3 CHANNEL B
Size Document Number Rev
GA-M52L-S3P 2.4
te

Custom

Date: Sheet 9 of 32
8 7 6 5 4 3 2 1
w.
ww
8 7 6 5 4 3 2 1

DDRVTT
DCLKA2
<5,8> DCLKA2 DDRVTT DCLKB2
<5,8> DCLKB2
MAAA3 RN5 8 7 47/8P4R/4 C102
MAAA1 6 5 1.5p/4/NPO/50V/C C104
MAAA2 4 3 -DCLKA2 MAAB6 RN0 8 7 47/8P4R/4 1.5p/4/NPO/50V/C
<5,8> -DCLKA2
2 1 MAAB3 6 5 -DCLKB2
<5,8> -DCLKB2
CKEA1 RN6 8 7 47/8P4R/4 MAAB4 4 3
CKEA0 6 5 DCLKA1 MAAB1 2 1
<5,8> DCLKA1
MAAA15 4 3 DCLKB1
<5,8> DCLKB1
MAAA7 2 1
C58 MAAB11 RN13 8 7 47/8P4R/4
D 1.5p/4/NPO/50V/C MAAB9 6 5 C105 D
-DCLKA1 MAAB7 4 3 1.5p/4/NPO/50V/C
<5,8> -DCLKA1
MAAB8 2 1 -DCLKB1
<5,8> -DCLKB1
RN8 8 7 47/8P4R/4
MAAA10 6 5 DCLKA0
<5,8> DCLKA0
MAAA0 4 3 CKEB1 RN14 8 7 47/8P4R/4 DCLKB0
<5,8> DCLKB0
SBAA1 2 1 MAAB15 6 5
C59 MAAB14 4 3
MAAA8 RN12 8 7 47/8P4R/4 1.5p/4/NPO/50V/C MAAB12 2 1 C116
MAAA6 6 5 -DCLKA0 1.5p/4/NPO/50V/C
<5,8> -DCLKA0
MAAA5 4 3 -DCLKB0
<5,8> -DCLKB0
MAAA4 2 1 SBAA2 RN16 8 7 47/8P4R/4
DCLKA5 MAAA12 6 5
<5,9> DCLKA5
-CSA2 RN17 8 7 47/8P4R/4 MAAA9 4 3 DCLKB5
<5,9> DCLKB5
-CSA0 6 5 MAAA11 2 1
-SWEA 4 3 C60
MODT_A0 2 1 1.5p/4/NPO/50V/C C117
-DCLKA5 -CSA1 R223 47/4/1 1.5p/4/NPO/50V/C
<5,9> -DCLKA5
-DCLKB5
<5,9> -DCLKB5
-SRASB RN9 8 7 47/8P4R/4 DCLKA4
DDRVTT DDR18V <5,9> DCLKA4
SBAB0 6 5 MODT_A1 RN18 8 7 47/8P4R/4 DCLKB4
<5,9> DCLKB4
-CSB2 4 3 MAAA13 6 5
DDRVTT C6 0.1U/4/Y5V/16V/Z -CSB0 2 1 C61 -CSA3 4 3
1.5p/4/NPO/50V/C -CSB1 2 1 C118
C12 0.1U/4/Y5V/16V/Z -DCLKA4 1.5p/4/NPO/50V/C
<5,9> -DCLKA4
BC7 22u/8/X5R/6.3V/M C11 0.1U/4/Y5V/16V/Z -DCLKB4
<5,9> -DCLKB4
-SCASA RN20 8 7 47/8P4R/4
BC5 22u/8/X5R/6.3V/M RN11 8 7 47/8P4R/4 DCLKA3 MODT_B1 6 5
<5,9> DCLKA3
C C35 0.1U/4/Y5V/16V/Z -SWEB 6 5 MODT_B0 4 3 DCLKB3 C
<5,9> DCLKB3
C1370 0.1U/4/Y5V/16V/Z MAAB13 4 3 -CSB3 2 1
-SCASB 2 1 C23
C18 0.1U/4/Y5V/16V/Z 1.5p/4/NPO/50V/C C120
C17 0.1U/4/Y5V/16V/Z -DCLKA3 1.5p/4/NPO/50V/C
<5,9> -DCLKA3
C29 0.1U/4/Y5V/16V/Z -DCLKB3
<5,9> -DCLKB3
C19 0.1U/4/Y5V/16V/Z
DDRVTT
C30 0.1U/4/Y5V/16V/Z

m
C34 0.1U/4/Y5V/16V/Z
C33 0.1U/4/Y5V/16V/Z

SBAA0 R25 47/4/1

co
MAAB2 R66 47/4/1
MAAB10 R63 47/4/1
SBAB1 R64 47/4/1
MAAB0 R68 47/4/1
MAAB5 R94 47/4/1
SBAB2 R71 47/4/1
MAAA14 R73 47/4/1
CKEB0 R74 47/4/1

-SRASA R80 47/4/1

a.
DDR18V DDR18V

B MAAA0 C37 22p/4/NPO/50V/J MAAB0 C73 22p/4/NPO/50V/J B


MAAA1 C36 22p/4/NPO/50V/J MAAB1 C72 22p/4/NPO/50V/J
MAAA2 C39 22p/4/NPO/50V/J MAAB2 C77 22p/4/NPO/50V/J
MAAA3 C38 22p/4/NPO/50V/J MAAB3 C76 22p/4/NPO/50V/J
MAAA4 C41 22p/4/NPO/50V/J MAAB4 C80 22p/4/NPO/50V/J
MAAA5 C40 22p/4/NPO/50V/J MAAB5 C78 22p/4/NPO/50V/J
MAAA6 C43 22p/4/NPO/50V/J MAAB6 C83 22p/4/NPO/50V/J
MAAA7 C42 22p/4/NPO/50V/J MAAB7 C81 22p/4/NPO/50V/J

si
MAAA8 C45 22p/4/NPO/50V/J MAAB8 C95 22p/4/NPO/50V/J
MAAA9 C44 22p/4/NPO/50V/J MAAB9 C85 22p/4/NPO/50V/J
MAAA10 C47 22p/4/NPO/50V/J MAAB10 C101 22p/4/NPO/50V/J
MAAA11 C46 22p/4/NPO/50V/J MAAB11 C100 22p/4/NPO/50V/J
MAAA12 C49 22p/4/NPO/50V/J MAAB12 C63 22p/4/NPO/50V/J
MAAA13 C48 22p/4/NPO/50V/J MAAB13 C62 22p/4/NPO/50V/J
MAAA14 C51 22p/4/NPO/50V/J MAAB14 C65 22p/4/NPO/50V/J
MAAA15 C50 22p/4/NPO/50V/J MAAB15 C64 22p/4/NPO/50V/J

ne
-SWEA C53 22p/4/NPO/50V/J -SWEB C67 22p/4/NPO/50V/J
<5,8,9> -SWEA <5,8,9> -SWEB
-SCASA C52 22p/4/NPO/50V/J -SCASB C66 22p/4/NPO/50V/J
<5,8,9> -SCASA <5,8,9> -SCASB
-SRASA C55 22p/4/NPO/50V/J -SRASB C69 22p/4/NPO/50V/J
<5,8,9> -SRASA <5,8,9> -SRASB
SBAA0 C54 22p/4/NPO/50V/J SBAB0 C68 22p/4/NPO/50V/J
SBAA1 C57 22p/4/NPO/50V/J SBAB1 C71 22p/4/NPO/50V/J
SBAA2 C56 22p/4/NPO/50V/J SBAB2 C70 22p/4/NPO/50V/J

MODT_B[0..1]
MODT_B[0..1] <5,8,9>
SBAA[0:2]
do
A A
SBAA[0:2] <5,8,9>
SBAB[0:2]
-CSA[0:3] SBAB[0:2] <5,8,9>
-CSA[0:3] <5,8,9>
-CSB[0:3]
CKEA[0:1] -CSB[0:3] <5,8,9>
CKEA[0:1] <5,8,9>
CKEB[0:1]
GIGABYTE
Title
CKEB[0:1] <5,8,9>
MAAA[0..15]
MAAA[0..15] <5,8,9> DDRII TERMINATOR
GA-M52L-S3P
MODT_A[0..1] MAAB[0..15] Size Document Number Rev
in

MODT_A[0..1] <5,8,9> MAAB[0..15] <5,8,9>


B 2.4
Date: Friday, July 09, 2010 Sheet 10 of 32
8 7 6 5 4 3 2 1
i-
is
kn
te
w.
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5 4 3 2 1

U1A

MCP61 1 of 8
L0_CADOUT_H0 AG8 AH23 L0_CADIN_H0
L0_CADOUT_H1 HT_MCP_RXD0_P HT_MCP_TXD0_P L0_CADIN_H1
AG9 HT_MCP_RXD1_P HT_MCP_TXD1_P AH22
L0_CADOUT_H2 AK9 AJ21 L0_CADIN_H2
L0_CADOUT_H3 HT_MCP_RXD2_P HT_MCP_TXD2_P L0_CADIN_H3
AJ10 HT_MCP_RXD3_P HT_MCP_TXD3_P AH21
L0_CADOUT_H4 AG12 AH19 L0_CADIN_H4
L0_CADOUT_H5 HT_MCP_RXD4_P HT_MCP_TXD4_P L0_CADIN_H5
AG13 HT_MCP_RXD5_P HT_MCP_TXD5_P AH18
D L0_CADIN_H[0..15] L0_CADOUT_H6 AK13 AJ17 L0_CADIN_H6 D
L0_CADIN_H[0..15] <4> HT_MCP_RXD6_P HT_MCP_TXD6_P
L0_CADOUT_H7 AJ14 AH17 L0_CADIN_H7
L0_CADIN_L[0..15] L0_CADOUT_H8 HT_MCP_RXD7_P HT_MCP_TXD7_P L0_CADIN_H8
L0_CADIN_L[0..15] <4> AB10 HT_MCP_RXD8_P HT_MCP_TXD8_P AF22
L0_CADOUT_H9 AD10 AB20 L0_CADIN_H9
L0_CADOUT_H10 HT_MCP_RXD9_P HT_MCP_TXD9_P L0_CADIN_H10
AF10 HT_MCP_RXD10_P HT_MCP_TXD10_P AC20
L0_CADOUT_H[0..15] L0_CADOUT_H11 AC12 AE20 L0_CADIN_H11
<4> L0_CADOUT_H[0..15] HT_MCP_RXD11_P HT_MCP_TXD11_P
L0_CADOUT_H12 AB11 AD18 L0_CADIN_H12
L0_CADOUT_L[0..15] L0_CADOUT_H13 HT_MCP_RXD12_P HT_MCP_TXD12_P L0_CADIN_H13
<4> L0_CADOUT_L[0..15] AB13 HT_MCP_RXD13_P HT_MCP_TXD13_P AF18
L0_CADOUT_H14 AF14 AB17 L0_CADIN_H14
L0_CADOUT_H15 HT_MCP_RXD14_P HT_MCP_TXD14_P L0_CADIN_H15
AE14 HT_MCP_RXD15_P HT_MCP_TXD15_P AC16

L0_CADOUT_L0 AH8 AJ23 L0_CADIN_L0


L0_CADOUT_L1 HT_MCP_RXD0_N HT_MCP_TXD0_N L0_CADIN_L1
AH9 HT_MCP_RXD1_N HT_MCP_TXD1_N AJ22
L0_CADOUT_L2 AJ9 AK21 L0_CADIN_L2
L0_CADOUT_L3 HT_MCP_RXD2_N HT_MCP_TXD2_N L0_CADIN_L3
AH10 HT_MCP_RXD3_N HT_MCP_TXD3_N AG21
L0_CADOUT_L4 AH12 AJ19 L0_CADIN_L4
L0_CADOUT_L5 HT_MCP_RXD4_N HT_MCP_TXD4_N L0_CADIN_L5
AH13 HT_MCP_RXD5_N HT_MCP_TXD5_N AJ18
L0_CADOUT_L6 AJ13 AK17 L0_CADIN_L6
L0_CADOUT_L7 HT_MCP_RXD6_N HT_MCP_TXD6_N L0_CADIN_L7
AH14 HT_MCP_RXD7_N HT_MCP_TXD7_N AG17
L0_CADOUT_L8 AC10 AG22 L0_CADIN_L8
L0_CADOUT_L9 HT_MCP_RXD8_N HT_MCP_TXD8_N L0_CADIN_L9
AE10 HT_MCP_RXD9_N HT_MCP_TXD9_N AB19
L0_CADOUT_L10 AG10 AD20 L0_CADIN_L10
L0_CADOUT_L11 HT_MCP_RXD10_N HT_MCP_TXD10_N L0_CADIN_L11
AD12 HT_MCP_RXD11_N HT_MCP_TXD11_N AF20
L0_CADOUT_L12 AC11 AE18 L0_CADIN_L12
L0_CADOUT_L13 HT_MCP_RXD12_N HT_MCP_TXD12_N L0_CADIN_L13
AB12 HT_MCP_RXD13_N HT_MCP_TXD13_N AG18
L0_CADOUT_L14 AG14 AB16 L0_CADIN_L14
L0_CADOUT_L15 HT_MCP_RXD14_N HT_MCP_TXD14_N L0_CADIN_L15
AD14 HT_MCP_RXD15_N HT_MCP_TXD15_N AD16 ?

C C

<4> L0_CLKOUT_H0 L0_CLKOUT_H0 AJ11 AH20 L0_CLKIN_H0 L0_CLKIN_H0 <4>


L0_CLKOUT_L0 HT_MCP_RX_CLK0_P HT_MCP_TX_CLK0_P L0_CLKIN_L0
<4> L0_CLKOUT_L0 AH11 HT_MCP_RX_CLK0_N HT_MCP_TX_CLK0_N AG20 L0_CLKIN_L0 <4>
L0_CLKOUT_H1 AE12 AC18 L0_CLKIN_H1
<4> L0_CLKOUT_H1 HT_MCP_RX_CLK1_P HT_MCP_TX_CLK1_P L0_CLKIN_H1 <4>
L0_CLKOUT_L1 AF12 AB18 L0_CLKIN_L1
<4> L0_CLKOUT_L1 HT_MCP_RX_CLK1_N HT_MCP_TX_CLK1_N L0_CLKIN_L1 <4>

<4> L0_CTLOUT_H0 L0_CTLOUT_H0 AJ15 AH16 L0_CTLIN_H0


HT_MCP_RXCTL0_P HT_MCP_TXCTL0_P L0_CTLIN_H0 <4>
<4> L0_CTLOUT_L0 L0_CTLOUT_L0 AH15 AG16 L0_CTLIN_L0
HT_MCP_RXCTL0_N HT_MCP_TXCTL0_N L0_CTLIN_L0 <4>
AB14 RESERVED35 RESERVED33 AE16

m
AC14 RESERVED36 RESERVED34 AF16

VCC3
VCC12_HT R146 150/4/1 HT_COMP1 AB9 AH25 -HT_REQ R209 8.2K/4
HT_MCP_COMP_VDD HT_MCP_REQ* -HTSTOP_L
HT_MCP_STOP* AH24 -HTSTOP_L <6>
R150 150/4/1 HT_COMP2 -CPURST

co
AB8 HT_MCP_COMP_GND HT_MCP_RST* AG23 -CPURST <6>
AG24 CPU_PWRGD CPU_PWRGD <6,28>
HT_MCP_PWRGD
-PROCHOT AD8 AK25 CPUCLK0_H CPUCLK0_H <6>
<6> -PROCHOT PROCHOT/GPIO20* CLKOUT_200MHZ_P
MCP61 shutdown when THERMTRIP_L tie to GND <6> THERMTRIP_L THERMTRIP_L AE8 THERMTRIP/GPIO58* CLKOUT_200MHZ_N AJ25 CPUCLK0_L CPUCLK0_L <6>

CPU_SBVREF AF24 VCC12


VCC12 FB4 0/6S/X VCC12_PLLHT AC15 BC677 0.1U/6/X7R/25V/K
+1.2V_PLL_CPU_HT CLKOUT_25MHZ
AB15 +3.3V_PLL_CPU CLKOUT_25MHZ AK26
CLKOUT_25MHZ BC3 4.7U/8/Y5V/10V/Z
AJ26 R85 2.37K/4/1
CLK200_TERM_GND

a.
C92 C93 nVidia comments
B
0.1U/6/X7R/25V/K 0.01U/4/X7R/25V/K B
NF520LE-A3/S

MCP61 Premium

FB49 0/6S/X
VCC3

BC15
C94 10U/8/X5R/6.3V/K

si
1U/6/Y5V/10V/Z

ne
N.B HEATSINK
COUPON1 COUPON1 1 2 COUPON/X
1

NB_HS
1

A A
VCC
do
COUPON2 COUPON2 1 2 COUPON/X

GIGABYTE
2

Title
2

MCP61D-HOST
Size Document Number Rev
BGASINK_NB/[12SP2-01A004-51R ] Custom GA-M52L-S3P 2.4
in

Date: Friday, July 09, 2010 Sheet 11 of 32


5 4 3 2 1
i-
is
kn
te
w.
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5 4 3 2 1

U1B
D D

MCP61 2 of 8
EXP_A_RXP0 H23 G29 EXP_A_TXP0 EXP_A_TXP[0..15]
PE0_RX0_P PE0_TX0_P EXP_A_TXP[0..15] <18>
EXP_A_RXP1 H25 H27 EXP_A_TXP1
EXP_A_RXP2 PE0_RX1_P PE0_TX1_P EXP_A_TXP2 EXP_A_TXN[0..15]
K22 PE0_RX2_P PE0_TX2_P J27 EXP_A_TXN[0..15] <18>
EXP_A_RXP3 K24 J30 EXP_A_TXP3
EXP_A_RXP4 PE0_RX3_P PE0_TX3_P EXP_A_TXP4
K26 PE0_RX4_P PE0_TX4_P K29
EXP_A_RXP5 M22 L29 EXP_A_TXP5
EXP_A_RXP6 PE0_RX5_P PE0_TX5_P EXP_A_TXP6 EXP_A_RXP[0..15]
M23 PE0_RX6_P PE0_TX6_P M27 EXP_A_RXP[0..15] <18>
EXP_A_RXP7 M26 N27 EXP_A_TXP7
EXP_A_RXP8 PE0_RX7_P PE0_TX7_P EXP_A_TXP8 EXP_A_RXN[0..15]
P22 PE0_RX8_P PE0_TX8_P N30 EXP_A_RXN[0..15] <18>
EXP_A_RXP9 P26 P29 EXP_A_TXP9
EXP_A_RXP10 PE0_RX9_P PE0_TX9_P EXP_A_TXP10
P25 PE0_RX10_P PE0_TX10_P R29
EXP_A_RXP11 T23 T27 EXP_A_TXP11
EXP_A_RXP12 PE0_RX11_P PE0_TX11_P EXP_A_TXP12
T26 PE0_RX12_P PE0_TX12_P U27
EXP_A_RXP13 U23 U30 EXP_A_TXP13
EXP_A_RXP14 PE0_RX13_P PE0_TX13_P EXP_A_TXP14
V24 PE0_RX14_P PE0_TX14_P V29
EXP_A_RXP15 V27 W29 EXP_A_TXP15
PE0_RX15_P PE0_TX15_P

EXP_A_RXN0 H24 G28 EXP_A_TXN0


EXP_A_RXN1 PE0_RX0_N PE0_TX0_N EXP_A_TXN1
H26 PE0_RX1_N PE0_TX1_N H28
EXP_A_RXN2 K23 J28 EXP_A_TXN2
EXP_A_RXN3 PE0_RX2_N PE0_TX2_N EXP_A_TXN3
K25 PE0_RX3_N PE0_TX3_N J29
EXP_A_RXN4 K27 K28 EXP_A_TXN4
EXP_A_RXN5 PE0_RX4_N PE0_TX4_N EXP_A_TXN5
L22 PE0_RX5_N PE0_TX5_N L28
EXP_A_RXN6 M24 M28 EXP_A_TXN6
EXP_A_RXN7 PE0_RX6_N PE0_TX6_N EXP_A_TXN7
M25 PE0_RX7_N PE0_TX7_N N28
EXP_A_RXN8 P23 N29 EXP_A_TXN8
EXP_A_RXN9 PE0_RX8_N PE0_TX8_N EXP_A_TXN9
P27 PE0_RX9_N PE0_TX9_N P28
C EXP_A_RXN10 P24 R28 EXP_A_TXN10 C
EXP_A_RXN11 PE0_RX10_N PE0_TX10_N EXP_A_TXN11
T24 PE0_RX11_N PE0_TX11_N T28
EXP_A_RXN12 T25 U28 EXP_A_TXN12
EXP_A_RXN13 PE0_RX12_N PE0_TX12_N EXP_A_TXN13
V23 PE0_RX13_N PE0_TX13_N U29
EXP_A_RXN14 V25 V28 EXP_A_TXN14
EXP_A_RXN15 PE0_RX14_N PE0_TX14_N EXP_A_TXN15
V26 PE0_RX15_N PE0_TX15_N W28

R28 8.2K/4/X
3VDUAL
B22 Y24 SRCCLK_3GIO
<18> -PCIE_WAKE PE_WAKE/GPIO21* PE0_REFCLK_P SRCCLK_3GIO <18>
AF27 Y23 -SRCCLK_3GIO
<18> -PE0_PRSNT_X1 PE0_PRSNTX1/SDVO_SCL* PE0_REFCLK_N -SRCCLK_3GIO <18>
<18> -PE0_PRSNT_X4 AF28 PE0_PRSNTX4/SDVO_SDA*
<18> -PE0_PRSNT_X8 AE26 PE0_PRSNTX8*
AF29 AC24 PECLK_A_TEST R151 100/4/X
<18> -PE0_PRSNT_X16 PE0_PRSNTX16* PE_A_TSTCLK_N

m
AC25 -PECLK_A_TEST
PE_A_TSTCLK_P
W22 AH29 -PCIE_RST
VCC12 +1.2V_PLL_PE_SS1 PE_RESET* -PCIE_RST <18>
Y22 +1.2V_PLL_PE_SS2
BC679 0.1U/6/X7R/25V/K AJ30 -PE_COMP R166 2.37K/4/1
BC678 0.01U/4/X7R/25V/K/X PE_CLK_COMP VCC3

co
U22 +1.2V_PLL_PE1 +3.3V_PLL_PE_SS1 R22
FB50 0/6S/X VCC12_PLL_PE_AVDD V22 T22 3V3_PLL_PE_SS SFB1 0/6S/X
VCC12 +1.2V_PLL_PE2 +3.3V_PLL_PE_SS2

NF520LE-A3/S MCP65 V
BC796 BC797
1U/6/Y5V/10V/Z 0.1U/6/X7R/25V/K SBC3 SBC4
0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K

a.
B B

si
A

ne A
do
GIGABYTE
Title
MCP61D-PCI_E
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 12 of 32
5 4 3 2 1
in
i-
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kn
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5 4 3 2 1

U1C

MCP61 3 of 8
PCIE_IP1 Y28 AA28 C7 0.1U/4/Y5V/16V/Z PCIE_OP1
<18> PCIE_IP1 PE1_RX_P PE1_TX_P PCIE_OP1 <18>
<18> PCIE_IN1 PCIE_IN1 Y27 AA27 C8 0.1U/4/Y5V/16V/Z PCIE_ON1
PE1_RX_N PE1_TX_N PCIE_ON1 <18>
<18> PCIE_IP2 PCIE_IP2 AB29 AA30 C26 0.1U/4/Y5V/16V/Z PCIE_OP2
PE2_RX_P PE2_TX_P PCIE_OP2 <18>
<18> PCIE_IN2 PCIE_IN2 AB28 AA29 C25 0.1U/4/Y5V/16V/Z PCIE_ON2
PE2_RX_N PE2_TX_N PCIE_ON2 <18>

R35 8.2K/4/X AK29 Y26 PCIE_CLK1


VCC3 PEA_CLKREQ/GPIO51* PE1_REFCLK_P PCIE_CLK1 <18>
Y25 -PCIE_CLK1
PE1_REFCLK_N -PCIE_CLK1 <18>
AB23 PCIE_CLK2
PE2_REFCLK_P PCIE_CLK2 <18>
PE1_PRSNT- AG28 AA23 -PCIE_CLK2
<18> PE1_PRSNT- PE1_PRSNT* PE2_REFCLK_N -PCIE_CLK2 <18>
PE2_PRSNT- AG30
<18> PE2_PRSNT- PE2_PRSNT*
D D
RESERVED5 AC29
AC27 PE_B_TSTCLK_P RESERVED6 AC28
AC26 PE_B_TSTCLK_N RESERVED7 AE27
RESERVED8 AE28
RESERVED16 AB24
AD27 RESERVED9 RESERVED17 AB25
AD28 RESERVED10 RESERVED18 AB27
AE30 RESERVED11 RESERVED19 AB26
AE29 RESERVED12
AJ29 MIITXD3 RN253 7 8 0/8P4R/SHT/X MII_TXD3 <31>
RESERVED13 MIITXD0 MIITXD2
AG29 RESERVED14 RGMII_TXD0/MII_TXD0 A28 5 6 MII_TXD2 <31>
AH30 B28 MIITXD1 MIITXD0 3 4 MII_TXD0 <31>
RESERVED15 RGMII_TXD1/MII_TXD1 MIITXD2 MIITXD1
RGMII_TXD2/MII_TXD2 D28 1 2 MII_TXD1 <31>
E27 MIITXD3
MII_RXD0 RGMII_TXD3/MII_TXD3 TX_CLK R96 22/4
<31> MII_RXD0 D26 RGMII_RXD0/MII_RXD0 RGMII_TXCLK/MII_TXCLK D27 TXCLK <31>
MII_RXD1 E26 E28 TX_CTL R97 0/4/SHT/X TXCTL <31>
<31> MII_RXD1 RGMII_RXD1/MII_RXD1 RGMII_TXCTL/MII_TXEN
<31> MII_RXD2 MII_RXD2 B26
MII_RXD3 RGMII_RXD2/MII_RXD2
<31> MII_RXD3 B27 RGMII_RXD3/MII_RXD3
RXCLK A26 B25 MDC
<31> RXCLK RGMII_RXCLK/MII_RXCLK RGMII/MII_MDC MDC <31>
RXCTL C26 A25 MDIO
<31> RXCTL RGMII_RXCTL/MII_RXDV RGMII/MII_MDIO MDIO <31>
F24 R100 1K/4/1 3VDUAL
ENREG_MII_RXER RGMII/MII_PWRDWN/GPIO37
<31> ENREG_MII_RXER D24 MII_RXER/GPIO36
MII_COL E24 C24
<31> MII_COL MII_COL/GPIO13/MI2C_DATA BUF_25MHZ
MII_CRS F23 R112
<31> MII_CRS MII_CRS/GPIO14/MI2C_CLK
C25 1K/4/1
MII_RESET/GPIO12* MII_RESET- <31>
R161 8.2K/4 MII_INTR- G24 C27 MII_VREF
3VDUAL RGMII/MII_INTR/GPIO35 MII_VREF
3VDUAL FB48 0/6S/X 3VDUAL_PLL_MAC M9
C +3.3V_PLL_MAC_DUAL R116 BC286 C
DDC_CLK/GPIO17 B6
10U/8/X5R/6.3V/K A6 1K/4/1 0.1U/6/X7R/25V/K
BC772 BC774 R46 49.9/4/1 M_CP DDC_DATA/GPIO19
3VDUAL B23 MII_COMP_3P3V
1U/6/Y5V/10V/Z R157 49.9/4/1 M_CG C23 MII_COMP_GND R89 8.2K/4
JTAG_TCK M7
JTAG_TDI M5
D30 DAC_RED JTAG_TDO M6
D29 DAC_GREEN JTAG_TMS M8
C30 L9 R114 8.2K/4
DAC_BLUE JTAG_TRST*
B30 K7 XTALIN XTALIN
DAC_HSYNC XTALIN XTALOUT
C29 DAC_VSYNC XTALOUT K8 XTALOUT

m
B29 K6 RTC_XI
XTALIN_RTC
DAC_RSET XTALIN_RTC RTC_XO
A29 DAC_VREF XTALOUT_RTC K5 XTALOUT_RTC
R88 R98 1M/4/X
F28 10M/4/X
+3.3V_DAC X3
NF520LE-A3/S 1 2

co
25M/20p/30ppm/49US/20/D

4
X2 X2
1 2
SHW/D0.64*5.08*6.74 C96 C97
32.768K/12.5p/20ppm/TF38/35K/D 18P/4/NPO/50V/J 18P/4/NPO/50V/J

3
C87 C88
15P/4/NPO/50V/J 15P/4/NPO/50V/J

a.
B B

si
A

ne A
do
Title
GIGABYTE
MCP61D-DAC, RGMII
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 13 of 32
5 4 3 2 1
in
i-
is
kn
te
w.
ww
5 4 3 2 1

-GNT4 R200 8.2K/4/X


<19,20> AD[0..31] VCC3
-REQ4 R81 8.2K/4
VCC3

U1D

MCP61 4 of 8
AD0 D14 G12 -REQ0 -PCIPME R78 8.2K/4/X
PCI_AD0 PCI_REQ0* -REQ0 <19> 3VDUAL
AD1 E14 A10 -REQ1
PCI_AD1 PCI_REQ1* -REQ1 <19>
AD2 A13 C11 -REQ2
PCI_AD2 PCI_REQ2/GPIO40/RS232_DSR* -REQ2 <19>
AD3 C14 H14 -REQ3
PCI_AD3 PCI_REQ3/GPIO38/RS232_CTS* -REQ3 <19>
AD4 A14 D13 -REQ4
PCI_AD4 PCI_REQ4/GPIO52/RS232_SIN* -REQ4 <20>
AD5 B14
AD6 PCI_AD5
D C15 PCI_AD6 D
AD7 J16 A9 -GNT0
PCI_AD7 PCI_GNT0* -GNT0 <19>
AD8 G16 C10 -GNT1
PCI_AD8 PCI_GNT1* -GNT1 <19>
AD9 F16 B10
AD10 PCI_AD9 PCI_GNT2/GPIO41/RS232_DTR* -GNT3 PCICLK4 C86 10P/4/N/50V/X
E16 PCI_AD10 PCI_GNT3/GPIO39/RS232_RTS* J14 -GNT3 <19>
AD11 B15 C12 -GNT4
AD12 PCI_AD11 PCI_GNT4/GPIO53/RS232_SOUT* -GNT4 <20> PCICLK5 C89 10P/4/N/50V/X
D16 PCI_AD12
AD13 C16
AD14 PCI_AD13 -INTA LPC33 C84 10P/4/NPO/50V/J
D17 PCI_AD14 PCI_INTW* C22 -INTA <19,20>
AD15 C17 D22 -INTB
PCI_AD15 PCI_INTX* -INTB <19,20>
AD16 J19 PCI_AD16 PCI_INTY* A22 -INTC
-INTC <19,20>
PCICLK_FB BC217 10P/4/N/50V/X EMI
AD17 J20 A21 -INTD
PCI_AD17 PCI_INTZ* -INTD <19,20>
AD18 H20
AD19 PCI_AD18
G20 PCI_AD19
AD20 F20 B13 PCLK0 R67 22/4 PCICLK1
PCI_AD20 PCI_CLK0 PCICLK1 <19>
AD21 E20 F14 PCLK1 R69 22/4 PCICLK2
PCI_AD21 PCI_CLK1 PCICLK2 <19>
AD22 B18 D12 PCLK2 R36 22/4 PCICLK5
PCI_AD22 PCI_CLK2 PCICLK5 <20>
AD23 C19 E12 PCLK3 R33 22/4 PCICLK4
PCI_AD23 PCI_CLK3 PCICLK4 <19>
AD24 D20 H12 PCLK4 R227 22/4
AD25 PCI_AD24 PCI_CLK4
C20 PCI_AD25
AD26 D21 J12 PCICLK_FB
AD27 PCI_AD26 PCI_CLKIN
C21 PCI_AD27
AD28 B21
AD29 PCI_AD28
H22 PCI_AD29
AD30 G22 ACZ_SDOUT R41 1K/4/1 nVidia comment
AD31 PCI_AD30 <16,24> ACZ_SDOUT
F22 PCI_AD31 -LFRAME R40 1K/4/1 nVidia comment
DDR18V
<19,20> -C_BE0
-C_BE0
-C_BE1
H16 PCI_CBE0* LAD0
BIOS STRAP:
<19,20> -C_BE1 B17 PCI_CBE1* LPC_AD0 G10 LAD[0..3] <29>
-C_BE2 A18 F10 LAD1 ACZ_SDOUT
<19,20> -C_BE2 PCI_CBE2* LPC_AD1
C -C_BE3 B19 D10 LAD2 -LFRAME R312 C
<19,20> -C_BE3 PCI_CBE3* LPC_AD2
E10 LAD3 8.2K/4
LPC_AD3
-FRAME C18 0 0 = LPC BIOS 2
<19,20> -FRAME PCI_FRAME*
-IRDY A17 01 = PCI BIOS 3 CPU_TMS
<19,20> -IRDY PCI_IRDY* CPU_TMS <6>
-TRDY D18 10 = SPI BIOS(Default) NV_TMS R75 100/4/1 1
<19,20> -TRDY PCI_TRDY* <16> NV_TMS
-STOP F18 11 = RESERVED
<19,20> -STOP PCI_STOP*
-DEVSEL E18 C8 NV_TCK Q78 PBC25
<19,20> -DEVSEL PCI_DEVSEL* LPC_PWRDWN#/GPIO54/EXT_NMI*

SOT23
PAR J18 H10 -LFRAME MMBT3904/SOT23/200mA/30 33P/4/NPO/50V/J/X
<19,20> PAR PCI_PAR LPC_FRAME* -LFRAME <29>
-PERR G18 C9 -LDRQ0
<19,20> -PERR PCI_PERR/GPIO43/RS232_DCD* LPC_DRQ0/GPIO50* -LDRQ0 <29>
-SERR H18 B9 -LDRQ1 R76 8.2K/4/X
<19,20> -SERR PCI_SERR* LPC_DRQ1/GPIO15/FANRPM1* VCC3
<19,20> -PCIPME -PCIPME E22 J10 SERIRQ
PCI_PME/GPIO30* LPC_SERIRQ SERIRQ <29>
nVidia comment

m
DDR18V
<19,20> -PPCIRST -PPCIRST R79 33/4 C13 PCI_RESET0*
G14 PCI_RESET1* R285
B11 8.2K/4
PCI_RESET2*

co
-IDERST R82 33/4 F12 E8 R84 33/4 LPC33 2
<22> -IDERST PCI_RESET3* LPC_CLK0 LPC33 <29>
3 CPU_TDI
CPU_TDI <6>
-LPCRST R83 33/4 D9 D8 NV_TDO R92 100/4/1 1
<29> -LPCRST LPC_RESET* LPC_CLK1 <16> NV_TDO

NF520LE-A3/S Q77 PBC26

SOT23
MMBT3904/SOT23/200mA/30 33P/4/NPO/50V/J/X

DDR18V

a.
B B

R301
8.2K/4

2
3 CPU_TCK
CPU_TCK <6>
NV_TCK R77 100/4/1 1

Q76

SOT23
MMBT3904/SOT23/200mA/30 PBC23
33P/4/NPO/50V/J/X

si
A

ne A
do
Title
GIGABYTE
MCP61D-PCI BUS
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 14 of 32
5 4 3 2 1
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5 4 3 2 1

D D

U1E

MCP61 5 of 8
SP_TX0P_C V2 AJ3 PDD0
SP_TX0M_C SATA_A0_TX_P IDE_DATA_P0 PDD1
V1 SATA_A0_TX_N IDE_DATA_P1 AJ2
AH3 PDD2 PDD[0..15]
IDE_DATA_P2 PDD[0..15] <22>
AH1 PDD3
SP_RX0M_C IDE_DATA_P3 PDD4 PDA[0..2]
W3 SATA_A0_RX_N IDE_DATA_P4 AG2 PDA[0..2] <22>
SP_RX0P_C W2 AF2 PDD5
SATA_A0_RX_P IDE_DATA_P5 PDD6
IDE_DATA_P6 AF4
AE6 PDD7
SP_TX1P_C IDE_DATA_P7 PDD8
Y8 SATA_A1_TX_P IDE_DATA_P8 AE5
SP_TX1M_C Y7 AF5 PDD9
SATA_A1_TX_N IDE_DATA_P9 PDD10
IDE_DATA_P10 AF3
AG1 PDD11
SP_RX1M_C IDE_DATA_P11 PDD12
Y5 SATA_A1_RX_N IDE_DATA_P12 AG3
SP_RX1P_C Y6 AH2 PDD13
SATA_A1_RX_P IDE_DATA_P13 PDD14
IDE_DATA_P14 AJ1
AK2 PDD15
SP_TX2P_C IDE_DATA_P15
Y4 SATA_B0_TX_P
SP_TX2M_C Y3 SATA_B0_TX_N PDA0
IDE_ADDR_P0 AG6
AJ5 PDA1
C SP_RX2M_C IDE_ADDR_P1 PDA2 C
AA4 SATA_B0_RX_N IDE_ADDR_P2 AH6
SP_RX2P_C AA3 SATA_B0_RX_P

SP_TX3P_C AA2 AK6 -PCS1


SATA_B1_TX_P IDE_CS1_P* -PCS1 <22>
SP_TX3M_C AA1 AJ6 -PCS3
SATA_B1_TX_N IDE_CS3_P* -PCS3 <22>
AG5 -PDDACK
IDE_DACK_P* -PDDACK <22>
AH4 -PDIOW
IDE_IOW_P* -PDIOW <22>
SP_RX3M_C AB1 AH5 IRQ14
SATA_B1_RX_N IDE_INTR_P IRQ14 <22>
SP_RX3P_C AB2 AK3 PDDREQ
SATA_B1_RX_P IDE_DREQ_P PDDREQ <22>
AJ4 -PDIOR
IDE_IOR_P* -PDIOR <22>
SATA B port is NC for MCP61D IDE_RDY_P AK4 PIORDY
PIORDY <22>
AC3 AF6 P66DET
RESERVED20 CABLE_DET_P/GPIO63 P66DET <22>

m
AC2 RESERVED21
AD4 RESERVED23
AD3 RESERVED22
AE4 AD5 IDE_COMP_3P3V R50 121/4/1
RESERVED24 IDE_COMP_3P3 VCC3
AE3 AD6 IDE_COMP_GND R51 121/4/1
RESERVED25 IDE_COMP_GND
AE1 RESERVED27

co
AE2 RESERVED26
A5 -SATA_LED
SATA_LED/GPIO57* -SATA_LED <26>
VCC3_PLL_SP_SS
FB41 VCC12_PLL_SP_VDD Y9
VCC12 +1.2V_PLL_SP_VDD
0/6S/X AA6 SPTSTCLK R242 100/4/X
10U/8/X5R/6.3V/K SATA_TSTCLK_P -SPTSTCLK nVidia comment
SATA_TSTCLK_N AB6
SBC1 SBC2 BC686 U13
VCC12 +1.2V_PLL_SP_SS
0.1U/4/Y5V/16V/Z/X 0.1U/4/Y5V/16V/Z BC685 U12
0.1U/6/X7R/25V/K +3.3V_PLL_SP_SS
V12 +3.3V_PLL_LEG
M12 AB5 SP_TERMP R253 2.49K/4/1
+3.3V_PLL_DISP SATA_TERMP

a.
B NF520LE-A3/S B
FB10 VCC3_PLL_SP_SS
VCC3
0/6S/X BC680
0.1U/6/X7R/25V/K

BC321
0.01U/4/X7R/25V/K/X
BC322
0.1U/6/X7R/25V/K
BC323
0.1U/6/X7R/25V/K
PCI LOADING

VCC3

si
EC1
1000U/D/6.3V/8C/30m

SATA2_0 SATA2_1
1 GND GND 7
SP_TX0P_C SC1 0.01U/4/X7R/25V/K 0.01U/4/X7R/25V/K SP_RX1P_C

ne
2 SC38
SP_TX0M_C SC3 0.01U/4/X7R/25V/K TX+ RX+ 6 0.01U/4/X7R/25V/K SC37 SP_RX1M_C
3 TX- RX- 5
4 GND GND 4
SP_RX0M_C SC32 0.01U/4/X7R/25V/K 5 0.01U/4/X7R/25V/K SC36 SP_TX1M_C
SP_RX0P_C SC33 0.01U/4/X7R/25V/K RX- TX- 3 0.01U/4/X7R/25V/K SC34 SP_TX1P_C
6 RX+ TX+ 2
7 GND GND 1
A A
SATA2/7/BU/H/OP/VA/D/1/B SATA2/7/BU/H/OP/VA/D/1/B

SATA2_2 SATA2_3
1 GND GND 7
do
SP_TX2P_C SC39 0.01u/4/X7R/25V/K/X 2 0.01u/4/X7R/25V/K/X SC46 SP_RX3P_C
SP_TX2M_C SC40 0.01u/4/X7R/25V/K/X TX+ RX+ 6 0.01u/4/X7R/25V/K/X SC45 SP_RX3M_C
3 TX- RX- 5
SP_RX2M_C SC41 0.01u/4/X7R/25V/K/X
4
5
GND
RX-
GND 4
TX- 3
0.01u/4/X7R/25V/K/X SC44 SP_TX3M_C GIGABYTE
SP_RX2P_C SC42 0.01u/4/X7R/25V/K/X 6 0.01u/4/X7R/25V/K/X SC43 SP_TX3P_C Title
RX+ TX+ 2
7 GND GND 1 MCP61D-SATA IDE
Size Document Number Rev
SATA2/7/BU/H/OP/VA/D/1/B/X SATA2/7/BU/H/OP/VA/D/1/B/X Custom
GA-M52L-S3P 2.4
Date: Monday, July 12, 2010 Sheet 15 of 32
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5 4 3 2 1

U1F VCC3

MCP61 6 of 8 MEM_SMBDATA R123 2.2K/4/1


B7 M3 +USBP0 +USBP1 RN59 1 2 15K/8P4R/4 MEM_SMBCLK R125 2.2K/4/1
GP_REFCLK USB0_P +USBP0 <23>
ACZ_BITCLK R2 33/4 B4 M4 -USBP0 -USBP1 3 4
<24> ACZ_BITCLK HDA_BCLK USB0_N -USBP0 <23>
+USBP0 5 6
N3 +USBP1 -USBP0 7 8
USB1_P +USBP1 <23>
ACZ_SDOUT R207 22/4 A3 N4 -USBP1
<14,24> ACZ_SDOUT HDA_SDATA_OUT0/GPIO45 USB1_N -USBP1 <23>
ACZ_SDIN0 A2
<24> ACZ_SDIN0 HDA_SDATA_IN0/GPIO22
B1 N1 +USBP2 +USBP3 RN60 1 2 15K/8P4R/4
HDA_SDATA_IN1/GPIO23/MGPIO0 USB2_P +USBP2 <31>
B2 N2 -USBP2 -USBP3 3 4
RESERVED28 USB2_N -USBP2 <31>
+USBP2 5 6
D R220 P1 +USBP3 -USBP2 7 8 D
USB3_P +USBP3 <31>
8.2K/4/X P2 -USBP3
USB3_N -USBP3 <31>
R2 +USBP4 +USBP5 RN61 1 2 15K/8P4R/4 3VDUAL
USB4_P +USBP4 <23>
R3 -USBP4 -USBP5 3 4 RN243
USB4_N -USBP4 <23>
+USBP4 5 6 -RI 1 2
P3 +USBP5 -USBP4 7 8 -LPCPME 3 4
USB5_P +USBP5 <23>
P4 -USBP5 -EXTSMI 5 6
USB5_N -USBP5 <23>
7 8
T3 +USBP6
USB6_P +USBP6 <23>
T4 -USBP6 +USBP7 RN62 1 2 15K/8P4R/4 8.2K/8P4R/4/X
USB6_N -USBP6 <23> -USBP7 3 4
U3 +USBP7 +USBP6 5 6
USB7_P +USBP7 <23> RTCVDD
-ACZ_RST R204 22/4 C3 U4 -USBP7 -USBP6 7 8
<24> -ACZ_RST HDA_RESET* USB7_N -USBP7 <23>
<24> ACZ_SYNC ACZ_SYNC R202 22/4 B3 HDA_SYNC/GPIO44 +USBP8 INTRUDER R110 49.9K/4/1
USB8_P T6
T5 -USBP8
NV_TMS USB8_N +USBP8 RN63 1
<14> NV_TMS
F2 GPIO_1 2 15K/8P4R/4
GPO2 F1 T8 +USBP9 -USBP8 3 4
<26> GPO2 GPIO_2/NMI* USB9_P -USBP9 -USBP9
F6 GPIO_3/SMI* USB9_N T7 5 6
J8 +USBP9 7 8
GPIO_4/SCI_INTR* 3VDUAL
G3 GPIO_5/INIT*
G5 GPIO_6/FERR/SYS_SERR* USB_OC0/GPIO25* P7 -USBOC <23>
G6 P8 SMBCLK R126 2.2K/4/1
GPIO_7/NFERR/SYS_PERR* USB_OC1/GPIO26* SMBDATA R127 2.2K/4/1
USB_OC2/GPIO27* P9 -USBOC1 <23>
USB_OC3/GPIO28/MGPIO1* P5
-ACZ_DET D3 P6
<24> -ACZ_DET GPIO_8/SPI_DI USB_OC4/GPIO29*
nVidia comment SPI_DO D4 GPIO_9/SPI_DO R99 1.1K/4/1
E4 GPIO_10/SPI_CS USB_RBIAS_GND T9
nVidia comment S_CLK E3 R95 8.2K/4/X -ACZ_RST R153 8.2K/4 VCC3
GPIO_11/SPI_CLK VCC3
SPI BIOS CLK STRAP: Check List
C
RESERVED32 H9 -AC_RST1=> 1=RGMII, 0=MII A20GATE R72 8.2K/4 C
SPI_MISO D5 AE7 -KBRST R7 8.2K/4/X
S_CLK RESERVED29 RESERVED31 nVidia comment
E5 RESERVED30 RESERVED2 V5
V4 R217 8.2K/4 ACZ_SYNC A20GATE pop for ITE CPU fan issue
RESERVED1 VCC3 SB_PWOK
RESERVED4 V7
00 = 500Khz RESERVED3 V6 ACZ_SYNC=> 1=SIO_CLK:24MHZ, 0:14.318MHZ CK8_PWOK
01 = 1.8Mhz
10 = 2.5Mhz
11 = 25Mhz (Default) nVidia comment 3VDUAL F5 A20GATE C1064 C1065 DA-03265-001_v01
A20GATE/GPIO55 A20GATE <29>
K2 INTRUDER 1U/4/X5R/6.3V/K 1M/4
SPI_DO R230 8.2K/4 INTRUDER* -EXTSMI
EXT_SMI/GPIO32* F3
RI/GPIO33* H4 -RI <22>
S_CLK R235 8.2K/4 C7 SPKR SMBCLK
SPKR SPKR <26>

m
G4 -SB_PWRBTN R6 0/6/SHT/X SMBDATA
PWRBTN* -PSOUT <29>
F4 -LPCPME
SIO_PME/GPIO31* -LPCPME <29>
A4 -KBRST -SB_PWRBTN
KBRDRSTIN/GPIO56* -KBRST <29> C1050 C1051
100P/4/N/50V/X 100P/4/N/50V/X
C2 MEM_SMBCLK C1301
SMB_CLK0 MEM_SMBCLK <8,9>

co
C1 MEM_SMBDATA MEM_SMBDATA <8,9> 470P/4/X/25V/X
SMB_DATA0 SMBCLK MEM_SMBDATA
SMB_CLK1/MSMB_CLK D2 SMBCLK <18,26,28>
E2 SMBDATA MEM_SMBCLK
SMB_DATA1/MSMB_DATA SMBDATA <18,26,28>
+3.3V_VBAT K3 RTCVDD
B5 BUF_24M R120 33/4
BUF_SIO_CLK LPC24 <29>
E1 SUSCLK C98 10P/4/NPO/50V/J C1052 C1053
SUS_CLK/GPIO34
-RTC_RST K4 RTC_RST* THERM/GPIO59* C6 -THRMO
-THRMO <29> EMI 100P/4/N/50V/X 100P/4/N/50V/X
H5 RSTBTN- R121 22/4
RSTBTN* -SYS_RST <26,29>
J3 H8 C99 22P/4/N/50V/X
<26,30> -SLP_S5 MEM_VLD SLP_S5* -SLP_S5 <26,30>
HT1_VLD H3 G8
<26,28> HT1_VLD HT_VLD SLP_S3* -SLP_S3 <27,29,30>
HTVDD_EN J4 H6
<30> HTVDD_EN MCPVDD_EN PWRGD_SB SB_PWOK <26>
CPU_VLD J1 G2
<26> CPU_VLD CK8_PWOK <26>

a.
B CPUVDD_EN CPU_VLD PWRGD NV_TDO R29 B
<28> CPUVDD_EN J2 CPUVDD_EN FANRPM0/GPIO60 E6 NV_TDO <14>
D6 22K/4
FANCTL0/GPIO61
FANCTL1/GPIO62 C5 For S3 Giltch potential
L8 AH7 R48 22/4/X SUSCLK R219 8.2K/4/X
PKG_TEST THERM_SIC/GPIO48 SI_CLK <6>
R156 1K/4/1 F8 AF8 R70 22/4/X
TEST_MODE_EN THERM_SID/GPIO49 SI_DAT <6>

NF520LE-A3/S

si
20mil
Q4 RTCVDD
RN250 VCC3
3VDUAL
1 2 20mil R232 49.9K/4/1 -RTC_RST
<29> VBAT 3 4
VBAT_2 RB 1K/4/1 5 6
BAT54C/SOT23/200mA

ne
7 8 R250 SPKR
BC12 BC21 3VDUAL 1K/4/X
20mil 110/8P4R/4 22u/8/X5R/6.3V/M/X BC216 SPKR ROM TABLE SELECT
20mil BC783 4.7U/8/Y5V/10V/Z 0.1U/6/X7R/25V/K GPO2 R214 8.2K/4
0.1U/6/X7R/25V/K
R244 0:USER
1

1K/4/1
A
BAT 1:SAFE DEFAULT A
BAT-SK/BK/P/S/D/SN CLR_CMOS CLR_CMOS
-RTC_RST
SHORT CLEAR CMOS
2

CR2032 BAT
do
CR2032 OPEN NORMAL PH/1*2/BK/2.54/VA/D
+
GIGABYTE
NOT ADD ICT FOR RTCVDD PIN Title
GPIO10,11:RSMRST#-->LOW
SO POWER PLUG,LOCKER NO CHANGE; MCP61D-USB,HD_AUDIO
LOCKER MOVE BY TRIGGER(TEST Size Document Number Rev
TIMING)
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 16 of 32
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5 4 3 2 1

VCC12

U1H VCC12 VCC12 VCC12 VCC12_DUAL


U1G
MCP61 8 of 8
P19 GND1 GND74 M15 MCP61 7 of 8 SBC26 SBC27 SBC28 SBC30
H19 AK14 AK27 W15 1U/6/Y5V/10V/Z 1U/6/Y5V/10V/Z 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K SBC6
GND2 GND75 +1.2V1 +1.2V_HT1 FB43 1U/6/Y5V/10V/Z
AE11 GND3 GND76 P15 AH27 +1.2V2 +1.2V_HT2 W16
D7 W6 AJ27 W17 0/6S/X
GND4 GND77 +1.2V3 +1.2V_HT3 1P2VPEA_PWR
G27 GND5 GND78 N19 AG26 +1.2V4
AB7 GND6 GND79 AC8 AG25 +1.2V5
T15 N12 U18 AK28 1P2VPEA_PWR
GND7 GND80 +1.2V6 +1.2V_PEA1
D U2 GND8 GND81 N14 AE22 +1.2V7 +1.2V_PEA2 AJ28 D
P13 GND9 GND82 P14 AE23 +1.2V8 +1.2V_PEA3 AH28
AC9 M14 V19 AG27 VCC12
GND10 GND83 +1.2V9 +1.2V_PEA4
N25 GND11 GND84 M13 V18 +1.2V10 +1.2V_PEA5 AF26
G26 GND12 GND85 U1 U19 +1.2V11 +1.2V_PEA6 AE25
F17 GND13 GND86 R9 W19 +1.2V12 +1.2V_PEA7 AD24
F15 GND14 GND87 N9 W18 +1.2V13 +1.2V_PEA8 AC23
F13 GND15 GND88 P12 V15 +1.2V14
F11 D23 U16 BC704 BC705 BC706 BC707 BC708 BC709 BC701
GND16 GND89 +1.2V15 VCC12 1U/6/Y5V/10V/Z 1U/6/Y5V/10V/Z 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K 4.7U/8/Y5V/10V/Z 22U/8/X5R/6.3V/M 0.1U/6/X7R/25V/K
F9 GND17 GND90 AK30 T14 +1.2V16
D25 GND18 GND91 H7 W14 +1.2V17
H17 A30 AB21 V13 VCC12
GND19 GND92 +1.2V18 +1.2V_SP_D1
D19 GND20 GND93 AB3 AC21 +1.2V19 +1.2V_SP_D2 W13
J17 GND21 GND94 K9 U14 +1.2V20 +1.2V_SP_D3 V14
H13 GND22 GND95 F30 T18 +1.2V21 +1.2V_SP_D4 W12
AH26 N8 U15 FB45
GND23 GND96 +1.2V22 0/6S/X
AA9 GND24 GND97 F7 R15 +1.2V23
AE21 J21 V17 1P2VPLL_PWR
GND25 GND98 +1.2V24 VCC3
AE19 GND26 GND99 K1 V16 +1.2V25
AE17 AB30 R17 W9 1P2VPLL_PWR 1P2VPLL_PWR
GND27 GND100 +1.2V26 +1.2V_SP_A1
AE15 GND28 GND101 V30 T16 +1.2V27 +1.2V_SP_A2 W8
AE13 GND29 GND102 P30 U17 +1.2V28 +1.2V_SP_A3 V8
AA8 GND30 GND103 K30 R19 +1.2V29 +1.2V_SP_A4 V9
AF30 GND31 GND104 H21 +1.2V_SP_A5 U9
AK22 AD26 BC711 BC712 BC714 BC715 BC716 BC792 SBC33
GND32 GND105 VCC12_DUAL 1U/6/Y5V/10V/Z 0.1U/6/X7R/25V/K 4.7U/8/Y5V/10V/Z 4.7U/8/Y5V/10V/Z 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K
AG19 GND33 GND106 AA25
AK18 GND34 GND107 W25 AB22 +1.2V_PED1
AG15 GND35 GND108 U25 AE24 +1.2V_PED2 +1.2V_DUAL1 F26
C4 GND36 GND109 R25 AD22 +1.2V_PED3 +1.2V_DUAL2 F27
E30 GND37 GND110 L25 AA22 +1.2V_PED4
D15 GND38 GND111 J25 AC22 +1.2V_PED5
C 3VDUAL C
D11 GND39 GND112 W27
J6 GND40 GND113 N13
L6 GND41 GND114 R27 +3.3V_DUAL1 L4
N6 GND42 GND115 L27 +3.3V_DUAL2 J22
R6 W23 VCC3
GND43 GND116
U6 GND44 GND117 U8
N22 GND45 GND118 J9 H15 +3.3V1
R13 GND46 GND119 AE9 J15 +3.3V2
M19 AG7 AC6 L3 1P2VPEA_PWR
GND47 GND120 +3.3V3 +3.3V_USB_DUAL1
AK1 GND48 GND121 F25 AC5 +3.3V4 +3.3V_USB_DUAL2 L2
J23 GND49 GND122 P18
R23 GND50 GND123 F21
M18 F19 NF520LE-A3/S
GND51 GND124

m
N18 GND52 GND125 F29
P16 AK5 BC718 BC719 BC720 BC721 BC722 BC723
GND53 GND126 1U/6/Y5V/10V/Z 1U/6/Y5V/10V/Z 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K 4.7U/8/Y5V/10V/Z 22U/8/X5R/6.3V/M
N15 GND54 GND127 R4
R18 GND55 GND128 V3
T13 GND56 GND129 W4
T17 GND57 GND130 AC4

co
M17 GND58 GND131 C28
L23 GND59 GND132 T19
P17 GND60 GND133 AC13
J11 GND61 GND134 AK10
R16 GND62 GND135 AF1
A1 GND63 GND136 AG4
J13 GND64 GND137 R8
M16 A27 VCC12_HT
GND65 GND138
N16 GND66 GND139 H11
N17 GND67 GND140 D1
AG11 GND68 GND141 AC19
N23 AC17

a.
B GND69 GND142 B
R14 GND70 GND143 E29
T12 AJ7 BC724 BC725 BC726 BC727 BC728 BC729
GND71 GND144 1U/6/Y5V/10V/Z 1U/6/Y5V/10V/Z 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K 4.7U/8/Y5V/10V/Z 4.7U/8/Y5V/10V/Z
R12 GND72 GND145 AB4
AC7 GND73

NF520LE-A3/S

si
A

ne A
do
GIGABYTE
Title
MCP61D-PWR,GND
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 17 of 32
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+12V 3GIO_*16 EXP_A_RXP[0..15]


EXP_A_RXP[0..15] <12>
PCIEX16 +12V EXP_A_TXP0 C127 0.1U/4/Y5V/16V/Z EXP_A_TXP0C
B1 A1 EXP_A_RXN[0..15] EXP_A_TXN0 C128 0.1U/4/Y5V/16V/Z EXP_A_TXN0C
12V PRSNT1* EXP_A_RXN[0..15] <12>
B2 A2 EXP_A_TXP1 C129 0.1U/4/Y5V/16V/Z EXP_A_TXP1C
Burn protect. 12V 12V EXP_A_TXP[0..15] EXP_A_TXN1 C130 0.1U/4/Y5V/16V/Z EXP_A_TXN1C
B3 RSVD 12V A3 EXP_A_TXP[0..15] <12>
R117 0/4/SHT/X B4 A4 R115 0/4/SHT/X EXP_A_TXP2 C131 0.1U/4/Y5V/16V/Z EXP_A_TXP2C
SMBCLK GND GND EXP_A_TXN[0..15] EXP_A_TXN2 C132 0.1U/4/Y5V/16V/Z EXP_A_TXN2C
<16,26,28> SMBCLK B5 SMCLK JTAG2 A5 EXP_A_TXN[0..15] <12>
SMBDATA B6 A6 VCC3 EXP_A_TXP3 C133 0.1U/4/Y5V/16V/Z EXP_A_TXP3C
<16,26,28> SMBDATA SMDAT JTAG3
B7 A7 EXP_A_TXN3 C134 0.1U/4/Y5V/16V/Z EXP_A_TXN3C
GND JTAG4 EXP_A_TXP4 C135 0.1U/4/Y5V/16V/Z EXP_A_TXP4C
VCC3 B8 3.3V JTAG5 A8
B9 A9 EXP_A_TXN4 C136 0.1U/4/Y5V/16V/Z EXP_A_TXN4C
JTAG1 3.3V EXP_A_TXP5 C137 0.1U/4/Y5V/16V/Z EXP_A_TXP5C
3VDUAL B10 3.3VAUX 3.3V A10
-PCIE_WAKE B11 A11 -PCIE_RST EXP_A_TXN5 C138 0.1U/4/Y5V/16V/Z EXP_A_TXN5C
<12> -PCIE_WAKE WAKE* PWRGD -PCIE_RST <12>
D KEY EXP_A_TXP6 C139 0.1U/4/Y5V/16V/Z EXP_A_TXP6C D
EXP_A_TXN6 C140 0.1U/4/Y5V/16V/Z EXP_A_TXN6C
B12 A12 EXP_A_TXP7 C141 0.1U/4/Y5V/16V/Z EXP_A_TXP7C
RSVD GND EXP_A_TXN7 C142 0.1U/4/Y5V/16V/Z EXP_A_TXN7C
B13 GND REFCLK+ A13 SRCCLK_3GIO <12>
EXP_A_TXP0C B14 A14 EXP_A_TXP8 C143 0.1U/4/Y5V/16V/Z EXP_A_TXP8C
HSOP0 REFCLK- -SRCCLK_3GIO <12>
EXP_A_TXN0C B15 A15 EXP_A_TXN8 C144 0.1U/4/Y5V/16V/Z EXP_A_TXN8C
HSON0 GND
Pull-up at NB page. B16 GND HSIP0 A16 EXP_A_RXP0 EXP_A_TXP9 C145 0.1U/4/Y5V/16V/Z EXP_A_TXP9C
-PE0_PRSNT_X1 B17 A17 EXP_A_RXN0 EXP_A_TXN9 C146 0.1U/4/Y5V/16V/Z EXP_A_TXN9C
<12> -PE0_PRSNT_X1 PRSNT2* HSIN0 +12V +12V
B18 A18 3VDUAL EXP_A_TXP10 C147 0.1U/4/Y5V/16V/Z EXP_A_TXP10C
GND GND EXP_A_TXN10 C148 0.1U/4/Y5V/16V/Z EXP_A_TXN10C
EXP_A_TXP11 C149 0.1U/4/Y5V/16V/Z EXP_A_TXP11C
EXP_A_TXP1C B19 A19 1 1 EXP_A_TXN11 C150 0.1U/4/Y5V/16V/Z EXP_A_TXN11C
EXP_A_TXN1C HSOP1 RSVD + EC167 + EC152 EXP_A_TXP12 C151 0.1U/4/Y5V/16V/Z EXP_A_TXP12C
B20 HSON1 GND A20
B21 A21 EXP_A_RXP1 470U/D/16V/8C/36m 470U/D/16V/8C/36m/X BC359 EXP_A_TXN12 C153 0.1U/4/Y5V/16V/Z EXP_A_TXN12C
GND HSIP1 EXP_A_RXN1 0.1U/6/X7R/25V/K EXP_A_TXP13 C155 0.1U/4/Y5V/16V/Z EXP_A_TXP13C
B22 GND HSIN1 A22
EXP_A_TXP2C B23 A23 EXP_A_TXN13 C156 0.1U/4/Y5V/16V/Z EXP_A_TXN13C
EXP_A_TXN2C HSOP2 GND EXP_A_TXP14 C157 0.1U/4/Y5V/16V/Z EXP_A_TXP14C
B24 HSON2 GND A24
B25 A25 EXP_A_RXP2 EXP_A_TXN14 C158 0.1U/4/Y5V/16V/Z EXP_A_TXN14C
GND HSIP2 EXP_A_RXN2 EXP_A_TXP15 C159 0.1U/4/Y5V/16V/Z EXP_A_TXP15C
B26 GND HSIN2 A26
EXP_A_TXP3C B27 A27 EXP_A_TXN15 C160 0.1U/4/Y5V/16V/Z EXP_A_TXN15C
EXP_A_TXN3C HSOP3 GND
B28 HSON3 GND A28
B29 A29 EXP_A_RXP3
GND HSIP3 EXP_A_RXN3
B30 RSVD HSIN3 A30
<12> -PE0_PRSNT_X4 B31 PRSNT2* GND A31
B32 GND RSVD A32

EXP_A_TXP4C B33 A33


EXP_A_TXN4C HSOP4 RSVD
B34 HSON4 GND A34 PCIEX1_1 3GIO_X1
B35 A35 EXP_A_RXP4
GND HSIP4 EXP_A_RXN4
B36 GND HSIN4 A36
EXP_A_TXP5C B37 A37 B1 A1
HSOP5 GND +12V 12V PRSNT1*
C EXP_A_TXN5C B38 A38 B2 A2 +12V
C
HSON5 GND EXP_A_RXP5 Burn protect. 12V 12V
B39 GND HSIP5 A39 B3 RSVD 12V A3
B40 A40 EXP_A_RXN5 R113 0/4/SHT/X B4 A4 R111 0/4/SHT/X
EXP_A_TXP6C GND HSIN5 SMBCLK GND GND
B41 HSOP6 GND A41 <16,26,28> SMBCLK B5 SMCLK JTAG2 A5
EXP_A_TXN6C B42 A42 SMBDATA B6 A6
HSON6 GND <16,26,28> SMBDATA SMDAT JTAG3
B43 A43 EXP_A_RXP6 B7 A7
GND HSIP6 EXP_A_RXN6 GND JTAG4
B44 GND HSIN6 A44 VCC3 B8 3.3V JYAG5 A8
EXP_A_TXP7C B45 A45 B9 A9
HSOP7 GND JTAG1 3.3V VCC3
EXP_A_TXN7C B46 A46 B10 A10
HSON7 GND 3VDUAL 3.3VAUX 3.3V
B47 A47 EXP_A_RXP7 B11 A11 -PCIE_RST
GND HSIP7 <12> -PCIE_WAKE WAKE* PWRGD -PCIE_RST <12>
B48 A48 EXP_A_RXN7
<12> -PE0_PRSNT_X8 PRSNT2* HSIN7
B49 GND GND A49 KEY
B12 RVSD GND A12

m
B13 GND REFCLK+ A13 PCIE_CLK1 <13>
<13> PCIE_OP1 B14 HSOP0 REFCLK- A14 -PCIE_CLK1 <13>
EXP_A_TXP8C B50 A50 B15 A15
HSOP8 RSVD <13> PCIE_ON1 HSON0 GND
EXP_A_TXN8C B51 A51 B16 A16
HSON8 GND GND HSIP0 PCIE_IP1 <13>
B52 A52 EXP_A_RXP8 PE1_PRSNT- B17 A17
GND HSIP8 <13> PE1_PRSNT- PRSNT2* HSIN0 PCIE_IN1 <13>
B53 A53 EXP_A_RXN8 B18 A18
GND HSIN8 GND GND

co
EXP_A_TXP9C B54 A54
EXP_A_TXN9C HSOP9 GND
B55 HSON9 GND A55
B56 A56 EXP_A_RXP9
GND HSIP9 EXP_A_RXN9 PCI-E/1X-36P/WH/OL
B57 GND HSIN9 A57
EXP_A_TXP10C B58 A58
EXP_A_TXN10C HSOP10 GND
B59 HSON10 GND A59
B60 A60 EXP_A_RXP10
GND HSIP10 EXP_A_RXN10
B61 GND HSIN10 A61 PCIEX1_2 3GIO_X1
EXP_A_TXP11C B62 A62
EXP_A_TXN11C HSOP11 GND
B63 HSON11 GND A63
B64 A64 EXP_A_RXP11 B1 A1
GND HSIP11 +12V 12V PRSNT1*
B65 A65 EXP_A_RXN11 B2 A2 +12V

a.
B EXP_A_TXP12C GND HSIN11 Burn protect. 12V 12V B
B66 HSOP12 GND A66 B3 RSVD 12V A3
EXP_A_TXN12C B67 A67 R26 0/4/SHT/X B4 A4 R109 0/4/SHT/X
HSON12 GND EXP_A_RXP12 SMBCLK GND GND
B68 GND HSIP12 A68 <16,26,28> SMBCLK B5 SMCLK JTAG2 A5
B69 A69 EXP_A_RXN12 SMBDATA B6 A6
GND HSIN12 <16,26,28> SMBDATA SMDAT JTAG3
EXP_A_TXP13C B70 A70 B7 A7
EXP_A_TXN13C HSOP13 GND GND JTAG4
B71 HSON13 GND A71 VCC3 B8 3.3V JYAG5 A8
B72 A72 EXP_A_RXP13 B9 A9
GND HSIP13 JTAG1 3.3V VCC3
B73 A73 EXP_A_RXN13 3VDUAL B10 A10
EXP_A_TXP14C GND HSIN13 3.3VAUX 3.3V -PCIE_RST
B74 HSOP14 GND A74 <12> -PCIE_WAKE B11 WAKE* PWRGD A11 -PCIE_RST <12>
EXP_A_TXN14C B75 A75
HSON14 GND EXP_A_RXP14
B76 GND HSIP14 A76 KEY
B77 A77 EXP_A_RXN14 B12 A12

si
EXP_A_TXP15C GND HSIN14 RVSD GND
B78 HSOP15 GND A78 B13 GND REFCLK+ A13 PCIE_CLK2 <13>
EXP_A_TXN15C B79 A79 B14 A14
HSON15 GND <13> PCIE_OP2 HSOP0 REFCLK- -PCIE_CLK2 <13>
B80 A80 EXP_A_RXP15 B15 A15
GND HSIP15 <13> PCIE_ON2 HSON0 GND
B81 A81 EXP_A_RXN15 B16 A16
<12> -PE0_PRSNT_X16 PRSNT2* HSIN15 GND HSIP0 PCIE_IP2 <13>
B82 A82 PE2_PRSNT- B17 A17
RSVD GND <13> PE2_PRSNT- PRSNT2* HSIN0 PCIE_IN2 <13>
B18 GND GND A18

PCI-E/1X-36P/WH/OL

PCI-E/16X-164P/BU/LOWR EJECTOR

A
+12V
VCC3 -PCIE_RST

ne A
do
EC161 1000U/D/6.3V/8C/30m
+
VCC3
BC290 BC781 BC782 BC292 BC293 BC294 C1151
0.1U/6/X7R/25V/K
0.1U/6/X7R/25V/K
0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K/X 0.1U/6/X7R/25V/K 100P/4/N/50V/X
GIGABYTE
Title
PCI EXPRESS X 16
Size Document Number Rev
Custom GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 18 of 32
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PCI SLOT 1,2,3 AD[0..31] VCC3 VCC3


<14,20> AD[0..31]

VCC3 VCC3
VCC -12V
PCI SLOT2 +12V VCC
VCC3 -12V
PCI SLOT3 +12V VCC3

PCI SLOT1
PCI2
VCC -12V +12V VCC B1 A1 PCI3
-12V TRST VCC VCC
B2 TCK +12V A2 B1 -12V TRST A1
B3 GND TMS A3 B2 TCK +12V A2
PCI1 B4 A4 B3 A3
TDO TDI GND TMS
B1 -12V TRST A1 B5 +5V +5V A5 B4 TDO TDI A4
B2 TCK +12V A2 B6 +5V INTA A6 -INTB <14,20> B5 +5V +5V A5
D B3 GND TMS A3 <14,20> -INTC B7 INTB INTC A7 -INTD <14,20> B6 +5V INTA A6 -INTC <14,20> D
B4 TDO TDI A4 <14,20> -INTA B8 INTD +5V A8 <14,20> -INTD B7 INTB INTC A7 -INTA <14,20>
B5 +5V +5V A5 B9 PRSNT1 RESERVED A9 <14,20> -INTB B8 INTD +5V A8
B6 +5V INTA A6 -INTA <14,20> B10 RESERVED +5V A10 B9 PRSNT1 RESERVED A9
<14,20> -INTB B7 INTB INTC A7 -INTC <14,20> B11 PRSNT2 RESERVED A11 B10 RESERVED +5V A10
<14,20> -INTD B8 INTD +5V A8 B12 GND GND A12 B11 PRSNT2 RESERVED A11
B9 PRSNT1 RESERVED A9 B13 GND GND A13 B12 GND GND A12
B10 RESERVED +5V A10 B14 RESERVED 3.3V_AUX A14 3VDUAL B13 GND GND A13
B11 PRSNT2 RESERVED A11 B15 GND RST A15 -PPCIRST <14,20> B14 RESERVED 3.3V_AUX A14 3VDUAL
B12 GND GND A12 <14> PCICLK2 B16 CLK +5V A16 B15 GND RST A15 -PPCIRST <14,20>
B13 GND GND A13 B17 GND GNT A17 -GNT1 <14> <14> PCICLK4 B16 CLK +5V A16
B14 RESERVED 3.3V_AUX A14 3VDUAL <14> -REQ1
B18 REQ GND A18 B17 GND GNT A17 -GNT3 <14>
B15 GND RST A15 -PPCIRST <14,20>
B19 +5V PME A19 -PCIPME <14,20> <14> -REQ3
B18 REQ GND A18
B16 A16 AD31 B20 A20 AD30 B19 A19
<14> PCICLK1 CLK +5V AD31 AD30 +5V PME -PCIPME <14,20>
B17 A17 AD29 B21 A21 AD31 B20 A20 AD30
GND GNT -GNT0 <14> AD29 +3.3V AD31 AD30
B18 A18 B22 A22 AD28 AD29 B21 A21
<14> -REQ0 REQ GND GND AD28 AD29 +3.3V
B19 A19 AD27 B23 A23 AD26 B22 A22 AD28
+5V PME -PCIPME <14,20> AD27 AD26 GND AD28
AD31 B20 A20 AD30 AD25 B24 A24 AD27 B23 A23 AD26
AD29 AD31 AD30 AD25 GND AD24 AD25 AD27 AD26
B21 AD29 +3.3V A21 B25 +3.3V AD24 A25 B24 AD25 GND A24
B22 A22 AD28 B26 A26 AD23 B25 A25 AD24
GND AD28 <14,20> -C_BE3 C/BE3 IDSEL +3.3V AD24
AD27 B23 A23 AD26 AD23 B27 A27 B26 A26 AD24
AD27 AD26 AD23 +3.3V <14,20> -C_BE3 C/BE3 IDSEL
AD25 B24 A24 B28 A28 AD22 AD23 B27 A27
AD25 GND AD24 AD21 GND AD22 AD20 AD23 +3.3V AD22
B25 +3.3V AD24 A25 B29 AD21 AD20 A29 B28 GND AD22 A28
B26 A26 AD22 AD19 B30 A30 AD21 B29 A29 AD20
<14,20> -C_BE3 C/BE3 IDSEL AD19 GND AD21 AD20
AD23 B27 A27 B31 A31 AD18 AD19 B30 A30
AD23 +3.3V AD22 AD17 +3.3V AD18 AD16 AD19 GND AD18
B28 GND AD22 A28 B32 AD17 AD16 A32 B31 +3.3V AD18 A31
AD21 B29 A29 AD20 B33 A33 AD17 B32 A32 AD16
AD21 AD20 <14,20> -C_BE2 C/BE2 +3.3V AD17 AD16
AD19 B30 A30 B34 A34 B33 A33
AD19 GND GND FRAME -FRAME <14,20> <14,20> -C_BE2 C/BE2 +3.3V
B31 A31 AD18 B35 A35 B34 A34
+3.3V AD18 <14,20> -IRDY IRDY GND GND FRAME -FRAME <14,20>
AD17 B32 A32 AD16 B36 A36 B35 A35
AD17 AD16 +3.3V TRDY -TRDY <14,20> <14,20> -IRDY IRDY GND
<14,20> -C_BE2 B33 C/BE2 +3.3V A33 <14,20> -DEVSEL B37 DEVSEL GND A37 B36 +3.3V TRDY A36 -TRDY <14,20>
C B34 A34 B38 A38 B37 A37 C
GND FRAME -FRAME <14,20> GND STOP -STOP <14,20> <14,20> -DEVSEL DEVSEL GND
B35 A35 -PLOCK B39 A39 B38 A38
<14,20> -IRDY IRDY GND LOCK +3.3V GND STOP -STOP <14,20>
B36 A36 B40 A40 -PLOCK B39 A39
+3.3V TRDY -TRDY <14,20> <14,20> -PERR PERR SDONE LOCK +3.3V
<14,20> -DEVSEL
B37 DEVSEL GND A37 B41 +3.3V SBO A41 <14,20> -PERR B40 PERR SDONE A40
B38 GND STOP A38 -STOP <14,20> <14,20> -SERR B42 SERR GND A42 B41 +3.3V SBO A41
-PLOCK B39 A39 B43 A43 B42 A42
LOCK +3.3V +3.3V PAR PAR <14,20> <14,20> -SERR SERR GND
B40 A40 B44 A44 AD15 B43 A43
<14,20> -PERR PERR SDONE <14,20> -C_BE1 C/BE1 AD15 +3.3V PAR PAR <14,20>
B41 A41 AD14 B45 A45 B44 A44 AD15
+3.3V SBO AD14 +3.3V <14,20> -C_BE1 C/BE1 AD15
B42 A42 B46 A46 AD13 AD14 B45 A45
<14,20> -SERR SERR GND GND AD13 AD14 +3.3V
B43 A43 AD12 B47 A47 AD11 B46 A46 AD13
+3.3V PAR PAR <14,20> AD12 AD11 GND AD13
B44 A44 AD15 AD10 B48 A48 AD12 B47 A47 AD11
<14,20> -C_BE1 C/BE1 AD15 AD10 GND AD12 AD11
AD14 B45 A45 B49 A49 AD9 AD10 B48 A48
AD14 +3.3V AD13 GND AD9 AD10 GND AD9
B46 GND AD13 A46 B49 GND AD9 A49

m
AD12 B47 A47 AD11
AD10 AD12 AD11 AD8
B48 AD10 GND A48 B52 AD8 C/BE0 A52 -C_BE0 <14,20>
B49 A49 AD9 AD7 B53 A53 AD8 B52 A52
GND AD9 AD7 +3.3V AD8 C/BE0 -C_BE0 <14,20>
B54 A54 AD6 AD7 B53 A53
AD5 +3.3V AD6 AD4 AD7 +3.3V AD6
B55 AD5 AD4 A55 B54 +3.3V AD6 A54
AD8 B52 A52 AD3 B56 A56 AD5 B55 A55 AD4
AD8 C/BE0 -C_BE0 <14,20> AD3 GND AD5 AD4

co
AD7 B53 A53 B57 A57 AD2 AD3 B56 A56
AD7 +3.3V AD6 AD1 GND AD2 AD0 AD3 GND AD2
B54 +3.3V AD6 A54 B58 AD1 AD0 A58 B57 GND AD2 A57
AD5 B55 A55 AD4 B59 A59 AD1 B58 A58 AD0
AD3 AD5 AD4 -ACK64 +5V +5V -P2REQ64 AD1 AD0
B56 AD3 GND A56 B60 ACK64 REQ64 A60 B59 +5V +5V A59
B57 A57 AD2 B61 A61 -ACK64 B60 A60 -P3REQ64
AD1 GND AD2 AD0 +5V +5V ACK64 REQ64
B58 AD1 AD0 A58 B62 +5V +5V A62 B61 +5V +5V A61
B59 +5V +5V A59 B62 +5V +5V A62
-ACK64 B60 A60 -P1REQ64 PCI/120/P/IV/VA
ACK64 REQ64
B61 +5V +5V A61 IDSEL[A23], PCI/120/P/IV/VA
B62 +5V +5V A62 GNT/REQ[1], IDSEL[A24],
PCI/120/P/IV/VA INT[B] GNT/REQ[3],

a.
B
IDSEL[A22], INT[C] B

GNT/REQ[0],
INT[A]

VCC3 VCC3
RN69
-REQ3 1 2

si
<14> -REQ3
-REQ0 3 4 -P1REQ64 RN67 11 2 8.2K/8P4R/4 +12V
<14> -REQ0
-REQ1 5 6 -ACK64 3 4
<14> -REQ1 <20> -ACK64
-REQ2 7 8 -P3REQ64 5 6
<14> -REQ2
-P2REQ64 7 8
8.2K/8P4R/4 3VDUAL
-STOP RN71 11 2 8.2K/8P4R/4 BC291 BC360
-PLOCK 3 4 C106 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K
<20> -PLOCK
-PERR 5 6
-SERR 7 8 C107 0.1U/6/Y/25V/X
PCICLK1 BC95 10P/4/N/50V/X
-FRAME RN72 11 2 8.2K/8P4R/4
PCICLK2 BC98 10P/4/N/50V/X -IRDY

ne
3 4
-TRDY 5 6
-DEVSEL 7 8
VCC3
VCC
-P4REQ64 R168 8.2K/4
<20> -P4REQ64
EC7 1000U/D/6.3V/8C/30m EC159 1000U/D/6.3V/8C/X
+ +

A A
-PPCIRST
EC160 1000U/D/6.3V/8C/X
+
C103
100P/4/N/50V/X VCC3
do
BC90 0.1U/6/X7R/25V/K EMI GIGABYTE
BC92 0.1U/6/Y/25V/X
RN68 VCC3 Title

-INTB
8.2K/8P4R/4
2 11
BC94 0.1U/6/X7R/25V/K
PCI SLOT 1,2,3
-INTC 4 3 BC97 0.1U/6/X7R/25V/K Size Document Number Rev
-INTD 6 5 Custom
GA-M52L-S3P 2.4
-INTA 8 7
Date: Friday, July 09, 2010 Sheet 19 of 32
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5 4 3 2 1

AD[0..31]
<14,19> AD[0..31]

D D

VCC3 -12V
PCI SLOT4 +12V VCC3

PCI4 VCC
VCC B1 A1
-12V TRST
B2 TCK +12V A2
B3 GND TMS A3
B4 TDO TDI A4
B5 +5V +5V A5
B6 +5V INTA A6 -INTD <14,19>
<14,19> -INTA B7 INTB INTC A7 -INTB <14,19>
<14,19> -INTC B8 INTD +5V A8
B9 PRSNT1 RESERVED A9
B10 RESERVED +5V A10
B11 PRSNT2 RESERVED A11
B12 GND GND A12
B13 GND GND A13
B14 RESERVED 3.3V_AUX A14 3VDUAL
B15 GND RST A15 -PPCIRST <14,19>
<14> PCICLK5 B16 CLK +5V A16
B17 GND GNT A17 -GNT4 <14>
<14> -REQ4 B18 REQ GND A18
B19 +5V PME A19 -PCIPME <14,19>
AD31 B20 A20 AD30
AD29 AD31 AD30
B21 AD29 +3.3V A21
B22 A22 AD28
AD27 GND AD28 AD26
B23 AD27 AD26 A23
AD25 B24 A24
AD25 GND AD24
B25 +3.3V AD24 A25
C B26 A26 AD25 C
<14,19> -C_BE3 C/BE3 IDSEL
AD23 B27 A27
AD23 +3.3V AD22
B28 GND AD22 A28
AD21 B29 A29 AD20
AD19 AD21 AD20
B30 AD19 GND A30
B31 A31 AD18
AD17 +3.3V AD18 AD16
B32 AD17 AD16 A32
<14,19> -C_BE2 B33 C/BE2 +3.3V A33
B34 GND FRAME A34 -FRAME <14,19>
<14,19> -IRDY B35 IRDY GND A35
B36 +3.3V TRDY A36 -TRDY <14,19>
<14,19> -DEVSEL B37 DEVSEL GND A37
B38 GND STOP A38 -STOP <14,19>

m
-PLOCK B39 A39
<19> -PLOCK LOCK +3.3V
<14,19> -PERR B40 PERR SDONE A40
B41 +3.3V SBO A41
<14,19> -SERR B42 SERR GND A42
B43 +3.3V PAR A43 PAR <14,19>
B44 A44 AD15
<14,19> -C_BE1 C/BE1 AD15

co
AD14 B45 A45
AD14 +3.3V AD13
B46 GND AD13 A46
AD12 B47 A47 AD11
AD10 AD12 AD11
B48 AD10 GND A48
B49 A49 AD9
GND AD9

AD8 B52 A52


AD8 C/BE0 -C_BE0 <14,19>
AD7 B53 A53
AD7 +3.3V AD6
B54 +3.3V AD6 A54
AD5 B55 A55 AD4
AD3 AD5 AD4
B56 A56

a.
B AD3 GND AD2 B
B57 GND AD2 A57
AD1 B58 A58 AD0
AD1 AD0
B59 +5V +5V A59
-ACK64 B60 A60 -P4REQ64
<19> -ACK64 ACK64 REQ64 -P4REQ64 <19>
B61 +5V +5V A61
B62 +5V +5V A62

PCI/120/P/IV/VA
IDSEL[A25],
GNT/REQ[4],
INT[D]

si
A

ne A
do
GIGABYTE
Title
PCI SLOT 4
Size Document Number Rev
Custom GA-M52L-S3P 2.4
Date: Monday, July 12, 2010 Sheet 20 of 32
5 4 3 2 1
in
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Hardware Monitor circuits VCORE DDR18V VCC3 +12V


<29> VREF

R203 R205 R171 R18


CURRENT_OUT_V <27>
10K/4/1 10K/4/1 30K/4/X 8.2K/4 R195 R198 R199
FOR 8716 N/A 8.2K/4 8.2K/4 24.3K/4/1
<29> TMPIN1
VIN0 R45
<29> TMPIN2 <29> VIN0 VIN1 10K/4/1/X
<29> VIN1 VIN2
<29> VIN2 VIN4
D <6,29> TMPIN3 D
<29> VIN4 VIN5
C20 <29> VIN5
C1080 3.3N/6/X7R/50V/K
C113 C114 R206 RS1 SRS2 0.1U/6/X7R/25V/K BC111 BC114 BC113 BC115
1U/6/Y5V/10V/Z 0.1U/6/X7R/25V/K 8.2K/4/X 10K/1/4/S 10K/1/4/S 0.1U/6/Y/25V/X 0.1U/6/Y/25V/X 0.1U/6/Y/25V/X R201
0.1U/6/X7R/25V/K 8.2K/4 R44
10K/4/1/X

System Thermister CPU Thermister

SYSTEM FAN

+12V
C C
SYSFAN_VCC
+12V R169 8.2K/4
VCC R170

8.2K/4
8

U145A
R231 3 +12V
+
1K/4/1 1
FANPWM_2 R234 22K/4 2 - S G
3

<29> FANPWM_2 1
Q298
LM358DR/SO8 R187
4

BC4 R236 3.3K/4/1

m
2.2U/8/Y5V/16V/Z 5.1K/4/1 D
2

SYSFAN_VCC R186 15K/4/1 FANIO_2


1 FANIO_2 <29>
PA102FDG/TO252/115m/430 EC168 + R190
100uF/D/16V/S5/65 6.2K/4/1 C27

1
2
3

co
3.3N/4/X7R/50V/K

BC788
0.1U/6/Y/25V/X
C
V
S
SYS_FAN
FAN/1*3/WH/A3/PA66

+12V
CPU FAN CPUFAN_VCC

a.
B VCC +12V B
U145B
R179 R208 8.2K/4
8.2K/4
8

R184
1K/4/1 5 + +12V
R193 7
FANPWM_1 6 - S G
3

<29> FANPWM_1 LM358DR/SO8


22K/4 Q299 R177
4

R181 3.3K/4/1
5.1K/4/1 PA102FDG/TO252/115m/430

si
D
BC789
2

2.2U/8/Y5V/16V/Z CPUFAN_VCC R173 15K/4/1 FANIO_1


1 FANIO_1 <29>
VCC
EC169 + R188
BC790 6.2K/4/1
1
2
3
4

100uF/D/16V/S5/65 0.1U/6/Y/25V/X C1304


R340 3.3N/4/X7R/50V/K
8.2K/4
G
V
S
C

CPU_FAN R342 100/4/1


FANPWM3 <29>
FAN/1*4/WH/A3/PA66

ne
C225
3.3N/4/X7R/50V/K/X

+12V

A A

R229
3.3K/4/1
do
+12V R237 15K/4/1 FANIO_4
FANIO_4 <29>
R238
6.2K/4/1 C195 GIGABYTE
1
2
3

3.3N/4/X7R/50V/K Title
PWR_FAN FAN/HWMO
Size Document Number Rev
C
V
S

FAN/1*3/WH/A3/PA66 Custom GA-M52L-S3P 2.4


Date: Monday, July 12, 2010 Sheet 21 of 32
8 7 6 5 4 3 2 1
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8 7 6 5 4 3 2 1
AU1
19 2 NRIA-
<29> RI1- RY1 RA1 BCN1
18 3 NCTSA- COMA COMB BU1
<29> CTS1- RY2 RA2
17 4 NDSRA- NDCDA- 1 NDCDB- NSINB 19 2 NRIB- NDCDB- 1 2
<29> DSR1- RY3 RA3 1 2 <29> RI2- RY1 RA1
16 5 NRTSA- NDSRA- 6 NSOUTB NDTRB- 18 3 NCTSB- NSOUTB 3 4
<29> RTS1- DA1 DY1 3 4 <29> CTS2- RY2 RA2
15 6 NDTRA- NSINA 2 10 NDSRB- 17 4 NDSRB- NSINB 5 6
<29> DTR1- DA2 DY2 5 6 <29> DSR2- RY3 RA3
14 7 NSINA NRTSA- 7 NRTSB- NCTSB- 16 5 NRTSB- NDTRB- 7 8
<29> RXD1 RY4 RA4 7 8 <29> RTS2- DA1 DY1
13 8 NSOUTA NSOUTA 3 NRIB- 15 6 NDTRB-
<29> TXD1 DA3 DY3 9 10 <29> DTR2- DA2 DY2
12 9 NDCDA- NCTSA- 8 14 7 NSINB
<29> DCD1- RY5 RA5 <29> RXD2 RY4 RA4
NDTRA- 4 11 BH/2*5K10/IV/2.54/VA/COM/X 13 8 NSOUTB 180P/8P4C/6/NPO/50V/K/X
<29> TXD2 DA3 DY3
11 20 NRIA- 9 12 9 NDCDB-
GND 5V VCC <29> DCD2- RY5 RA5 BCN2
-12V 10 -12V 12V 1 +12V 5
11 20 VCC NRTSB- 1 2
COM/GE/SC-6mm/RA/1/D GND 5V NDSRB-
-12V 10 -12V 12V 1 +12V 3 4
GD75232/TSSOP20 ABC2 ABC3 NCTSB- 5 6
D ABC1 0.1U/4/Y5V/16V/Z NRIB- 7 8 D
0.1U/4/Y5V/16V/Z/X GD75232/TSSOP20/X BBC2 BBC3
BBC1 0.1U/6/Y5V/25V/Z/X
-RI 0.1U/6/Y5V/25V/Z/X 180P/8P4C/6/NPO/50V/K/X
-RI <16>
0.1U/4/Y5V/16V/Z/X
0.1U/6/Y5V/25V/Z/X

3
Q110

D22
NRIB- 2 MMBT2222A/SOT23/600mA/40

1
3 R474 75K/4/1
ACN1 NRIA- 1
NDTRA- 1 2
NSINA 3 4 BAV70/SOT23/300mA R475 BC10
NSOUTA 5 6 8.2K/4 22u/8/X5R/6.3V/M/X BC27

KB & MS
NDCDA- 7 8 C24 0.1U/6/X7R/25V/K
1000P/4/X/50V/X
EMI 2006.06.22 FUSEVCC
180P/8P4C/6/NPO/50V/K KB_MS
VCC MSDATA 7 10
8
PR2 0/6S/X ACN2 MSCLK 11
NRIA- 1 2 12
NCTSA- R196 MS 9
3 4
0803 EMI NDSRA- 5 6 1K/4/1 KBDATA 1 4
NRTSA- 7 8 VCC IDERST- 2
KBCLK 5

3
6 3
180P/8P4C/6/NPO/50V/K Q7 KB
R197 MMBT2222A/SOT23/600mA/40 KB/MS/6P/PC99/OS/RA/D/2 BC121
C 1K/4/1 0.1U/4/Y5V/16V/Z C
SOT23

1
For some

3
VCC device(China) is 5V.
Q6 RN76
MMBT2222A/SOT23/600mA/40 KDAT 2 1 KBDATA
<29> KDAT
PD1 1N4148W/SOD123/300mA MDAT 4 3 MSDATA
SOT23 <29> MDAT
KCLK 6 5 KBCLK
<29> KCLK

1
PBC1 PC1 R268 8.2K/4 MCLK 8 7 MSCLK
<14> -IDERST <29> MCLK
0.1U/6/Y/25V/X 0.1U/6/X7R/25V/K
82/8P4R/4

m
C110 FUSEVCC

1
3
5
7
LPT17 7 8 1000P/4/X/50V/X RN75 CN35
8 7 LPT4 LPT5 5 6 8 7 MCLK
6 5 LPT3 LPT3 3 4 PCN1 6 5 KCLK
PRN3 4 3 LPT5 LPT4 1 2 180P/8P4C/6/NPO/50V/K/X 4 3 MDAT

2
4
6
8
2K/8P4R/4 2 1 LPT17 2 1 KDAT 180P/8P4C/6/NPO/50V/K

co
ACK- 7 8
8 7 LPT9 LPT6 5 6 PCN2 8.2K/8P4R/4
PRN4 6 5 LPT8 LPT8 3 4 180P/8P4C/6/NPO/50V/K/X -IDERST
2K/8P4R/4 4 3 LPT6 LPT9 1 2
2 1 ACK-

8 7 ERR- ERR- 1 2 C109


PRN6 6 5 LPT1 LPT1 3 4 PCN3 1000P/4/X/50V/X
2K/8P4R/4 4 3 LPT16 LPT16 5 6 180P/8P4C/6/NPO/50V/K/X IDERST- R182 33/4 -RST1
2 1 LPT2 LPT2 7 8
R183 4.7K/4 PIORDY
VCC3 VCC
8 7 LPT7 LPT7 1 2

a.
B PRN7 BUSY BUSY PCN4 R185 8.2K/4 IRQ14 B
6 5 3 4
2K/8P4R/4 4 3 PE 5 6 180P/8P4C/6/NPO/50V/K/X R189 8.2K/4 PDD7
2 1 SLCT 7 8 R191 5.6K/4 PDDREQ
R194 15K/4/1 P66DET
PR1 2K/4/1 LPT14 PC2 180P/4/NPO/50V/J/X

7
5
3
1
RN3 R180
1K/8P4R/4 1K/4/1
PRN1

8
6
4
2
<29> AFD-
AFD-
STB-
1
3
2
4
LPT14
LPT1 PRIMARY IDE CONNECTOR FDD
<29> STB-
INIT- 5 6 LPT16 LPT 1 2

si
<29> INIT- PDD[0..15] DENSEL- <29>
SLIN- 7 8 LPT17 LPT1 1 3 4
<29> SLIN- <15> PDD[0..15]
LPT14 14 6
0/8P4R/4 LPT2 2 IDE 7 8 INDEX- <29>
ERR- 15 9 10
PRN2 MOTEA- <29>
LPT3 3 -RST1 1 2 11 12
PD0 1 2 LPT2 LPT16 16 PDD7 3 4 PDD8 13 14 DRVA- <29>
PD2 3 4 LPT4 LPT4 4 PDD6 5 6 PDD9 15 16
PD1 5 6 LPT3 LPT17 17 PDD5 7 8 PDD10 17 18 DIR- <29>
PD3 7 8 LPT5 LPT5 5 PDD4 9 10 PDD11 19 20 STEP- <29>
18 PDD3 11 12 PDD12 21 22 WDATA- <29>
0/8P4R/4 LPT6 6 PDD2 13 14 PDD13 23 24 WGATE- <29>
PDD1 PDD14

ne
PRN5 19 15 16 25 26 TK00- <29>
LPT7 7 PDD0 17 18 PDD15 27 28 WPT- <29>
PD7 1 2 LPT9 20 19 29 30 RDATA- <29>
PD6 3 4 LPT8 LPT8 8 PDDREQ 21 22 31 32
<15> PDDREQ SIDE1- <29>
PD4 5 6 LPT6 21 -PDIOW 23 24 33 34
<15> -PDIOW DSKCHG- <29>
PD5 7 8 LPT7 LPT9 9 -PDIOR 25 26
<15> -PDIOR
22 PIORDY 27 28
<15> PIORDY
0/8P4R/4 ACK- 10 -PDDACK 29 30 BH/2*17K5/WH/SHN/2.54/VA/PA46
A <15> -PDDACK A
23 IRQ14 31 32
<15> IRQ14
ERR- BUSY 11 PDA1 33 34 P66DET
<29> ERR- <15> PDA1 P66DET <15>
ACK- 24 PDA0 35 36 PDA2
<29> ACK- <15> PDA0 PDA2 <15>
BUSY PE 12 -PCS1 37 38 -PCS3
<29> BUSY <15> -PCS1 -PCS3 <15>
do
PE 25 -IDEACTP 39 40
<29> PE <26> -IDEACTP
SLCT SLCT 13 C111
<29> SLCT

<29> PD[0..7]
PD[0..7] LPT/PK/SC-6mm/RA/D BH/2*20K20/WH/SHN/2.54/VA/PA46
0.047U/4/X7R/16V/K
GIGABYTE
Title
Close to connector BIOS, HW MONITOR,COM/LPT
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 22 of 32
8 7 6 5 4 3 2 1
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8 7 6 5 4 3 2 1

F8 SMD1812P350SLR/S U23
F_USB2 5VDUAL FUSEVCC1
+USBP4 +USBP5
1 6

2 5 FUSEVCC1
UBC1
0.1U/4/Y5V/16V/Z/X F_USB2 -USBP4 3 4 -USBP5
1 2
-USBP4 3 4 -USBP5
<16> -USBP4 -USBP5 <16>
+USBP4 5 6 +USBP5 CM1293A-04SO/S
<16> +USBP4 +USBP5 <16>
7 8
10
D D
BH/2*5K9/BU/ON/2.54/VA/D/GF

D1
U24
FUSEVCC1 2
3 +USBP6 1 6 +USBP7
FUSEVCC2 1
2 5 FUSEVCC2
BAW56/SOT23/300mA
SOT23

-USBP6 3 4 -USBP7

FUSEVCC1 UR1 5.1K/4/1 -USBOC1 CM1293A-04SO/S


-USBOC1 <16>
EMI

UR2 VCC3 UBC5 0.1U/6/X7R/25V/K


10K/4/1

5VDUAL

F_USB1 +
1
UEC1
F7 SMD1812P350SLR/S FUSEVCC2 1000U/D/6.3V/8C/30m
5VDUAL

C UBC2 C
0.1U/4/Y5V/16V/Z/X
F_USB1
1 2
-USBP6 3 4 -USBP7
<16> -USBP6 -USBP7 <16>
+USBP6 5 6 +USBP7
<16> +USBP6 +USBP7 <16>
7 8
10

BH/2*5K9/BU/ON/2.54/VA/D/GF

FUSEVCC

m
F2
5VDUAL SMD1812P260/6V 80 mil
BC122
0.1U/6/Y5V/25V/Z/X

co
1012 EMI

UR5 0/6/SHT/X

a.
B R132 0/6/SHT/X B

20050629 EMI

R167 0/6/X

20060621 EMI

si
UBC4 0.1U/6/Y5V/25V/Z/X
VCC VCC3
2006.05.26 EMI

R_USB FUSEVCC

ne
FUSEVCC 1 2
-USBP0 3 75 3 1 4 -USBP1
<16> -USBP0 -USBP1 <16>
+USBP0 5 6 +USBP1
<16> +USBP0 +USBP1 <16>
7 8
86 4 2
12
11
10
9

A A

USB/A/O/BLACK/GF/2/RA/D
do
U26
FUSEVCC
-USBP0 1 6 -USBP1 GIGABYTE
LR50 5.1K/4/1
-USBOC <16> Title
2 5 FUSEVCC
+
1
LEC4 LR51 +USBP0 +USBP1
USB PORT
3 4
1000U/D/6.3V/8C/30m 10K/4/1 Size Document Number Rev
Custom GA-M52L-S3P 2.4
CM1293A-04SO/S
Date: Sheet 23 of 32
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5 4 3 2 1

SURR_R <25>
CR2 20K/4/1
<25> CEN SURR_L <25>
<25> LFE
<25> S_SURR_L
<25> S_SURR_R
D CBC24 470P/4/X7R/50V/K D
<25> SPDIFI

AVDD

CR5 5.1K/4/1
<25> SPDIF S_SURR_JD <25>
CR6 10K/4/1
CEN_JD <25>
CBC2 CR8 47/4/1 FAUDIO_JD
0.1U/4/X7R/16V/K
CR7 2.2/8 CBC3
VCC3
1N/4/X7R/50V/K

48
47
46
45
44
43
42
41
40
39
38
37
CU1
CBC48

LFE
SPDIF/EAPD

CEN

SURR-R
SPDIFO

SURBACK-R/XTALSEL
SURBACK-L/JD0 GPIO0

AVSS2

JDREF (NC)/JD3
SURR-L
AVDD2
LINE1-VREFOR/VREFO3
22u/8/X5R/6.3V/M ALC880/CMI9880

<25> SPDIFO_HDMI
1 DVDD1 FRONT-R 36 LINE_O_R <25>
CR16 22/4/X 2 35
GPIO0/XTALI FRONT-L LINE_O_L <25>
CBC19 10U/8/X5R/6.3V/K 3 34
GPIO1/XTALO SENSE B (JD2)/FMIC1 VREFOUT2 CR105 8.2K/4/X
4 DVS1 DCVOL/VREFVOUT2 33 AVDD
5 32 VODR CR13 8.2K/4
<14,16> ACZ_SDOUT SDATA_OUT MIC1-VREFO-R/FMIC2 MIC2 <25>
CR14 0/4/SHT/X 6 31 LINE2_VREFO
<16> ACZ_BITCLK BIT_CLK LINE2-VREFO/JD4
7 30 MIC2_VREFO
DVSS2 MIC2-VREFO/AFILT2

SENSE A(JD1)/PHONE JD5


CR15 22/4 8 29 892WOR
<16> ACZ_SDIN0 SDATA-IN LINE1-VREFO-L/AFILT1
9 28 VOBR CR17 8.2K/4
DVDD2 MIC1-VREFO-L/VREFOUT MIC1 <25>
<16> ACZ_SYNC 10 SYNC VREF 27
AVDD

MIC2-R/JD1 GPIO1
<16> -ACZ_RST 11 RESET# AVSS1 26
12 PC_BEEP AVDD1 25

LINE2-R/AUX-R
LINE2-L/AUX-L

MIC1-R/MIC2
MIC1-L/MIC1
C CBC4 CBC5 CBC6 C

MIC2-L/JD2
22P/4/N/50V/X 0.1U/4/Y5V/16V/Z 0.1U/4/Y5V/16V/Z

CD_GND

LINE1-R
LINE1-L
CBC7 CBC8

CD_R
CD_L
10U/8/X5R/6.3V/K 892WOR CR36 0/6/X 5VDUAL
For 892 with LDO
FRONT_JD CR19 5.1K/4/1 ALC892R-GR/LQFP48
<25> FRONT_JD

13
14
15
16
17
18
19
20
21
22
23
24
0.1U/4/X7R/16V/K CBC49

1
LINE1_JD CR20 10K/4/1 CBC9 22u/8/X5R/6.3V/M/X CD4
<25> LINE1_JD
4.7U/8/Y/16V/X For 892 with LDO
MIC1_JD CR21 20K/4/1
<25> MIC1_JD
CBC10 4.7U/8/X5R/6.3V/K AZ2225-01L/SOD323/X
LINE_IN_R <25>
<25> SURR_JD
SURR_JD CR22 39.2K/4/1 CR36 for ALC888B_VD2

m
CBC11 4.7U/8/X5R/6.3V/K
LINE_IN_L <25>
CBC12 4.7U/8/X5R/6.3V/K
MIC2 <25>
LINE2_L CBC13 4.7U/8/X5R/6.3V/K
MIC1 <25>

co
LINE2_R CBC14 0.1U/6/X7R/25V/K
CD_R <25>
Can Support Amp Out
MIC2_L CBC15 0.1U/6/X7R/25V/K
CDGND <25>
MIC2_R CBC16 0.1U/6/X7R/25V/K
CD_L <25>

a.
B B

CR3 0.01U/4/X7R/25V/K

Mic noise use.


SOT23

INTEL FRONT AUDIO


CQ8 CR74 8.2K/4
LINE2_VREFO
CR75 8.2K/4

si
SOT23

BAT54A/SOT23/200mA
CBC54 1N/4/N/50V/X

CQ9 CR76 8.2K/4 FRONT_MIC1


MIC2_VREFO
CR77 8.2K/4 VCC3
CR47 22K/4
BAT54A/SOT23/200mA
CR46 22K/4
CR78
F_AUDIO 8.2K/4
MIC2_L CBC45 4.7U/8/X5R/6.3V/K CR24 75/4/1

ne
1 2
MIC2_R CBC44 4.7U/8/X5R/6.3V/K CR25 75/4/1 3 4 -ACZ_DET
-ACZ_DET <16>
LINE2_R CEC9 100u/D/10V/57 CR18 75/4/1 BACK_R CR79 20K/4/1
1

5 6
FAUDIO_JD
+

7
LINE2_L CEC10 CR23 75/4/1 BACK_L CR80 39.2K/4/1
1

9 10
100u/D/10V/57
+

PH/2*5K8/GED/2.54/VA/D
A A

PH/2*5K8/[11NH2-000205-K1]
CR4 0.01U/4/X7R/25V/K/X
do
Mic noise use. CC1 CC2 CC3 CC4
GIGABYTE
180P/4/NPO/50V/J 180P/4/NPO/50V/J
180P/4/NPO/50V/J 180P/4/NPO/50V/J
Title
AC97 ALC658
Size
Custom
Document Number
GA-M52L-S3P Rev
2.4
Date: Friday, July 09, 2010 Sheet 24 of 32
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5 4 3 2 1

LINE OUT
VCC
CR26
FRONT OUT

7
VCC3

NC
1 OPTICAL
0/SHT/X CR1 Short protect FUSEVCC 2

V
CR84 0/4 SPDIF 3
SPDIF_I

In

NC
8.2K/4/X
1 CEC17 + 10u/S/16V/45 CR59 22/4 AJ_B5
<24> LINE_O_R

6
<24> SPDIFI 2
3 FR/5P/BK/T/D/S(GY)/X CEC19 + 10u/S/16V/45 CR60 22/4 AJ_B2
<24> LINE_O_L
CR86
374K/4/1/X SHR/1*3/WH/P/2.54/VA/D[11NH5-010103-W1R_11NH5-010103-W2R]
D D

COAXIAL CBC21 CBC22


+12V 180P/4/NPO/50V/J 180P/4/NPO/50V/J

2
CBC51 CR93
AVDD CQ4 CD1 SPDIF 1 4
<24> SPDIF
1N4148W/SOD123/300mA
0.01u/4/X7R/25V/K 100/4/1 LINE-IN

3
78L05/SOT89/0.1A CR94 CBC17

1
2
3
5VSB 1N4148W/SOD123/300mA 220/4

CD2 CBC25
0.1U/6/Y/25V/X CR61 75/4/1 LINE_IN_RR
<24> LINE_IN_R
CBC47 100p/4/NPO/50V/J
1

22u/8/X5R/6.3V/M CD3 RCA/4P/ORANGE/OS/RA/D/1 CR62 75/4/1 LINE_IN_LL


<24> LINE_IN_L

AZ2225-01L/SOD323
CBC26 CBC27
180P/4/NPO/50V/J 180P/4/NPO/50V/J

CR10 0/4/X SPDIF_O


<24> SPDIF
CR9 0/4
<24> SPDIFO_HDMI
MIC
For HDMI SPDIF
PH/1*2/BK/2.54/VA/D
C C

CR63 75/4/1 MIC22


<23> MIC2
CD_IN
CD IN CR64 75/4/1 MIC11
<23> MIC1
<24> CD_L 1
2
3 CBC28
<24> CDGND
4 180P/4/NPO/50V/J CBC29
<24> CD_R
180P/4/NPO/50V/J

CR51 CR52 CR53 SHR/1*4/BK/P/2.54/VA/D

m
8.2K/4 8.2K/4 8.2K/4
SURROUND

CEC30 + 10u/S/16V/45 CFB1 30/6/4A/S BJ_C5


<24> SURR_R

co
CEC31 + 10u/S/16V/45 CFB2 30/6/4A/S BJ_C2
<24> SURR_L

USB_LAN CBC32 CBC33


180P/4/NPO/50V/J 180P/4/NPO/50V/J

USB

a.
B B
CEN/LFE

CEC34 100u/D/10V/57 CFB3 30/6/4A/S BJ_B5

1
<24> LFE

+
CEC35 100u/D/10V/57 CFB4 30/6/4A/S BJ_B2

1
<24> CEN

+
CBC36 CBC37
180P/4/NPO/50V/J 180P/4/NPO/50V/J

si
AUDIOA
AUDIOB

LINE1_JD
A3 A3 CEN_JD
D3 D3 Orange
<24> LINE1_JD
LINE_IN_RR
A2 A2 BLUE <24> CEN_JD
BJ_B5
D2 D2 SURR BACK
A4 D4 CEN/LFE
A4 D4
LINE-IN
LINE_IN_LL A1 BJ_B2 D1 ALC880 - SURROUND
A1 GND D1 GND CMI9880 - Back SURR CEC38 + 10u/S/16V/45 CFB5 30/6/4A/S BJ_A5
LINE-IN REAR <24> S_SURR_R
B3 B3 E3 E3
FRONT_JD B2 SURR_JD E2 CEC39 + 10u/S/16V/45 CFB6 30/6/4A/S BJ_A2
<24> FRONT_JD B2 <24> SURR_JD E2 <24> S_SURR_L
AJ_B5 BJ_C5

ne
B4 B4 GREEN E4 E4 Black
AJ_B2 B1 LINE-OUT BJ_C2 E1 Back side
B1 GND E1 GND CBC40 CBC41
Speaker
LINE-OUT CEN Azalia Port G 180P/4/NPO/50V/J 180P/4/NPO/50V/J
C3 C3 F3 F3
MIC1_JD S_SURR_JD
<24> MIC1_JD
MIC22
C2 C2 <24> S_SURR_JD
BJ_A5
F2 F2 Gray
A C4 C4 PINK F4 F4
Left & Right Side
A

MIC11 C1 MIC-IN BJ_A2 F1 Speaker


C1 GND F1 GND
C0 C0 MIC-IN F0 F0 SIDE
G1 G1 CMI9880 - Side SURR
do
G4 G4 G2 G2
G3 G3
GIGABYTE
2X3RP/26P/OR,BK,GY,BU,GE,PK/RA 2X3RP/26P/OR,BK,GY,BU,GE,PK/RA Title
AUDIO JACK
A3RJ/13P/B/[11NR6-403006-01_11NR6-403006-02]
3RJ+15F/[11NR6-403004-11]
A3RJ/13P/OBG/[11NR6-403006-71]
3RJ+15F/[11NR6-403004-31]
Size
Custom
Document Number
GA-M52L-S3P Rev
2.4
Date: Friday, July 09, 2010 Sheet 25 of 32
5 4 3 2 1
in
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8 7 6 5 4 3 2 1

VCC3 VCC3
VCC 5VSB
VCC

R469 R338
1K/4/1 8.2K/4
ATX5VSB D2
R446
330/6
BC171
0.01U/4/X7R/25V/K INTEL FRONT PANEL R463
330/6 -SATA_LED 2
R339
8.2K/4 CPU_VLD
<15> -SATA_LED CPU_VLD <16>

3
F_PANEL 3 -HDLED
+HDLED 1 2 +MPD1 +MPD1 -IDEACTP 1 Q3
HD+ MSG/PD+ <22> -IDEACTP D
R449 C168

3
-HDLED 3 4 8.2K/4 BAW56/SOT23/300mA 0.1U/6/Y/10V/X
HD- MSG/PD-

3
G S

SOT23
Q106
5 6 -PWRBTSW MMBT2222A/SOT23/600mA/40

1
GND PW+ Q2 2N7002/SOT23/25PF/5
D D
RESET 7 8 SOT23

1
RESET PW- C200 MMBT2222A/SOT23/600mA/40

1
9 0.01U/4/X7R/25V/K
CI-

3
R468 1K/4/1 R352 8.2K/4
GPO2 <16> <28> VCORE_PWOK
COPEN- 11 Q97
<29> COPEN- CI+ BAV99/SOT23/300mA 3VDUAL
14 VCC 5VSB
SP+

1
+MPD1 15 16 ATX5VSB 3VDUAL
PWR+ NC R336
17 18 22K/4
PWR- NC R337
CK8_PWOK <16>
19 20 -SP R444 8.2K/4
PWR- SP-

3
8.2K/4/X
BH/2*10K10,12,13/WH/2.54/VA/PA Q56
RESET D
R447 33/4/X
<16,29> -SYS_RST

3
3
VCC R103 0/4 Q55 G S C1302
<29> DBIOS_RST- D 1U/6/Y5V/10V/Z
Q1 2N7002/SOT23/25PF/5

1
C199 BAV99/SOT23/300mA
G S
0.01U/4/Y/10V/X
SOT23

D20 2N7002/SOT23/25PF/5

1
1N4148W/SOD123/300mA 5VSB R233 8.2K/4
<27,29> PWOK
Q98
S

1
-SP R455 75/6/1 3
D

2 R457 1K/4/1
SPKR <16>
R456 75/6/1
G

2N7002/SOT23/25PF/5 RESET
3VDUAL
3

C Q108 C

3
Q8
VCC R101 MMBT2222A/SOT23/600mA/40/X
SOT23 1K/4/1/X
2

R460 1K/4/1 MMBT2222A/SOT23/600mA/40 SOT23 VCC3

1
2_5LEVEL
Control pin
3

Q107 3VDUAL +12V

2
R461 WQ12
8.2K/4 Q9
MMBT2222A/SOT23/600mA/40/X R130
SOT23 R10 1.3K/4/1 U17A
2

8
8.2K/4/X SOT23 This design MAX 3A 2SK4212/TO252/1200pF/7.8m

m 3
R470 1K/4/1 HT_EN2 3
<29> BEEP- <30> HT_EN2 +
MMBT2222A/SOT23/600mA/40 R106 1K/4/1/X 1 WR23 100/4/1 VCC12_HT
<29> DBIOS_RST-
2 -
R124 C169 LM358DR/SO8
3VDUAL 1.21K/4/1 C1407

+
4
5VSB 2_5LEVEL 0.01u/4/X7R/25V/K/X EC39

co
1000U/D/6.3V/8C/30m
1u/4/X5R/6.3V/K
R212 WR25 100/4/1
8.2K/4 R134
100/4/1
HT1_VLD +12V
HT1_VLD <16,28>
3

5VSB C162 DDRVTT DDRVTT

R
Q279 0.1U/6/Y/25V/X 1 U17B

8
D +
Q19 CE4
100U/D/10V/57 5

a.
B G S + B
R343 7 BC205 EC2
8.2K/4 6 4.7U/8/Y5V/10V/Z 100U/D/10V/57/X

A
2

-
2N7002/SOT23/25PF/5 LM358DR/SO8
AP431N/SOT23/150mA

4
3

Q58

ATX5VSB
MMBT2222A/SOT23/600mA/40
SOT23
2

VCC12_HT R346 6.2K/4/1


KR5

si
8.2K/4/1
C163
0.33U/6/Y5V/16V/Z KPS_IN_IO
ATX5VSB KPS_IN_IO <29>
3VDUAL
EUP 3VDUAL

3
KU1 KQ3 KC1
D
0.1U/4/X7R/16V/K/X
R335 ATX5VSB KR14 1K/4/1/X 1 8 K5V_DRV KR6
15K/4/1 DS5_SEL 5VSB_OFF KR10 KC6 8.2K/4/1 G S
2 7 KPS_OUT 100K/4/1 1U/4/X5R/6.3V/K

1
ATX5VSB VSB PS_OUT- KPS_OUT
SB_PWOK <16>
5VSB -PWRBTSW SMBCLK K5V_DRV

ne
3 6 SMBCLK <16,18,28> 2N7002/SOT23/25pF/5
PS_IN- SDC
3

Q54 C152 -SLP_S5 4 $:0.25 5 SMBDATA KC2 KC4


GND

D <16,30> -SLP_S5 S5- SDA SMBDATA <16,18,28>


1U/6/Y5V/16V/Z/X KC3 0.1U/4/X7R/16V/K/X 0.1U/4/X7R/16V/K/X
R334 1U/4/Y5V/16V/Z/X
G S
8.2K/4 2N7002/SOT23/25PF/5 NCT3012S/ESOP8
9
2

A For plug, unplug quickly. Be note, always pop >1u. A


Make sure SB_PWOK is
3

KC5 1U/6/Y5V/10V/Z
rising from Zero. Q53 KQ1
D
Function Selection. Strapped by ATX5VSB K5V_DRV KR11 100K/4/1 1
do
G S DeepS5_Sel = 1: 5VSB 2 4 5VSB
2N7002/SOT23/25PF/5 3
System will enter the deep S5 state after 6 sec ATX5VSB
GIGABYTE
2

3VDUAL R31 15K/4/1 delays when AC power on. P06P03LCG/SOT89/530pF/45m


Title
DeepS5_Sel = 0:(Default)
System will not enter the deep S5 state when AC
FRONT PANEL
C154 3VDUAL KR9 1K/4/1 KPS_OUT
4.7U/8/Y5V/10V/Z power on. System is in normal ACPI S5 state. Size Document Number Rev
Custom GA-M52L-S3P 2.4
Date: Sheet 26 of 32
8 7 6 5 4 3 2 1
in
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8 7 6 5 4 3 2 1

MH1 MH2 MH4

ATX POWER CONNECTOR

6
5
4

6
5
4

6
5
4
EC162 1000U/D/6.3V/8C/30m K1 K2 K3
+
VCC 12 3 12 3 12 3
11 2 11 2 11 2
10 1 10 1 10 1

ATX5VSB -12V VCC3 VCC3 HOLE_3/X HOLE_3/X HOLE_3/X

9
8
7

9
8
7

9
8
7
ATX K1_ICT/X K1_ICT/X K1_ICT/X
13 1 EMI 2006.06.22

1
3.3V 3.3V K4 K5 K6
R416 14 2 BC154 BC164 +12V C21 0.1U/4/Y5V/16V/Z
22K/4 -12V 3.3V 0.1U/4/Y/25V/X 0.1U/4/Y/25V/X MH5 MH6 MH3
D 15 GND GND 3 D

6
5
4

6
5
4

6
5
4
-ATX_PSON 16 4 VCC K1_ICT/X K1_ICT/X K1_ICT/X 12 3 12 3 12 3
<29,30> -ATX_PSON PSON 5V
11 2 11 2 11 2

1
17 GND GND 5 10 1 10 1 10 1
BC155 BC162 BC163
0.1U/4/Y5V/16V/Z 0.1U/4/Y/25V/X 18 6 0.1U/4/Y/25V/X HOLE_3/X HOLE_3/X HOLE_3/X

9
8
7

9
8
7

9
8
7
GND 5V
19 GND GND 7

20 8 PWOK MH7
-5V POK PWOK <26,29>

6
5
4
VCC 21 5V 5VSB 9 ATX5VSB
12 3
22 5V 12V 10 +12V 11 2
BC159 BC160 10 1
0.1U/4/Y/25V/X 23 11
5V 12V BC166 BC167 C189 HOLE_3/X

9
8
7
24 12 0.1U/4/Y5V/16V/Z 0.1U/4/Y/25V/X 0.1U/4/Y/25V/X
0.1U/4/Y/25V/X GND 3.3V
POWER BC165
0.1U/4/Y5V/16V/Z
APW/2*12/IV/VA/SN/2SHK/PA66 5VDUAL
VCC3

3VDUAL
C268 3VDUAL
5VSB +12V 0.1u/4/Y5V/16V/Z
C190 5VDUAL
4.7U/8/Y/10V/X
C 3 1 C
C267 R458 R462 2 R503 + EC25
3VDUAL
0.1u/4/Y5V/16V/Z 2.74K/4/1 8.2K/4 5VSB +12V 1 100/4/1 C269
3VDUAL VCC=4.2V 0.1u/4/Y5V/16V/Z
5VSB R509 12.1K/4/1

8
For Seasonic PSU U2A +12=10V R459 Q49
R499 8.2K/4 KA3 3 8.2K/4 L1085DG/TO252/5A 1000U/D/6.3V/8C/30m
can't boot issue VCC +
5V_DRV R502
1

8
R464 1K/4/1 2 U2B 5VDUAL 169/4/1
5VSB -
R87 R90 5 Q57
+
BC211 EC144 300/6/X 300/6/X R498 1K/4/1 5VDL_G2 KA393D/SO8 7 1

4
0.1U/6/X7R/25V/K 1000U/D/6.3V/8C/30m Close to ATX PSU 5VDL_G2 6 - 5V_DRV 2
KA393D/SO8 3
connector VCC

m
C271

4
0.1u/4/Y5V/16V/Z

2SK4212/TO252/1200pF/7.8m

co
MMBT2907A/SOT23/-600mA/50
R497 1K/4/1 Q51
5VSB 5V_DRV P_EN Q59 Q64
1
Q41 3 2 4 R505 8.2K/4 R506 8.2K/4 2
VCC 5VDUAL 5VSB

3
4 2 3 3 P_EN
VDDA25 VDDA25 5VSB 1
1 Q61 1
D + 5VSB
R500 Q51 EC27
L1117LG/N/SOT223/1A BC303 1K/4 1000U/D/6.3V/8C/30m BAT54C/SOT23/200mA
G S

SOT23
EC40 0.1U/6/X7R/25V/K C273
100U/D/10V/57 SOT23 EC26

1
3
R341 2N7002/SOT23/25pF/5 100U/D/10V/57 0.01u/4/X7R/25V/K/X
100/4/1

a.
B Q62 C274 5VDUAL B
5VSB
1.25(1+100/100)=2.5 SOT23
1n/4/X7R/50V/K/X PMOS/SOT89/[10IFC-450603-01R]
R501

3
VDDA25 -SLP_S3 Q63
R344 <16,29,30> -SLP_S3 MMBT2222A/SOT23/600mA/40 R504
100/4/1 8.2K/4 R508 1K/4/1
100K/4/1
SOT23

1
BC136 BC1 MMBT2222A/SOT23/600mA/40
0.1U/6/X7R/25V/K 22u/8/X5R/6.3V/M/X
R507 C275 RS4

si
200K/4/1 1u/6/Y5V/10V/Z 100K/1/4/S
Close to Q51 asap

+12V
DYNAMIC CURRENT OC

4
DU9D
12 + LM324DR/SO14/X
14
BC906

ne
13 -
0.1u/4/Y5V/16V/Z/X

11
4

5VDUAL DU9A
4

DR159 47K/4/1/X 3 LM324DR/SO14/X DU9B


<28> VSEN + FB <28>
1 5 + LM324DR/SO14/X
BC202 DR158 5.1K/4/1/X 2 7
A <6,28> COREFB- - A
For 1.2V Dual_Power. 1U/6/Y5V/10V/Z 6 -
DR161
11

4
40.2K/4/1/X DU9C
11

Q73 3 VCC12_DUAL DR162 10 +


LM324DR/SO14/X
do
VCC12_DUAL 4 2 10K/4/1/X 8
1 DR160 5.1K/4/1/X 9 -
600mA MAX GIGABYTE
DR163 DR178
11

BC692 EC44 453K/4/1/X 10K/4/1/X Title


APL1117/SOT223/0.8A/1.2/[10GL3-101117-02R] 1U/6/Y5V/10V/Z/X 100U/D/10V/57 Misc. PWR & ATX CONN
CURRENT_OUT_V <21> Size Document Number Rev
DR165 Custom GA-M52L-S3P 2.4
453K/4/1/X
Date: Sheet 27 of 32
8 7 6 5 4 3 2 1
in
i-
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8 7 6 5 4 3 2 1

VCC VIN12 VIN12


3VDUAL ATX_12V
4 +12V GND 1
VIN12
DR16 3 2
+12V GND
3.3K/4/1 AM2: high, AM2+: low DR70 1 1 1
8.2K/4 DBC1 + DEC2 + DEC3 + DEC12
DQ19
6323_EN BC168 270u/FP/D/16V/88/12m 270u/FP/D/16V/88/12m 270u/FP/D/16V/88/12m
DR73 1K/4/1 2 0.1U/6/X7R/25V/K DBC3
<6> CORE_TYPE_DET

3
VCC 3 APW/2*2/IV/P/4.2/SN/PA66 1U/8/Y5V/16V/Z
DQ1 DR68 DBC10 1 1U/8/Y5V/16V/Z

2
D
1K/4/1 Layout Guide: 1. PWM 2nd layer use GND.
MMBT2222A/SOT23/600mA/40 DQ2
G S 2. UGATE/PHASE/LGATE:25/25/5~10/25/25.

SOT23
DR69
D 8.2K/4 1U/6/Y5V/10V/Z 3. Isen: 20/5/5/5/20. NB cofeback: 10/10/10 2SK4212/TO252/1200pF/7.8m D

1
VCORE

3
UGATE1 DR7 1/6
DQ18
2N7002/SOT23/25PF/5 DR5 10K/4/1

G
2 PHASE1 DL2
DQ16 3

2
D
1 0.6u/40A/IMD129/W/D
DQ3 DQ9 DR8 1 1

S
G S + +
2N7002/SOT23/25PF/5 2.2/6 DEC6 DEC9
2

DR13 8.2K/4 VID1 DR30 DR28


<16> CPUVDD_EN <6> VID1

3
VID1: high=>PVID, low=>SVID DC3 0/4/SHT/X 0/4/SHT/X
2N7002/SOT23/25PF/5 1N/4/X7R/50V/K
820u/FP/D/2.5V/68/7m
VCC LGATE1 820u/FP/D/2.5V/68/7m
VIN12 2SK4213/TO252/1700pF/6m
2SK4213/TO252/1700pF/6m
PH1
Pin 34 Input, Pin 37 Output DR38
PWROK (SVID) EN: over 0.8V 2.2/6 ISEN1
VIN12
Low: Metal VID, DBC2 1u/6/X7R/16V/K
High: Run protocal V6323

2
DQ4
VCORE CPU_PWRGD DR71 0/4/X OK_PWM DR3 2SK4212/TO252/1200pF/7.8m

10
<6,11> CPU_PWRGD
DU1 2.2/6
29 DBC4 0.22U/6/X7R/16V/K

VCC

3
6323_EN PVCC1_2 UGATE2 DR21 1/6 0.6u/40A/IMD129/W/D
24 EN
DC2 DR2 31 DR4 2.2/6 DR19 10K/4/1
0.1U/4/X7R/16V/K/X 8.2K/4 HT1_VLD DR1 0/4 OK_PWM BOOT1 PHASE2
<16,26> HT1_VLD 34 PWROK
32 UGATE1 DC1 DL3
UGATE1

2
C
<26> VCORE_PWOK VCORE_PWOK DC30 37 33 PHASE1 0.1U/6/X7R/25V/K C
DR63 3.48K/4/1 3.3N/4/X7R/50V/K VDDPWRGD PHASE1 LGATE1 DQ5 DQ11 DR23 1 1
LGATE1 30
DC31 2.2/6 + DEC8 + DEC1
VCORE_NB DR60 100/4/1 DR65 51.1/6/1 680P/4/X7R/50V/K DC29 100P/4/NPO/50V/J 48 DR11 DR29
COMP_NB DR9 0/6 ISEN1 DC10
20 0/4/SHT/X 0/4/SHT/X

3
DR66 357/4/1 ISEN1+ 1N/4/X7R/50V/K
1 FB_NB ISEN1- 21
DC20 LGATE2
PH1 DR49 DC21 0.1U/6/X7R/25V/K 2SK4213/TO252/1700pF/6m 820u/FP/D/2.5V/68/7m
9.31K/4/1 0.1U/6/X7R/25V/K VIN12 2SK4213/TO252/1700pF/6m 820u/FP/D/2.5V/68/7m
27 DR18 2.2/6 PH2
BOOT2
RGND_NB 3 26 UGATE2 DC7 ISEN2
DC4 RGND_NB UGATE2 PHASE2 0.1U/6/X7R/25V/K DBC7
PHASE2 25

m
DR12 2K/4/1 0.033u/4/X7R/16V/K 28 LGATE2 1U/8/Y5V/16V/Z
LGATE2

2
DC5 150p/4/NPO/50V/J 18 COMP DR41 0/6 ISEN2 DQ6
ISEN2+ 22
23 2SK4212/TO252/1200pF/7.8m
VCORE FB ISEN2- DC16
<27> FB 17 FB

co
DR62 DC27 PH2 DR42 DC19 0.1U/6/X7R/25V/K

3
2.26K/4/1 0.027u/4/X7R/16V/K 15 35 PWM3 9.31K/4/1
0.1U/6/X7R/25V/K UGATE3 DR35 1/6 0.6u/40A/IMD129/W/D
DC28 RCOMP PWM3 PWM4 DR33 10K/4/1
PWM4 36
DC17 DR17 20/6/X 1N/4/X7R/50V/K/X PHASE3

2
0.1U/6/X7R/25V/K 13 44 DR50 0/6 ISEN3 DL4
DR20 DR64 412/4/1 VSEN ISEN3+ DQ7 DQ13
ISEN3- 43
100/4/1/X 12 PH3 DR40 DC15 DC14 1 1
<27> VSEN RGND + +
DC8 0.1U/4/X7R/16V/K 46 9.31K/4/1 0.1U/6/X7R/25V/K DR36 DR14 DR34 DEC4 DEC10
DR22 100/4/1 ISEN4+ ISEN4- 0.1U/6/X7R/25V/K 2.2/6
45 0/4/SHT/X 0/4/SHT/X

3
<6> COREFB+ DC9 DR59 DC26 ISEN4-
19 APA
1N/4/X/50V/X 0.1U/4/X7R/16V/K 42 DBC6 1U/6/X7R/16V/K LGATE3
DR24 0/6/SHT/X 4.99K/4/1 PVCC_NB DC13

a.
B <6,27> COREFB- B
DC18 0.1U/4/X7R/16V/K OFF_SET 14 DR15 2.2/6 2SK4213/TO252/1700pF/6m 1N/4/X7R/50V/K 820u/FP/D/2.5V/68/7m 820u/FP/D/2.5V/68/7m
OFS VIN12
V6323 DR10 56K/4/1 16 2SK4213/TO252/1700pF/6m
DR26 DC6 1N/4/X7R/50V/K RSET PH3
100/4/1/X PWM_VID0 4 VID0/VFIXEN DR46 2.2/6 DC11 0.1U/4/X7R/16V/K ISEN3
BOOT_NB 40
PWM_VID1 5 VID1/SEL
PWM_VID2 6 39 UGATE_NB VIN12
VID2/SVD UGATE_NB
For ISL6324 use PHASE_NB 38 PHASE_NB
PWM_VID3 7 41 LGATE_NB
SMBDATA DR74 0/4 RGND_NB VID3/SVC LGATE_NB
<16,18,26> SMBDATA PWM_VID4 8

si
SMBCLK DR75 0/4 OFF_SET VID4 DR72 0/4 ISEN_NB
<16,18,26> SMBCLK ISEN_NB+ 2
PWM_VID5 9 DBC9
VID5

2
47 DR67 6.3K/4/X 1U/8/Y5V/16V/Z
GND

DR58 10K/4/X ISEN_NB- DQ14


V6323 11 FS DR51 9.31K/4/1 DC32 DC36
ISL6324ACRA/QFN48 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K 2SK4212/TO252/1200pF/7.8m
49

DR48 PH_NB

3
100K/4/1 UGATE_NB DR52 2.2/6 VCORE_NB
DR47 10K/4/1
PWM4 VCC PHASE_NB DL5 0.6u/40A/IMD129/W/D

2
ISEN4-

ne
VCC DQ15
DR53
BOTTOM PAD CONNECT Disable PWM4 Use 3 Phase 2.2/6 DR54 DR55
TO GND THROUGH 8 VIA 0/4/SHT/X 0/4/SHT/X

3
LGATE_NB DC22
2SK4213/TO252/1700pF/6m 1N/4/X7R/50V/K
VIN12 PH_NB
A A

DRN4 DRN5 ISEN_NB


7 8 PWM_VID3 PWM_VID0 1 2 IO_VID0 <29> DR32 2.2/6 DC12 0.1U/6/X7R/25V/K
<6> VID3
5 6 PWM_VID2 PWM_VID1 3 4 IO_VID1 <29> DR6 VCORE_NB
<6> VID2 DU2
do
3 4 PWM_VID1 PWM_VID2 5 6 IO_VID2 <29> 2.2/6
<6> VID1
1 2 PWM_VID0 PWM_VID3 7 8 IO_VID3 <29> 2 1 UGATE3 DC35 1N/4/X7R/50V/K
<6> VID0 BOOT UGATE
1K/8P4R/4 0/8P4R/0402/SHT/X
7
6
PVCC PHASE 8 PHASE3 DC34
DC33
0.1U/6/X7R/25V/K
0.1U/6/X7R/25V/K
GIGABYTE
DR39 1K/4/1 PWM_VID4 PWM_VID4 DR45 0/4/SHT/X DBC8 PWM3 VCC BC25 4.7U/8/Y5V/10V/Z Title
<6> VID4 IO_VID4 <29> 3 PWM
DR43 1K/4/1 PWM_VID5 PWM_VID5 DR44 0/4/SHT/X IO_VID5 <29> 0.22U/6/X7R/16V/K
4 GND LGATE 5 LGATE3 BC26 10U/8/X5R/6.3V/K
PWM ISL6324+6612
<6> VID5 Size Document Number Rev
ISL6612ACBZ-T/SO8 DEC5 820u/FP/D/2.5V/68/7m

1
Custom
GA-M52L-S3P 2.4

+
DEC7 820u/FP/D/2.5V/68/7m
1 Date: Friday, July 09, 2010 Sheet 28 of 32
8 7 6 5 4 3 + 2 1
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8 7 6 5 4 3 2 1

DDR15V_OV2 VCC3
<30> DDR15V_OV2
DDR15V_OV1
VCC3 <30> DDR15V_OV1
VIN6 R107 8.2K/4
RN19
DDR15V_OV2 <22> RTS1-
RTS1- JP2 PD[0..7]
PD[0..7] <22>
8 7 -THRMO R108 8.2K/4
6 5 DDR15V_OV1 <22> DSR1-
DDR15V_OV3 <22> TXD1
TXD1 JP3 VCC
4 3 STB-
2 1 NB_VCC_OV1 <22> RXD1 STB- <22>
8.2K/8P4R/4/X <22> DTR1-
DTR1- JP4 AFD-
AFD- <22>
ERR- BC179 GP40 high for No EC. Low for EC. VCC3

PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
<22> DCD1- ERR- <22>
INIT- 0.01U/4/X7R/25V/K
<22> RI1- INIT- <22>
R27 22/4/X NB_VCC_OV2 SLIN- GP40 R32 8.2K/4/X
SLIN- <22>
ACK- R39 8.2K/4
ACK- <22>

VCC

31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
D D

9
8
7
6
U18
VCC

GNDD

AFD#/GP86/SMBC_R

SLIN#/GP84/SMBD_R
RI1#
DCD1#
DTR1#/JP4
SIN1
SOUT1#/JP3
DSR1#
RTS1#/JP2
FAN_CTRL4/VID_TURBO/GB_O0

GP66/VLDT_EN/GB_O2
GP65/VDDA_EN/GB_O1

GP67/CPU_PG/GB_O3

PD7/GP77/BUSSO2
PD6/GP76/BUSSO1
PD5/GP75/BUSSO0
PD4/GP74/BUSSI2
PD3/GP73/BUSSI1
PD2/GP72/BUSSI0
PD1/GP71
PD0/GP70
STB#/GP87/SMBC_M

ERR#
INIT#/GP85/SMBD_M

ACK#/GP83
CTS1- 32 5 BUSY BC180 BC181
<22> CTS1- CTS1# BUSY/GP82 BUSY <22>
NB_VCC_OV1 33 4 PE BC183 1U/6/Y5V/10V/Z 1U/6/Y5V/10V/Z
<30> NB_VCC_OV1 PSI_L/FAN_CTL5/CIRRX2/GP16 PE/GP81 PE <22>
<30> NB_VCC_OV2
NB_VCC_OV2 34 SVD/PCIRSTIN#/CIRTX2/GP15 SLCT/GP80 3 SLCT
SLCT <22>
1U/6/Y5V/10V/Z Power issue Power issue
VCC 35 VCC AVCC 2 VCC Power issue 0415 0415 0415
DDR15V_OV3 36 1 VIN0
<30> DDR15V_OV3 VCORE_EN/VID7/GP64 VIN0 VIN0 <21>
37 128 VIN1 close to super i/o
VCORE_GOOD/VID6/GP63 VIN1 VIN1 <21>
FANIO_1 38 127 VIN2
<21> FANIO_1 FAN_TAC1 VIN2 VIN2 <21>
FANPWM_1 39 126 PWOK
<21> FANPWM_1 FAN_CTL1 VIN3/ATXPG PWOK <26,27>
FANIO_2 40 125 VIN4
<21> FANIO_2 FAN_TAC2/GP52 VIN4/VLDT_12 VIN4 <21>
FANPWM_2 41 124 VIN5
<21> FANPWM_2 FAN_CTL2/GP51 VIN5/VDDA_25 VIN5 <21>
FANIO_4 42 123 VIN6
<21> FANIO_4 FAN_TAC3/GP37 VIN6/VDIMM_STR
FANPWM3 43 122 BC17 2.2n/4/X7R/50V/K
<21> FANPWM3 FAN_CTL3/GP36 VREF VREF <21>
<28> IO_VID5 44 VID5/GP35 TMPIN1 121 TMPIN1 <21>
<28> IO_VID4 45 VID4/GP34 TMPIN2 120 TMPIN2 <21> CPU Thermal Diode Differential Pair
46 GNDD TMPIN3 119 TMPIN3 <6,21>
47 118 R478 0/6S/X Other Signal
<28> IO_VID3 VID3/GP33 TSD- GNDA <6>
48 117 I_GNDA R479 0/6S/X
<28> IO_VID2
<28> IO_VID1 49
50
VID2/GP32
VID1/GP31 IT8720F ( GB ) GNDA
RSMRST#/CIRRX1/GP55 116
115 -THRMO TMPIN3+
15mil
<28> IO_VID0
RXD2 VID0/GP30 PCIRST3#/GP10/VDIMM_STR_EN -THRMO <16> 10mil
51 114 MCLK <22>
<22> RXD2 TXD2 52
VIDO5/GP27/SIN2 MCLK/GP56
113
TMPIN3- 12mil
<22> TXD2 DSR2- VIDO4/GP26/SOUT2 MDAT/GP57 MDAT <22> 10mil
<22> DSR2-
53 VIDO3/FAN_TAC4/GP25/DSR2# KCLK/GP60 112 KCLK <22>
RTS2- 54 111 15mil
<22> RTS2- VIDO2/FAN_TAC5/GP24/RTS2# KDAT/GP61 KDAT <22> Other Signal
SPI_MOSI 55 110 GP40
SPI_CLK R24 22/4 SP_CLK GP23/SI 3VSBSW#/GP40 DBIOS_RST-
56 GP22/SCK PWROK2/GP41 109 DBIOS_RST- <26>
<22> DCD2- 57 VIDO1/GP21/DCD2# SUSC#/GP53 108
<22> CTS2- 58 VIDO0/GP20/CTS2# PSON#/GP42 107 -ATX_PSON <27,30>
C 59 106 C

SST/AMDTSI_D/PECI_AVA/MTRB#
<22> RI2- VIDO6/GP17/RI2# PANSWH#/GP43 KPS_IN_IO <26>
DTR2- JP6 60 105
<22> DTR2- -ITE_SPI_CS VIDO7/JP6/DTR2# GNDD
61 RESETCON#/CIRTX1/CE_N PME#/GP54 104 -LPCPME <16>
62 SVC/PECI_RQT/GP14 PWRON#GP44 103 -PSOUT <16>
63 PWROK1/GP13 SUSB# 102 -SLP_S3 <16,27,30>

PECI/AMDTSI_C/DRVB#
64 PCIRST1#/GP12 GP46/IRRX 101 BEEP- <26>
65 PCIRST2#/GP11 VBAT 100 VBAT <16>
VCC 66 99 COPEN-
R480 0/6S/X VCC COPEN# IO_VCCH C204 R52 COPEN- R222 1M/4
VCC3 67 VIDVCC VCCH 98 <26> COPEN- RTCVDD
<14> -LPCRST
-LPCRST 68 LRESET# IRTX/GP47/CE2_N/JP7 97 JP7 BC177 1U/6/Y5V/10V/Z 8.2K/4

KRST#/GP62
<14> -LDRQ0 JP1 69 LDRQ#/JP1 DSKCHG# 96 0.047U/4/X7R/16V/K C174
0.01U/4/X7R/25V/K
LFRAME#

GA20/JP5

DENSEL#
SO/GP50

WGATE#
WDATA#

RDATA#
HDSEL#
SERIRQ

PCICLK

INDEX#
BC178 BC176 BC182

MTRA#

DRVA#

STEP#

TRK0#
CLKIN
GNDD

m
WPT#
LAD0
LAD1
LAD2
LAD3
3.9N/4/X7R/50V/K 0.1U/6/X7R/25V/K 4.7U/8/Y5V/10V/Z 3VDUAL

DIR#
Power issue
0415 IIT8720F-S-JX(GB)/S CEB_N R172 33/4 -ITE_SPI_CS1
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
DSKCHG- <22>
VCC3 R483 1K/4/X CEB_N: Low=>Disable Dual BIOS

co
<14> SERIRQ WPT- <22> High: Enable Dual BIOS. Pull at
LAD0
LAD1
LAD2
LAD3

<14> -LFRAME INDEX- <22> BIOS side


TK00- <22>
RDATA- <22>
LAD[0..3] WGATE- <22>
IO_VCCH KR1 0/6S/X ATX5VSB
<14> LAD[0..3] SIDE1- <22>
STEP- <22>
<16> -KBRST DIR- <22>
<16> A20GATE JP5 WDATA- <22>
<14> LPC33 SPI_MISO
DRVA- <22>

a.
B <16> LPC24 B
MOTEA- <22>
DENSEL- <22>
C205
10P/4/N/50V/X

IT8720GB Power On Strapping Options


Symbol value Description
JP1 1 Disabled.
Flashseg1_EN
Pin 69 0 Flash I/F Address Segment 1 is enabled

si
VCC3
JP2 1 Disable VID output pins IT8720CX->FX(and later) strapping change. JP1 no use, JP3 change to Low. M_BIOS
VIDO_EN Backup BIOS
Pin 25 0 Enable VID output pins R248 1K/4/1
VCC
-ITE_SPI_CS 1 CS# VDD 8 BC201 0.1U/6/X7R/25V/K

JP3 JP2 RTS1- R249 680/4/X SPI_MISO 2 SO HOLD# 7 -SPI_HOLD0 -SYS_RST


-SYS_RST <16,26>
CHIP_SEL Chip selection in Configuration

3
Pin 27 R269 1K/4/1/X
-BIOS_WP 3 WP# SCK 6 SPI_CLK
Q5
VCC D
JP4 1 K8 power sequence disabled 4 VSS SI 5 SPI_MOSI 2N7002/SOT23/25PF/5
K8PWR_EN JP3 TXD1 R251 680/4 OK G S
Pin 29 0 K8 power sequence enabled Low: EN SPI

ne
8M/SPI/SO8/200mil/S

1
11 Half Run Default value of EC Index 15h/16h/17h is 40h R264 1K/4/1
VCC
JP3 & B_BIOS PWOK R252 100K/4/1 DBIOS_RST-
10 No Run Default value of EC Index 15h/16h/17h is 7Fh JP4 DTR1- R240 680/4/X Backup BIOS
JP5 FAN_CTL_SEL -ITE_SPI_CS1 1 8 VCC3
CS# VDD
Pin 27 & 01 Full Run Default value of EC Index 15h/16h/17h is 00h R247 1K/4/1 SPI_MISO -SPI_HOLD0
BC2
10u/8/X5R/6.3V/K
2 7
A
Pin 77 00 75% Run Default value of EC Index 15h/16h/17h is 20h
VCC3 SO HOLD# A

JP5 A20GATE R246 680/4/X -BIOS_WP 3 WP# SCK 6 SPI_CLK


JP5 1 Disable WDT to rest PWROK Fix AC first time can't boot issue.
WDT_EN 4 VSS SI 5 SPI_MOSI
do
Pin 77 0 Enable WDT to rest PWROK R131 1K/4/1
VCC3
JP6
JP6 1 Disable SVID Function DTR2- R129 1K/4/X 8M/SPI/SO8/200mil/S VCC3
GIGABYTE
SVID_EN RN4 Title
Pin 60 0 Enable SVID Function -BIOS_WP 1 2 1K/8P4R/4
JP7 R133 1K/4/1
VCC3
SPI_MISO 3 4 ITE 8718 HX GB
JP7 1 Enable Dual BIOS Function for GigaByte Only -SPI_HOLD0 5 6
Size Document Number Rev
Dual_BIOS_EN CEB_N R128 1K/4/X SPI_MOSI 7 8
Pin 97 0 Disable Dual BIOS Function for GigaByte Only Custom GA-M52L-S3P 2.4
-ITE_SPI_CS R105 1K/4/1
Date: Friday, July 09, 2010 Sheet 29 of 32
8 7 6 5 4 3 2 1
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5 4 3 2 1

HT_EN VCC3
5VSB

3
WQ26
D
WR41 WBC1 WL1
G S
1K/4/1 2N7002/SOT23/25PF/5/X 0.1U/4/Y5V/16V/Z 1.2uH/20A/PMU109/W/D
Ripple current concern

1
HT_EN_G HT_EN_G 0.047u/4/X7R/16V/K
WC9 WR11 20K/4/1

3
WQ20 WC11=>Charge pump CAP close to pin1 and 8 WC6 1 1
WC8 10p/4/NPO/50V/J 0.1U/4/Y5V/16V/Z + WEC5 BC28 + WEC8
WU3 1000U/D/6.3V/8C/30m 4.7U/8/Y5V/10V/Z 1000U/D/6.3V/8C/30m

2
D 8 1 WU3BOOT WQ1 D

1
WR39 8.2K/4 HTVDD_EN_G PHASE BOOT
<16> HTVDD_EN
MMBT2222A/SOT23/600mA/40 HT_EN 7 2 NBVCCU_G
COMP/SD UG
WC2 HT_EN_WIN 6 3 WC11 2SK4212/TO252/1200pF/7.8m

3
0.1U/4/Y5V/16V/Z FB GND WR20
WR17 2.2/6 5 4 8.2K/4 0.1u/6/X7R/25V/K VCC12
+12V VCC LG/OCSET 25V
ISL6545CBZ/S NBVCCPHASE WL4 2uH/20A/IEP109/D
WC4

2
0.1u/6/X7R/25V/K WR21 WQ2
8.2K/4 WR16 1
2.2/6 WR37 + WEC6
For 6545 2SK4212/TO252/1200pF/7.8m WC16 1K/4/1 1000U/D/6.3V/8C/30m
0.1u/4/Y5V/16V/Z/X

3
HT_EN2 NBVCCL_G
HT_EN2 <26>
HT_EN_G 5VSB VREF=0.6V for 6545 WC14

3
ISL6545 PIN7 is enable pin. 1n/4/X7R/50V/K
Snap close to choke input pin
WR44 WQ22 D Pull to Gnd is shoutdown. WR38
0/4 WR43 1K/4/1
G S
1K/4/X 2N7002/SOT23/25PF/5
WD1
HT12_EN_G 1.69K/4/1=>1.1V, 2.32K/4/1=>1.3V

1
HT12_EN_G 5VSB VCC3 3VDUAL VCC VCC3 WR8 4.3K/4/1
<29> NB_VCC_OV1
3

WR9 1.87K/4/1
<29> NB_VCC_OV2
WQ27 WBC16 WBC11 WBC12 WBC13 WBC23
0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K 0.1U/6/Y5V/25V/Z/X 0.1U/6/X7R/25V/K 0.1U/6/X7R/25V/K
BAT54A/SOT23/200mA

SOT23
MMBT2222A/SOT23/600mA/40/X
2

WR42 8.2K/4/X HT12_EN 5VDUAL


VCC12
C C
Make VC12_HT and VCC11 rise at same time.
WC17
0.1U/4/Y5V/16V/Z/X WBC2
0.1U/4/Y5V/16V/Z WL2
1.2uH/20A/PMU109/W/D

0.047u/4/X7R/16V/K
WC10 WR10 20K/4/1
WC5 1 1
0.1U/4/Y5V/16V/Z + WEC10 + WEC11

m
WC7 10p/4/NPO/50V/J WU1 1000U/D/6.3V/8C/30m 1000U/D/6.3V/8C/30m

2
8 1 WU1BOOT WQ3
DDR15V_EN PHASE BOOT
DDR15V_EN 7 2 DDR15VU_G
5VSB COMP/SD UG 2SK4212/TO252/1200pF/7.8m
3

DDR15_EN_WIN 6 3

3
FB GND

co
WR19 WC12 DDR18V
D +12V
WQ18 2N7002/SOT23/25PF/5 WR18 2.2/6 5 4 8.2K/4 0.1u/6/X7R/25V/K
VCC LG/OCSET
1.8V@20A max
WR32 WQ5 25V
G S 5VDUAL
1K/4/1 ISL6545CBZ/S DDR15V_PHASE WL3 2uH/20A/IEP109/D
BAT54C/SOT23/200mA WC3
2

2
0.1u/6/X7R/25V/K WR22 For 6545 WQ4 1 1 1
12K/4/1 WR14 WR36 + WEC3 + WEC2 + WEC1
2.2/6 WC15 3K/4/1
3

2SK4212/TO252/1200pF/7.8m WC1
WQ19 WC20 0.1u/4/Y5V/16V/Z/X

3
0.1U/6/Y/25V/X WC13
DDR15VL_G 1n/4/X7R/50V/K 0.01U/4/X7R/25V/K 1000U/D/6.3V/8C/30m

a.
B 1000U/D/6.3V/8C/30m B
2

VREF=0.6V for 6545 WR35 1000U/D/6.3V/8C/30m


WR34 8.2K/4 1.43K/4/1
<16,26> -SLP_S5
MMBT2222A/SOT23/600mA/40
WD2
WC31 WR12 13.3K/4/1 Default 1.875V
<29> DDR15V_OV1
1U/6/Y5V/10V/Z
WR13 6.65K/4/1
<29> DDR15V_OV2
BAT54A/SOT23/200mA

SOT23
WD3

si
WR15 3K/4/1
<29> DDR15V_OV3
DDR18V

BAT54A/SOT23/200mA

SOT23
WBC24 WBC25
0.1U/6/X7R/25V/K 4.7U/8/Y5V/10V/Z
DDR15V_EN
DDR18V
3

VCC
WU2

ne
D
WQ25
G S
1 VIN VREF2 8
2N7002/SOT23/25PF/5 WR1
1K/4/1 2 7
2

3 1

-ATX_PSON GND ENABLE


<27,29> -ATX_PSON
3 VREF1 VCNTL 6
A
WQ21 A
4 5
GND

DDRVTT VOUT BOOT_SEL


WR2
1K/4/1 WBC29
2

W83312SN/SO8/3A 0.1U/6/X7R/25V/K
9

do
WR40 20K/4/1
<16,27,29> -SLP_S3
MMBT2222A/SOT23/600mA/40 1 4 VIA to GND
+ WEC7
WC30 WBC30 GIGABYTE
1U/6/Y5V/10V/Z 0.1U/4/Y5V/16V/Z 1000u/D/6.3V/8C/36m/X Title
DDR POWER
Size Document Number Rev
Custom
GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 30 of 32
5 4 3 2 1
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5 4 3 2 1

LX1 DVDD33 LFB7 0/8/SHT/X VDDREG VDDREG: power source for


25M/20p/30ppm/49US/20/D 3VDUAL
RTL8211CL internal regulator use.
MII_XTAL2 MII_XTAL1 -MII_INTR = CONFIG7
LBC25 LBC26
LC1 LC2 22u/8/X5R/6.3V/M/X 1U/6/Y5V/10V/Z/X
PU RESISTOR AT SB PAGE
27P/4/NPO/50V/J 27P/4/NPO/50V/J LFB1 DVDD33
30/6/4A/S
8201EL: LFB7, LBC25, LBC26 NC

MII_XTAL1 DVDD33
MII_XTAL2 LBC1 LBC2 LBC3 LBC4 LBC5 LBC6 LBC8 LBC9
PHY_VDD12
22u/8/X5R/6.3V/M 1U/6/Y5V/10V/Z 0.01U/4/X7R/25V/K 0.01U/4/X7R/25V/K 0.01U/4/X7R/25V/K 0.01U/4/X7R/16V/K/X 1U/4/X5R/6.3V/K 0.01U/4/X7R/25V/K
D VDDREG MIIRXER LR2 0/4 ENREG_MII_RXER D
PHY_VDD12 ENREG_MII_RXER <13>
VDDREG COL LR3 0/4 MII_COL
MII_COL <13>
RSET
LR2, LR3, LR4 => NC for RTL8211CL DVDD33
FB12 LR6 0/4/SHT/X LFB8 4.7uH/0.5A/2520/S/X REGOUT
PHY_VDD12
1
DVDD33 +
LBC30 LBC29 LEC1
1U/6/Y5V/10V/Z/X 22u/8/X5R/6.3V/M/X LBC7 100U/D/10V/57
0.01u/4/X7R/25V/K
For 8201EL
8201EL: LFB8, LBC29, LBC30, LR6 NC
LBC12 LBC14 LBC18

48
47
46
45
44
43
42
41
40
39
38
37
LU1 1U/4/X5R/6.3V/K 0.1U/4/Y5V/16V/Z 1U/4/X5R/6.3V/K

REGOUT/PWOUT12A

RSET

LED2RXDLY/COLMII/SNIB
GND

DVDD12/PWOUT12D
ENREG/RXER/FXEN
VDDREG
VDDREG
CKXTAL2
CKXTAL1
AVDD33

DVDD33
LR13 for 8211CL
G_MDI0+ 1 36 CRS LR4 0/4 MII_CRS
MDI[0]+ V12/CRS_RPTR MII_CRS <13>
G_MDI0- 2 35 LED1 LR13 22/4/X LED1_PHYAD1
FB12 MDI[0]- LED1/PHYAD1 LED0 LR14 22/4/X LED0_PHYAD0 CRS LR17 0/4/X
3 FB12 LED0/PHYAD0 34 PHY_VDD12
G_MDI1+ 4 33
MDI[1]+ GND
G_MDI1- 5 MDI[1]- CLK125 32 LR21 1K/4/1/X 3VDUAL For 8201EL
DVDD33 6 AVDD33 MDIO 31 MDIO
MDIO <13>
LR11 1.RTL8211CL: LR11=>NC
7 30 MDC 4.7K/4
2.RTL8201EL: LR17=>NC
G_MDI2+
G_MDI2-
8
9
GND
MDI[2]+ RTL8211CL MDC
PHYRSTB 29
28
MII_RESET-
PHY_VDD12
MDC <13>
MII_RESET- <13>
MDI[2]- DVDD12 TXCTL
PHY_VDD12
G_MDI3+
10
11
AVDD12
RTL8201EL TXCTL/TXEN 27
26 MII_TXD3
TXCTL <13>
RXCTL/RXDV/RMII

MDI[3]+ TXD3 MII_TXD3 <13> 3VDUAL


C G_MDI3- 12 25 MII_TXD2 C
MDI[3]- TXD2 MII_TXD2 <13>
EMI...
RXD1/TXDLY

LRN1 NV DG V13 MDIO LR34 1.5K/4/1 8201EL: LR34=>1.5K.


RXD2/AN0
RXD3/AN1

8211CL: LR34=>8.2K
DVDD33

MII_RXD0 MIIRXD0 DVDD33 LBC10 4.7K/4 MII_RESET- LR43 8.2K/4/X


<13> MII_RXD0 1 2
RXD0

TXD0
TXD1
MII_RXD1 3 4 MIIRXD1
GND
RXC

TXC
<13> MII_RXD1
MII_RXD2 5 6 MIIRXD2 LR38 2.49K/4/1 RSET
<13> MII_RXD2
MII_RXD3 7 8 MIIRXD3
<13> MII_RXD3
RTL8201EL-GR/LQFP48
13
14
15
16
17
18
19
20
21
22
23
24

0/8P4R/4

RXCTL
<13> RXCTL
MIIRXD0

m
DVDD33
MIIRXD1
MIIRXD2
MIIRXD3 For RTL8211CL
RXCLK_PHY
DVDD33
LED0 LR25 8.2K/4 3VDUAL PHY address: 00 or 01 or 02 or

co
TXC LR48 8.2K/4/1 LED1 LR49 8.2K/4/X
MII_TXD0 MII_TXD1 MIIRXD2 LR28 8.2K/4/X
3VDUAL 03=> Inform BIOS
<13> MII_TXD0 MII_TXD1 <13> DVDD33
MIIRXD3 LR46 8.2K/4/X
3VDUAL

LR8 0/4/X ENREG_MII_RXER


DVDD33 LR7 0/4/X MIIRXER LR10 0/4/X MII_COL
LR12 0/4/X MII_CRS
8211CL: LR7=>0, LR9=>NC. ENREG_MII_RXER: High: RGMII NOT USED NC LBC15
LR9 0.1U/4/Y5V/16V/Z
8211EL: LR7=>NC, LR9=>4.7K. Enable , Low: Disable
4.7K/4
switching regulator DVDD33

a.
B B
LR41 8.2K/4 RXCTL LR39 8.2K/4/X

<13> TXCLK
TXCLK LR19 0/4 TXC RXCTL for 8201EL: High=>RMII mode, Low=>MII mode
DVDD33
LED_SELECT
RXCLK LR18 0/4 RXCLK_PHY
<13> RXCLK
8211CL: LR20=>NC, LR22=>0.
LR32 8.2K/4/X MIIRXD1 LR33 8.2K/4/X
LC8 LR36 8.2K/4 COL LR37 8.2K/4/X
8201EL: LR20=>0, LR22=>NC.
27P/4/NPO/50V/J/X
8211B: TXDLY/RXDLY pull down, LR20 0/4 LED0

si
8201N: TXDLY pull up,RXDLY pull down LED_SEL LR22 0/4/X LED1_PHYAD1 FUSEVCC

1
+ LEC2
1000U/D/6.3V/8C/30m
EMI
COL_D2 LC3 0.01U/4/X7R/25V/K

ne
USB_LAN U5
LBC22 0.01U/4/X7R/25V/K L1 D1 LR40 0/6/SHT/X FUSEVCC
G_MDI0+ L2 -USBP2 1 6 -USBP3
G_MDI0- L3 D2 COL_D2 LR15 0/4/X COL LR15 for 8211CL
G_MDI1+ L4 LR16 0/4 LED1 LR16 for 8201EL 3VDUAL_LED 3VDUAL 2 5
G_MDI1- L5
A
G_MDI2+ L6 D3 LED_SEL LR42 330/6/X LR35 0/6/SHT/X +USBP2 3 4 +USBP3 A
G_MDI2- L7
G_MDI3+ L8 D4 LED0_PHYAD0 LR44 330/6 For LED pull-up.
G_MDI3- L9 CM1293A-04SO/S
LBC23 0.01U/4/X7R/25V/K L10 U1 FUSEVCC LR44 for 8211CL
do
U2 -USBP2
-USBP2 <16>
U3 +USBP2 LC5 LC6
+USBP2 <16>
UP U4 0.01U/4/X7R/25V/K 0.01U/4/X7R/25V/K FUSEVCC
GIGABYTE
U5 FUSEVCC
U6 -USBP3 Title
-USBP3 <16>
U7 +USBP3
+USBP3 <16>
UBC6
RTL 8201CL
DOWN U8
0.1u/6/X7R/25V/K Size Document Number Rev
USB+LAN/100/GO,Y/OS/RA/D/1 Custom GA-M52L-S3P 2.4
Date: Friday, July 09, 2010 Sheet 31 of 32
5 4 3 2 1
in
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