An Improved Digital-Dimming Controller for Back-light Module
Applying Frequency-Shift Technique
Chang-Hua Lin, Liang-Rui Chen*, and Kai-Jun P;ai
Department o f Electronic Engineering
' St. John's & St. Mary's Institute afTechnology
Taipei 25 I , Taiwan,R. 0. C.
Absfracf- A novel simple control method to improve the
ignition behavior of cold cathode fluorescent lamp in
digital-dimming mode is proposed in this paper. The half-bridge
resonant inverter is employed in the presented back-light system.
To extend the lamp life, we realize a digital-dimming controller
with frequency-shift technique (DDC-FST) to reduce the high
ignition voltage and to eliminate the ignition current spike.
Complete &analysisand design considerations are discussed in
detail in this paper. Simulation and experimental results are close
to the theoretical prediction. The overall elfciency of the system
achieved at the rated power is over 91%. The ignition voltage is
reduced ahout 30% without any lamp current spike occurred
under digital-dimmingoperation.
I. INTRODUCTION
In flat display panel (FDP) technologies, back-light module
is a crucial component for driving light source and its
performance will dominate the display quality of FDP. The
LCD with cold cathode fluorescent lamp (CCFL) satisfies the
demand on display performance, size, and efficiency [l-21. In
consideration of the cost, efficiency, and uniformity ratio of
illumination, the CCFL is still the best choice. FDP, PDA, GPS,
and portable instruments are examples of back-light
applications [3-41. In general, LCD back-light inverter can be
classified into two categories based on its power stage structure
[8-15]. One category is using the two-stage topology or
so-called current-fed push-pull parallel-resonant inverter
(CP-PRI); the other category is employing a single-stage
topology or called half-bridge parallel-resonant inverter
(HB-PRI).
Recently, numerous circuit topology and control strategies
are proposed to raise the system performance [S-91. To achieve
the dimming capability, an additional control circuit is essential.
There are three familiar methods in use today, which are
duty-ratio control, frequency control, and voltage control, lo
dim the gas discharge lamp. The duty-ratio control is easy to
regulate the lamp current, but the asymmetrical lamp current
and higher lamp crest factor will result in discoloration of the
lamp [5-61. The frequency control is the most common
technique to control the lamp current. However, the dimming
0-7803-7906-3/03/$17.0002003 IEEE.
*Department of Aeronautical Engineering
National Huwei Institute ofTcchnolagy
Yunlin 632, Taiwan, R. 0. C.
range is restricted by the switching frequency range and the
soft-switching is not easy to achieve over the entire switching
frequency range. Although the voltage control has good
dimming performance, the circuit is too complicated to
practically use [7] for low power applications.
Nowadays, digital-dimming control is a new technique to
modulate the brightness of the CCFL. Basically, this method
will widen the dimming range. Nevertheless, the lamp life is
reduced seriously due to the restriking caused by current spikes
during operation. For extending the lamp life, current spikes
must be suppressed by a proper control strategy. In this paper, a
novel DDC-FST for the single-stage back-light electronic
ballast is proposed. The employed back-light system
incorporates the DDC-FST to dim the lamp luminance, and
integrates feedback circuit to raise the system stability. The
prototype of this back-light system presents the high efficiency
without modifying original (compensation circuit. A design
procedure and complete measured results are both discussed in
detail.
11. ANALYSIS O F SINGLE-STAGE BACK-LIGHTRESONANT
INVERTER
The two-stage back-light system is a basic and conventional
topology, which has been used for years in many practical
applications. Fig. 1 shows the typical topology of two-stage
back-light system, which general includes a buck stage and a
current-fed push pull resonant inverter, and then possesses low
cost and low efficiency characteristics. The buck stage is used
to regulate the input current far the push-pull inverter stage [2].
There are lots of advantages for this topology such as low
current harmonics comparing with the voltage source inverter
(VSI), no isolation of the power switches SI and Sz required for
the driver circuit [3], [ 161, and the reduction of leakage current
resulted from parasitic capacitance by utilizing floating lamp
structure and primary-side dimming control [3]-[4]. However,
the mentioned techniques improve the efficiency only about
5% for CCFL driver circuit due to the structure of two-stage
topology. Single-stage design shown in Fig. 2 is the hest way to
enhance the overall efficiency of back-light modules. Fig. 3a is
the circuit diagram of HB-PRI presented in this paper, which is
composed of choke inductor LR,resonant capacitor CR,ballast
496
capacitor CB,and two alternative switching power switches SI, The reflected secondary impedance includes ballast
S2. This circuit is also accompanied with the boost transformer capacitor CB, lamp impedance, and parasitic capacitances. To
T I to generate sinusoidal voltage and current for driving CCFL. simplify the circuit model, we neglect parasitic capacitances,
The equivalent circuit is shown in Fig. 3b, where the choke and replace the CCFL with R! as shown in Fig. 3c. Hence, the
inductor LR,the magnetizing inductance L,of the transformer resonant frequencyf, can be given as
TI, resonant capacitor CR, and reflected secondary impedance 1
constitute the resonant tank. f, =-
2 a m
where

c=c,+c,
N'C,
c, =
1 + 02C:R:

Dimming
C.""Ol
In order to ensure that the CCFL can be started in normal
situation, a boost transformer TI with tums ratio N determined
Fig. 1 Typical block diagram of the two-stage back-light system for CCFL
by the lowest input voltage V,,,, and the start voltage V,,m,,,,,
should be satisfied with the following equation:

I -
where N,, N, are turns of primary and secondary respectively
[17]. Since the CCFL has negative dynamic impedance after
igniting, the ballast capacitor Ce is required to stabilize the
lamp current [3]. For reducing the nonlinear behavior of the
CCFL, the reactance of Ce is arranged to be greater than the
CCFL impedance. The transfer function of lamp voltage vt
versus v,+ can he calculated from Fig. 3b by sinusoidal
Fig. 2 The proposed single-stage back-light system with modified approximation as follows:
digitaldimming control.
v,(j@ = NLm j G R , (7)
v,,(jo) L,+L, l - d L ( N ' C , +C,)+jw(C,R,-o'C,C,LR,)
The magnitude of (7) is obtained as

From (S), we see that the lamp voltage vt is closely related to

input voltage, operating frequency, lamp characteristics,
transformer characteristics (L, and N), and resonant tank
components (LRand CR).

Fig. 3 @)Half-bridge resonant invener, (b)equivalent circuit of Fig. 3a, Fig. 4 Conventional analog dimmer with potentiometer
(c)simplifisd equivalent of Fig. 3b

497
 1
-LPosal
Fig. 5 Schematic of IOW frequency dimming control.
Fig. 6 Waveforms of lamp voltage, lamp curenl, and LFD signal.
111. IMPROVED DIGITAL-DIMMING CONTROLLER FOR
SINGLE-STAGE BALLAST
Dimming control is used to conserve battety capacity as
ambient illumination is permitted. Fig. 4 shows the typical
configuration of the conventional dimming control circuit. The
dimmer regulates the lamp luminance by adjusting R, via
feedback loop [ 2 ] . The voltage on D, is a rectified half
waveform which is proportional to the detected lamp current.
The drawbacks of this technique are nonlinear and low
conversion efficiency especially in low level luminance. Fig. 5
shows the digital-dimming technique, which controls the
lamp's on and off duration by low frequency dimming (LFD)
gating signal at rated lamp current. In other words, the average
lamp brightness is inversely to the duty cycle of gating signal.
However, this method may significantly reduce the lamp life
' because the CCFL is struck repeatedly during dimming
operation as shown in Fig. 6 . To eliminate the above-mentioned
high ignition voltage and high lamp current spike, a novel
control strategy and its realization circuit are both proposed in
this paper.
Fig. 7 A comparison of CGntlOl strategies between hard-start and soft-stan
498
Fig. 8 Block diagram ol'the proposed DDC-FST.
Fig. 9 Equivalent circuit oftheDDC-FSTwith feedback control.
Fig. 7 shows the comparison of ignition characteristics of
two different methods for CCFL, where the hard-start is a
conventional igniting technique with constant frequency drives
and the soft-start is the proposed method. The soft-start
employs frequency-shift technique and substantially reduces
ignition voltage and lamp current spike by continuous
variable-frequency drives. The block diagram of the proposed
digital-dimming controller with frequency-shift technique
(DDC-FST) is configured as shown in Fig. 8, in which
waveforn-shaping circuit, voltage-controlled current source,
variable-frequency oscillator, and MOSFET gate driver are
included. In addition, we will select the optimal circuit
parameters of DDC-FST to eliminate the lamp current spike for
achieving the theoretical predi,:tions. Fig. 9 is a designed circuit
example of DDC-FST based on the block diagram of Fig. 8. In
this circuit, a low pass filter receives the standard LFD signal
and outputs an exponential-type signal vLFD to regulate the
voltage-controlled current source (VCCS).
Fig. 10 simulates the complete behaviors of the proposed
DDC-FST during frequency-shift phase. CCFL is in full
luminance or at rated power, and the operating frequency f =
62kHz while LFD signal is low. When LFD signal goes from
low to high, the filtered signal vLFD rises gradually and
generates auxiliary current i, to Cl, then the operating
frequency of vcris changing fi-om 62kHz to 82kHz as shown in
Fig. 10. In other words, with the additional current component,
the operating frequency of MOSFET gate driver is increasing
and shifting away from the normal operating point so as to tum
off the CCFL. As LFD signal goes from high to low, the
auxilialy current i, drops progressively to decrease the
operating frequency. Then the operating point will move hack
gradually toward the original one, i.e. closer to 62kH2, and
CCFL will be turned on. Therefore. the current of the extemal
capacitor C, is modulated to generate the mentioned ignition
behavior with continuously varied frequency.
.82KHz 82Kllz - 61KHz
Fig. 10 The simulated wavefom of LFD signal, uIFD, i., and vm during
frequency-shiftphase.
m.DESIGN CONSIDERATION AND EXPERIMENTATION
The CCFL is inherently a nonlinear load, and is
characterized by its length, diameter, and structure. The hest
lamp current for driving CCFL is sinusoidal, which keeps the
crest factor near 1.414 so as to reduce EM1 and raise efficiency
[3]. The other approaches presented in [SI may provide higher
luminance hut reduce the lamp life. In this paper, a practical
design example of single-stage hack-light electronic ballast
with digital-dimming controller is presented. A CCFL
FL-26315 is used with rated power of 3.6W; the operating
voltage vt and current i, are 720Vm and 6mA respectively; the
starting voltage v,, is llOOVm. We choose the operating
frequency f ranges between 62kwz and 82kHz, and the input
voltage vD=l2 Voc. The related parameters such as tuns ratio
N, magnetizing inductance L,, resonant inductor Ln, resonant
capacitor CR,ballast capacitor CBare considered as follows:
1) Turns ratio N=N&
The boost transformer should provide enough tums ratio to
ignite the CCFL. By substituting mentioned above
parameters vshn and VDinto (6), we obtain
(9)
2) Resonant inductor LR and resonant capacitor CR
From (9), we get the actual value of tums ratio with 200. In
addition, we have the magnetizing inductance Lm=15pH,
ballast capacitor Ce=IOOpF, lamp resistor R,=vji,=lZOkR,
and operating frequency f =62kHz. By substituting these
parameters into (8), we have
n2
From the preset conditions and (I), we have
Combining (IO) and ( I I ) , the derived parameters for this
design are given by LR=21pH (use 22.3pH), CR=0.96pF(use
W).
3) Time constant of integrator
The LFD signal is converted to exponential-type
waveforms by the integrator as illustrated in Fig. 9.
Generally, the rise time t, and fall time !,of waveforms after
RC-integrating are both around five times of RC. Assume
that the dimming range is set to 5%, then the time constant
should he satisfied the following condition:
I, E 5RC 5 O.OST,, (12)
In Fig. 9, a saw-tooth waveform is compared with a dc
voltage Vd to produce the LFD signal according to the dimming
level. The typical sink current of comparator, for which the
LM358 is employed, is about 20tnA. Therefore, the maximum
value of R in time constant K can he determined as follows:
R,, 5--12"-6OOQ
20mA
The operating frequencyfLFDof LFD signal is usually above
120Hz. IffLFD is too low, the flickering phenomenon will be
induced. However, iffrFD is too high, the dimming range will
he reduced. In this paper, the adopted operating frequencyfLFD
of LFD signal is 120H2, so the period of LFD signal TLPD=II
/&D =8.33ms. According to (12), we can obtain a suitable value
of RC as
RC 5 O.OlT,, = 83.3,uS (14)
In order to satisfy the above-mentioned requirement, we
choose R= 410Cl and C=0.2pF.
Fig. 11 shows the typical measured waveforms of LFD
signal, lamp voltage, and lamp current under general
digital-dimming control. As Fig. 11 indicates, the high ignition
voltage and high lamp current spike will significantly reduce
the lamp life. The measured waveforms of the proposed
hack-light system with DDC-FST under 95%, 50%, IO%, and
5% luminance are shown in Fig. 12a-I2d, respectively. In
every dimming level, the lamp voltages and lamp currents are
all under predicted operation mode without spikes. From the
measured results in Fig. 12, it is obvious to note that the
proposed control strategy can effectively overcome the
drawbacks in existing digital-dimming method. Remarkably,
during the dimming range, the luminance of CCFL is shown
stable and uniform in all these levels from low to high. Fig. 13
depicts the measured luminance of CCFL at different duty
499
ratios of LFD signal. It can be seen that the dimming curve
presents good linearity even within wide operating range.
,, .
1 I& ' 'Lfb ' .
k"
. . . :..i .:. . . "

....................... (3
.....................

Fig. II T h e 'ypical waveforms of LFD signal, v,, and i( under

digital-dimming control. (Ver: ZOV/div for LFD Ver:
IOOOVIdiv for v,; Ver: ZOmAidiv for i,; Hor: Zmsldiv)

.............
............
...........

............. ............ ...... .............

............ .....
............. .......... .............
............. ......... .............
CND
0 20 4" M IO ,m
0°C" R*iaalLrOC/,

Fig. 13 Output luminance versus duty ratio of LFD signal. CND

.............

V. CONCLUSION
In this paper, a single-stage back-light module with more GhD

than 91% overall efficiency is realized. The advantages of the

presented back-light system can be summarized as follows.
First, the number of power switches and transformer size are
both reduced. Secondly, the complete feedback control will
enhance the system stability without modifying the original
compensation circuit. Thirdly, The proposed DDC-FST is easy CNI)

to construct. It not only integrates the feedback circuit, but also .........
reduces the ignition voltage over 30% and eliminates the lamp CND
cwrent spikes completely. Therefore, we can conclude that this . . . .
dimming technique is attractive and feasible for extending
CCFL life in FDP.
CND

ACKNOWLEDGMENT
This work was sponsored by the National Science Council, (4
Taiwan, R. 0. C., Project number: NSC91-2213-E-129-007. Fig. 12 Measured waveform of LFD signal, Y. and. i, at.luminance level of
(a)95%, @PO%, (c)lO%, (d)5% Wer: IOV/div for LFD. Vcr:
IOOOVIdiv for v,; Ver: IOmVdiv for i,; Hor: Zmddiv)

500
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