volatile unsigned long delay;

#define GPIO_PORTF_DATA (*((volatile unsigned long *)0x400253FC))

#define GPIO_PORTF_DIR (*((volatile unsigned long *)0x40025400))
#define GPIO_PORTF_AFSEL (*((volatile unsigned long *)0x40025420))
#define GPIO_PORTF_PUR (*((volatile unsigned long *)0x40025510))
#define GPIO_PORTF_DEN (*((volatile unsigned long *)0x4002551C))
#define GPIO_PORTF_LOCK (*((volatile unsigned long *)0x40025520))
#define GPIO_PORTF_CR (*((volatile unsigned long *)0x40025524))
#define GPIO_PORTF_AMSEL (*((volatile unsigned long *)0x40025528))
#define GPIO_PORTF_PCTL (*((volatile unsigned long *)0x4002552C))

#define SYSCTL_RCGC2 (*((volatile unsigned long *)0x400FE108))

#define SYSCTL_RCC_R (*((volatile unsigned long *)0x400FE060))
#define SYSCTL_RIS_R (*((volatile unsigned long *)0x400FE050))
#define SYSCTL_RCC2_R (*((volatile unsigned long *)0x400FE070))
#define SYSCTL_RCGC2_R (*((volatile unsigned long *)0x400FE608))
#define SYSCTL_RCGCTIMER (*((volatile unsigned long *)0x400FE604))

#define Timer0_CTL (*((volatile unsigned long *)0x4003000C))

#define Timer0_CFG (*((volatile unsigned long *)0x40030000))
#define Timer0_TAMR (*((volatile unsigned long *)0x40030004))
#define Timer0_AILR (*((volatile unsigned long *)0x40030028))
#define Timer0_IMR (*((volatile unsigned long *)0x40030018))
#define Timer0_RIS (*((volatile unsigned long *)0x4003001C))
#define Timer0_ICR (*((volatile unsigned long *)0x40030024))

void PortF_Init(void){
SYSCTL_RCGC2 |= (1<<5);
delay = SYSCTL_RCGC2;
GPIO_PORTF_DIR = 0x0E;
GPIO_PORTF_DEN = 0x0e;
}
// 1) activate clock for Port F
// allow time for clock to start
// 5) PF4,PF0 in, PF3-1 out
// 7) enable digital I/O on PF4-0

void timer0_Init(void){

SYSCTL_RCGCTIMER |= 0x01; // Enable Clock

delay = 0; // Allaw Delay
Timer0_CTL &= ~ 0x00000001; // Disable the Timer durning Configuration
Timer0_CFG = 0x00000000; // 32bit Mood
Timer0_TAMR = 0x00000002; // Periodic Mood
Timer0_TAMR |= 0x00000010; // Up Count Mood
Timer0_AILR = 0x04C4B400; // Value for 80000000 in Hex
Assumming 80 MHz
Timer0_CTL |= 0x00000001; // Enable Timer
}
void PLL_Init(void){
// 0) Use RCC2
SYSCTL_RCC2_R |= 0x80000000; // USERCC2
// 1) bypass PLL while initializing
SYSCTL_RCC2_R |= 0x00000800; // BYPASS2, PLL bypass
// 2) select the crystal value and oscillator source
SYSCTL_RCC_R = (SYSCTL_RCC_R &~0x000007C0) // clear XTAL field, bits 10-6
+ 0x00000540; // 10101, configure for 16 MHz crystal
SYSCTL_RCC2_R &= ~0x00000070; // configure for main oscillator source
// 3) activate PLL by clearing PWRDN
SYSCTL_RCC2_R &= ~0x00002000;
// 4) set the desired system divider
SYSCTL_RCC2_R |= 0x40000000; // use 400 MHz PLL
SYSCTL_RCC2_R = (SYSCTL_RCC2_R&~ 0x1FC00000) // clear system clock divider
+ (4<<22); // configure for 80 MHz clock
// 5) wait for the PLL to lock by polling PLLLRIS
while((SYSCTL_RIS_R&0x00000040)==0){}; // wait for PLLRIS bit
// 6) enable use of PLL by clearing BYPASS
SYSCTL_RCC2_R &= ~0x00000800;
}

int main(void) {
//----> Initilize
PLL_Init();
PortF_Init();
timer0_Init();

while(1){
if((Timer0_RIS & 0x00000001) == 1){
GPIO_PORTF_DATA ^= (1<<2);
Timer0_ICR |= (1<<0);
}
}
}