Course Title: Applied Electronics I

Course Code: ECEg 2111

Chapter 3
Bipolar Junction Transistors
(BJTs)
 Introduction
 Glass envelope tubes
 Solid State Era
 First transistor was introduced on December 23,
1947.
Transistor Construction
 The transistor is a three-layer
semiconductor device
consisting of either two n- and
one p-type layers of material or
two p- and one n-type layers of
material.
 Hence, there are two types of
transistors: pnp and npn
 The terminals are labeled:
 E – Emitter(Heavily doped)
 B – Base(Lightly doped)
 C – Collector(Lightly doped)
Contn’d…
 A pnp transistor notation  An npn transistor notation
and symbol and symbol
Transistor Operation

Currents in a Transistor

Biasing
 The DC voltages applied to a transistor in order to turn it
on so that it can amplify the AC signal.
 Any increase in ac voltage, current, or power is the result
of a transfer of energy from the applied dc supplies.
Operating Point
 The DC input establishes an operating or quiescent point
called the Q-point.
The Three States of Operation
 Active or Linear Region Operation
Base–Emitter junction is forward biased
Base–Collector junction is reverse biased
 Cutoff Region Operation
Base–Emitter junction is reverse biased
Collector–Base junction is reverse biased
 Saturation Region Operation
Base–Emitter junction is forward biased
Base–Collector junction is forward biased
The term saturation is applied to any system where levels have reached their
maximum values.
Contn’d…

Fig: Output or collector characteristics for a common-base transistor amplifier.

DC Biasing Circuits
 Fixed-bias circuit
 Emitter-stabilized bias circuit
 Collector-emitter loop
 Voltage divider bias circuit
 DC bias with voltage feedback
 Emitter-follower configuration
 Common-base configuration
 Miscellaneous-bias Configuration
Fixed Bias
 Base current is made constant by using fixed resistor.
Contn’d…
 For the dc analysis the network can be isolated from the
indicated ac levels by replacing the capacitors with an
open-circuit equivalent.
The Base-Emitter Loop

Collector-Emitter Loop

Saturation

Load Line Analysis

Circuit Values Affect the Q-Point
Contn’d…
Contn’d…
Emitter-Stabilized Bias Circuit

Base-Emitter Loop

Collector-Emitter Loop

Improved Biased Stability

Saturation Level
 
Voltage Divider Bias
 This is a very stable bias
circuit.
 The currents and voltages
are nearly independent of
any variations in β.
Approximate Analysis

Voltage Divider Bias Analysis
 
DC Bias with Voltage Feedback
 Another way to improve
the stability of a bias
circuit is to add a feedback
path from collector to base
(Collector Feedback
Configuration).
 In this bias circuit the Q-
point is only slightly
dependent on the
transistor beta, β.
Base-Emitter Loop

Collector-Emitter Loop

Base-Emitter Bias Analysis
 
Emitter-follower configuration
 In this case the output is
taken off the emitter
terminal as shown in Fig.
below.

Fig: Common collecter (emitter

follower)configuration.
Contn’d…
 Applying KVL to the dc 
equivalent of the emitter
follower network given above
to the i/p ckt will result:

Fig: dc equivalent
Common-base Configuration
 The applied signal is connected
to the emitter terminal and the
base is at, or just above, ground
potential.
 In the ac domain it has a very
low input impedance, high
output impedance, and good
gain. Fig: Common base configuration
 Two supplies are used in this
configuration and the base is
the common terminal between
the input emitter terminal and
output collector terminal.
Contn’d…
 
Contn’d…

Transistor Switching Networks
 Transistors with only the DC source applied can be used as
electronic switches.
Switching Circuit Calculations

Switching Time

PNP Transistors
 The analysis for pnp transistor biasing circuits is the same
as that for npn transistor circuits. The only difference is
that the currents are flowing in the opposite direction.
Examples

Solution
a. Applying KVL yields:  With the negative sign
revealing that the junction is
reversed-biased, as it should be
for linear amplification.
e.

b.

c.
d. Using double-subscript notation
yields:
Contn’d…

Contn’d…
a. d.

b.

c.
Contn’d…
 
Contn’d…

Contn’d…
Solution  The network of the Fig.
below can be redrawn as:
Contn’d…
 
Contn’d…


Fig: Inserting the Thévenin

equivalent circuit
Contn’d…
 Accordingly the network is
solved as:
Contn’d…
 Solution
Contn’d…
 Solution
Contn’d…

Contn’d…
6. Determine 𝑉𝐶𝐸𝑄 and 𝐼𝐸𝑄
for the network of Fig.
below:
Contn’d…
Solution
Contn’d…
7. Determine the currents 𝐼𝐸
and 𝐼𝐵 and the voltages
𝑉𝐶𝐸 and 𝑉𝐶𝐵 for the common-
base configuration of Fig.
below.
Contn’d…
Contn’d…
8. Determine the range of
possible values for 𝑉𝐶 for the
network of Fig. below using
the 1𝑀Ω potentiometer.
Contn’d…
9. Determine the level of 𝑉𝐸
and 𝐼𝐸 for the network of Fig.
below.
Contn’d…
10. For the network of Fig.
below, determine:
a. 𝐼𝐸 .
b. 𝑉𝐶 .
c. 𝑉𝐶𝐸 .