XMC_vadc_c

1 /**
2 * @file xmc_vadc.c
3 * @date 2019-12-16
4 *
5 * @cond
6 *****************************************************************************
7 * XMClib v2.2.0 - XMC Peripheral Driver Library
8 *
9 * Copyright (c) 2015-2020, Infineon Technologies AG
10 * All rights reserved.
11 *
12 * Boost Software License - Version 1.0 - August 17th, 2003
13 *
14 * Permission is hereby granted, free of charge, to any person or organization
15 * obtaining a copy of the software and accompanying documentation covered by
16 * this license (the "Software") to use, reproduce, display, distribute,
17 * execute, and transmit the Software, and to prepare derivative works of the
18 * Software, and to permit third-parties to whom the Software is furnished to
19 * do so, all subject to the following:
20 *
21 * The copyright notices in the Software and this entire statement, including
22 * the above license grant, this restriction and the following disclaimer,
23 * must be included in all copies of the Software, in whole or in part, and
24 * all derivative works of the Software, unless such copies or derivative
25 * works are solely in the form of machine-executable object code generated by
26 * a source language processor.
27 *
28 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
29 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
30 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
31 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
32 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
33 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
34 * DEALINGS IN THE SOFTWARE.
35 *
36 * To improve the quality of the software, users are encouraged to share
37 * modifications, enhancements or bug fixes with Infineon Technologies AG
38 * at XMCSupport@infineon.com.
39 *****************************************************************************
40 *
41 * Change History
42 * --------------
43 *
44 * 2015-02-15:
45 * - Initial 
46 *
47 * 2015-02-20:
48 * - Revised for XMC1201 device. 
49 *
50 * 2015-04-27:
51 * - Added new APIs for SHS. 
52 * - Added New APIs for trigger edge selection. 
53 * - Added new APIs for Queue flush entries, boundary selection, Boundary node
pointer. 
54 * - Revised GatingMode APIs and EMUX Control Init API. 
55 *
56 * 2015-06-20:
57 * - Removed version macros and declaration of GetDriverVersion API
58 *
59 * 2015-06-25:
60 * - BFL configuration in channel initialization fixed.
61 *
62 * 2015-07-28:
63 * - CLOCK_GATING_SUPPORTED and PERIPHERAL_RESET_SUPPORTED macros used
64 * - Clubbed the macro definitions for XMC13 XMC12 and XMC14
65 * - Clubbed the macro definitions for XMC44 XMC47 and XMC48
66 * - New APIs Created.
67 * - XMC_VADC_GLOBAL_SetIndividualBoundary
68 * - XMC_VADC_GROUP_SetIndividualBoundary
69 * - XMC_VADC_GROUP_GetAlias
70 * - XMC_VADC_GROUP_GetInputClass
71 * - XMC_VADC_GROUP_ChannelSetIclass
72 * - XMC_VADC_GROUP_ChannelGetResultAlignment
73 * - XMC_VADC_GROUP_ChannelGetInputClass
74 * - XMC_VADC_GROUP_SetResultSubtractionValue
75 *
76 * 2015-12-01:
77 * - Fixed the analog calibration voltage for XMC1100 to external reference upper
supply range.
78 * - Fixed the XMC_VADC_GLOBAL_StartupCalibration() for XMC1100.
79 *
80 * 2016-06-17:
81 * - New macros added XMC_VADC_SHS_FULL_SET_REG,
XMC_VADC_RESULT_PRIORITY_AVAILABLE
82 * and XMC_VADC_SYNCTR_START_LOCATION
83 * - New Enum added XMC_VADC_SHS_GAIN_LEVEL_t and XMC_VADC_SYNCTR_EVAL_t
84 * - Fixed the EVAL configuration in API XMC_VADC_GROUP_CheckSlaveReadiness and
XMC_VADC_GROUP_IgnoreSlaveReadiness
85 * - New APIs added are:
86 * - XMC_VADC_GROUP_SetSyncSlaveReadySignal
87 * - XMC_VADC_GROUP_ChannelGetAssertedEvents
88 * - XMC_VADC_GROUP_GetAssertedResultEvents
89 * - XMC_VADC_GROUP_SetResultRegPriority
90 * - XMC_VADC_GROUP_SetSyncReadySignal
91 * - XMC_VADC_GROUP_GetSyncReadySignal
92 * - XMC_VADC_GROUP_GetResultRegPriority
93 *
94 * 2017-01-11:
95 * - Fix assertion in XMC_VADC_GROUP_CheckSlaveReadiness() and
XMC_VADC_GROUP_IgnoreSlaveReadiness() checking the slave_group parameter
96 *
97 * 2018-06-26:
98 * - Fixed XMC_VADC_GLOBAL_StartupCalibration(), added wait until calibration is
started
99 *
100 * 2019-03-30:
101 * - Changed XMC_VADC_GROUP_SetChannelAlias() to inline function
102 *
103 * 2019-05-07:
104 * - Fix compilation warnings
105 *
106 * 2019-10-18:
107 * - Changed XMC_VADC_GLOBAL_StartupCalibration() to ensure calibration has
started
108 *
109 * 2019-12-16:
110 * - Fix including files following the convention: angle brackets are used for
standard includes and double quotes for everything else.
111 *
112 * 2020-03-18:
113 * - Changed XMC_VADC_GLOBAL_Init() setting ADC clock to 48MHz for XMC1400 series
114 *
115 * @endcond
116 *
117 */
118
119 /*************************************************************************************
********************************
120 * HEADER FILES
121
*************************************************************************************
*******************************/
122 #include "xmc_vadc.h"
123
124 /*************************************************************************************
********************************
125 * MACROS
126
*************************************************************************************
*******************************/
127 #define XMC_VADC_MAX_ICLASS_SET (2U) /**< Defines the maximum number of
conversion parameter sets */
128 #define XMC_VADC_NUM_EMUX_INTERFACES (2U) /**< Defines the maximum number of
external multiplexer interfaces */
129
130 #define XMC_VADC_RESULT_LEFT_ALIGN_10BIT (2U) /**< Defines the 10 bit converted
result register left align mask. It \
131 is used in the
XMC_VADC_GLOBAL_SetCompareValue()
API */
132
133 #define XMC_VADC_SYNCTR_START_LOCATION (3U) /**< Defines the location in SYNCTR
needed for calculations*/
134 /*************************************************************************************
********************************
135 * ENUMS
136
*************************************************************************************
*******************************/
137
138 /*************************************************************************************
********************************
139 * DATA STRUCTURES
140
*************************************************************************************
*******************************/
141
142 /*************************************************************************************
********************************
143 * GLOBAL DATA
144
*************************************************************************************
*******************************/
145
146 #if (XMC_VADC_GROUP_AVAILABLE == 1U)
147
148 #if (XMC_VADC_MAXIMUM_NUM_GROUPS == 4U)
149 static VADC_G_TypeDef *const g_xmc_vadc_group_array[XMC_VADC_MAXIMUM_NUM_GROUPS] = {(
VADC_G_TypeDef *)(void *)VADC_G0,
150 (
151 (
152 (
VADC_G_TypeDef *)(void *)VADC_G3
153 };
154 #else
155 static VADC_G_TypeDef *const g_xmc_vadc_group_array[XMC_VADC_MAXIMUM_NUM_GROUPS] = {(
VADC_G_TypeDef * )(void *) VADC_G0,
156 (
VADC_G_TypeDef * )(void *)VADC_G1
157 };
158 #endif
159
160 #endif
161
162 /*************************************************************************************
********************************
163 * LOCAL ROUTINES
164
*************************************************************************************
*******************************/
165
166 /*************************************************************************************
********************************
167 * API IMPLEMENTATION
168
*************************************************************************************
*******************************/
169
170 /*API to enable the VADC Module*/
171 void XMC_VADC_GLOBAL_EnableModule(void)
172 {
173 /*
174 * Enable Out of Range Comparator for ADC channels pins P2.2to P2.9. This hack is
applicable only for XMC1xxx devices
175 * and in particular the G11 step.
176 *
177 * Please refer to the XMC1000 Errata sheet V1.4 released 2014-06 Errata ID :
ADC_AI.003 Additonal bit to enable ADC
178 * function
179 */
180
181 #if defined (COMPARATOR)
182 COMPARATOR->ORCCTRL = (uint32_t)0xFF;
183 #endif
184
185 #if defined(CLOCK_GATING_SUPPORTED)
186 XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_VADC);
187 #endif
188
189 #if defined(PERIPHERAL_RESET_SUPPORTED)
190 /* Reset the Hardware */
191 XMC_SCU_RESET_DeassertPeripheralReset((XMC_SCU_PERIPHERAL_RESET_t)
XMC_SCU_PERIPHERAL_RESET_VADC );
192 #endif
193 }
194
195 /*API to Disable the VADC Module*/
196 void XMC_VADC_GLOBAL_DisableModule(void)
197 {
198 #if defined(PERIPHERAL_RESET_SUPPORTED)
199 /* Reset the Hardware */
200 XMC_SCU_RESET_AssertPeripheralReset((XMC_SCU_PERIPHERAL_RESET_t)
XMC_SCU_PERIPHERAL_RESET_VADC );
201 #endif
202
203 #if defined(CLOCK_GATING_SUPPORTED)
204 XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_VADC);
205 #endif
206
207 }
208
209
210 /* API to initialize global resources */
211 void XMC_VADC_GLOBAL_Init(XMC_VADC_GLOBAL_t *const global_ptr, const
XMC_VADC_GLOBAL_CONFIG_t *config)
212 {
214 uint32_t reg;
215 #endif
216 XMC_ASSERT("XMC_VADC_GLOBAL_Init:Wrong Module Pointer", (global_ptr == VADC))
217
218 #if (UC_SERIES == XMC14)
219 XMC_SCU_CLOCK_SetAdcClockSrc(XMC_SCU_CLOCK_ADCCLKSRC_48MHZ);
220 #endif
221
222 /* Enable the VADC module*/
223 XMC_VADC_GLOBAL_EnableModule();
224
225 global_ptr->CLC = (uint32_t)(config->clc);
226
227 /* Clock configuration */
228
230 global_ptr->GLOBCFG = (uint32_t)(config->clock_config.globcfg | (uint32_t)(
VADC_GLOBCFG_DIVWC_Msk));
231 #endif
232
233 /* ICLASS-0 configuration */
234 global_ptr->GLOBICLASS[0] = (uint32_t)(config->class0.globiclass);
235
236 /* ICLASS-1 configuration */
237 global_ptr->GLOBICLASS[1] = (uint32_t)(config->class1.globiclass);
238
239
240 /*Result generation related configuration */
241 global_ptr->GLOBRCR = (uint32_t)(config->globrcr);
242
243 #if (XMC_VADC_BOUNDARY_AVAILABLE == 1U)
244
245 /* Boundaries */
246 global_ptr->GLOBBOUND = (uint32_t)(config->globbound);
247
248 #endif
249
250 /* Configure the SHS register that are needed for XMC11xx devices*/
252
253 /* Enabling the Analog part of the converter*/
254 reg = SHS0->SHSCFG | SHS_SHSCFG_SCWC_Msk;
255 reg &= ~(SHS_SHSCFG_ANOFF_Msk);
256 SHS0->SHSCFG = reg;
257
258 /* From the Errata sheet of XMC1100 V1.7*/
259 XMC_VADC_CONV_ENABLE_FOR_XMC11 = 1U;
260 #endif
261
262 }
263
264 /* API to Set the Global IClass registers*/
265 void XMC_VADC_GLOBAL_InputClassInit(XMC_VADC_GLOBAL_t *const global_ptr, const
XMC_VADC_GLOBAL_CLASS_t config,
266 const XMC_VADC_GROUP_CONV_t conv_type, const
uint32_t set_num)
267 {
268
269 XMC_ASSERT("XMC_VADC_GLOBAL_InputClassInit:Wrong Module Pointer", (global_ptr ==
VADC))
270 XMC_ASSERT("XMC_VADC_GLOBAL_InputClassInit:Wrong Conversion Type", ((conv_type) <=
XMC_VADC_GROUP_CONV_EMUX))
271 XMC_ASSERT("XMC_VADC_GLOBAL_InputClassInit:Wrong ICLASS set number", (set_num <
XMC_VADC_MAX_ICLASS_SET))
272
273 #if(XMC_VADC_EMUX_AVAILABLE == 1U)
274 if (conv_type == XMC_VADC_GROUP_CONV_STD )
275 {
276 #endif
277 XMC_UNUSED_ARG(conv_type);
278 global_ptr->GLOBICLASS[set_num] = config.globiclass &
279 (uint32_t)(VADC_GLOBICLASS_CMS_Msk |
VADC_GLOBICLASS_STCS_Msk);
280 #if(XMC_VADC_EMUX_AVAILABLE == 1U)
281 }
282 else
283 {
284 global_ptr->GLOBICLASS[set_num] = config.globiclass & (uint32_t)(
VADC_GLOBICLASS_CME_Msk | VADC_GLOBICLASS_STCE_Msk);
285 }
286 #endif
287 }
288
289 /* API to enable startup calibration feature */
290 void XMC_VADC_GLOBAL_StartupCalibration(XMC_VADC_GLOBAL_t *const global_ptr)
291 {
293 uint8_t i;
294 VADC_G_TypeDef *group_ptr;
295 #endif
296
297 XMC_ASSERT("XMC_VADC_GLOBAL_StartupCalibration:Wrong Module Pointer", (global_ptr ==
VADC))
298
299 global_ptr->GLOBCFG |= (uint32_t)VADC_GLOBCFG_SUCAL_Msk;
300
302 /* Loop until all active groups finish calibration */
303 for (i = 0U; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
304 {
305 group_ptr = g_xmc_vadc_group_array[i];
306 if ( (group_ptr->ARBCFG) & (uint32_t)VADC_G_ARBCFG_ANONS_Msk)
307 {
308 /* This group is active. Loop until it finishes calibration */
309 #if UC_FAMILY == XMC1
310 // wait until calibration is started
311 while ((group_ptr->ARBCFG & (uint32_t)VADC_G_ARBCFG_CALS_Msk) == 0)
312 {
313 __NOP();
314 }
315 #endif
316 while ((group_ptr->ARBCFG) & (uint32_t)VADC_G_ARBCFG_CAL_Msk)
317 {
318 __NOP();
319 }
320 }
321 }
322 #else
323
324 /* Loop until calibration is started */
325 while ((((SHS0->SHSCFG) & (uint32_t)SHS_SHSCFG_STATE_Msk) >> (uint32_t)
SHS_SHSCFG_STATE_Pos) !=
326 XMC_VADC_SHS_START_UP_CAL_ACTIVE )
327 {
328 __NOP();
329 }
330 /* Loop until it finishes calibration */
331 while ((((SHS0->SHSCFG) & (uint32_t)SHS_SHSCFG_STATE_Msk) >> (uint32_t)
SHS_SHSCFG_STATE_Pos) ==
332 XMC_VADC_SHS_START_UP_CAL_ACTIVE )
333 {
334 __NOP();
335 }
336 #endif
337 }
338
339 /* API to set boudaries for result of conversion. Should the boundaries be violated,
interrupts are generated */
340 #if (XMC_VADC_BOUNDARY_AVAILABLE == 1U)
341 void XMC_VADC_GLOBAL_SetBoundaries(XMC_VADC_GLOBAL_t *const global_ptr,
342 const uint32_t boundary0,
343 const uint32_t boundary1)
344 {
345 uint32_t globbound;
346
347 XMC_ASSERT("XMC_VADC_GLOBAL_SetBoundaries:Wrong Module Pointer", (global_ptr == VADC
))
348
349 globbound = 0U;
350 globbound |= (uint32_t) (boundary0 << VADC_GLOBBOUND_BOUNDARY0_Pos);
351 globbound |= (uint32_t) (boundary1 << VADC_GLOBBOUND_BOUNDARY1_Pos);
352
353 global_ptr->GLOBBOUND = globbound;
354 }
355
356 /* API to set an individual boundary for conversion results */
357 void XMC_VADC_GLOBAL_SetIndividualBoundary(XMC_VADC_GLOBAL_t *const global_ptr,
358 const XMC_VADC_CHANNEL_BOUNDARY_t selection,
359 const uint16_t boundary_value)
360 {
361
362 uint32_t globbound;
363
364 XMC_ASSERT("XMC_VADC_GLOBAL_SetBoundaries:Wrong Module Pointer", (global_ptr == VADC
))
365 XMC_ASSERT("XMC_VADC_GLOBAL_SetBoundaries:Wrong Boundary Selection",
366 ((XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 == selection) ||
367 (XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 == selection)))
368
369 /* Program the Boundary registers */
370 globbound = global_ptr->GLOBBOUND;
371
372 if (XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND0 == selection)
373 {
374 globbound &= ~((uint32_t) VADC_GLOBBOUND_BOUNDARY0_Msk);
375 globbound |= (uint32_t) ((uint32_t) boundary_value << VADC_GLOBBOUND_BOUNDARY0_Pos
);
376 }
377 else if (XMC_VADC_CHANNEL_BOUNDARY_GLOBAL_BOUND1 == selection)
378 {
379 globbound &= ~((uint32_t) VADC_GLOBBOUND_BOUNDARY1_Msk);
380 globbound |= (uint32_t) ((uint32_t) boundary_value << VADC_GLOBBOUND_BOUNDARY1_Pos
);
381 }
382 else
383 {
384 /* For MISRA*/
385 }
386 global_ptr->GLOBBOUND = globbound;
387
388 }
389
390 #endif
391
392 /* API to set compare value for the result register. Result of conversion is compared
against this compare value */
393 void XMC_VADC_GLOBAL_SetCompareValue(XMC_VADC_GLOBAL_t *const global_ptr, const
XMC_VADC_RESULT_SIZE_t compare_val)
394 {
395 XMC_ASSERT("XMC_VADC_GLOBAL_SetCompareValue:Wrong Module Pointer", (global_ptr ==
VADC))
396
397 global_ptr->GLOBRES &= ~((uint32_t)VADC_GLOBRES_RESULT_Msk);
398 global_ptr->GLOBRES |= (uint32_t)((uint32_t)compare_val <<
XMC_VADC_RESULT_LEFT_ALIGN_10BIT);
399 }
400
401 /* API to retrieve the result of comparison */
402 XMC_VADC_FAST_COMPARE_t XMC_VADC_GLOBAL_GetCompareResult(XMC_VADC_GLOBAL_t *const
global_ptr)
403 {
404 XMC_VADC_FAST_COMPARE_t result;
405 uint32_t res;
406
407 XMC_ASSERT("XMC_VADC_GLOBAL_GetCompareResult:Wrong Module Pointer", (global_ptr ==
VADC))
408
409 res = global_ptr->GLOBRES;
410
411 if (res & (uint32_t)VADC_GLOBRES_VF_Msk)
412 {
413 result = (XMC_VADC_FAST_COMPARE_t)((uint32_t)(res >> (uint32_t)
VADC_GLOBRES_FCR_Pos) & (uint32_t)1);
414 }
415 else
416 {
417 result = XMC_VADC_FAST_COMPARE_UNKNOWN;
418 }
419
420 return result;
421 }
422
423 /* Bind one of the four groups to one of the two EMUX interfaces */
424 #if (XMC_VADC_EMUX_AVAILABLE == 1U)
425 void XMC_VADC_GLOBAL_BindGroupToEMux(XMC_VADC_GLOBAL_t *const global_ptr, const
uint32_t emuxif, const uint32_t group)
426 {
427 uint32_t mask;
428 uint32_t pos;
429
430 XMC_ASSERT("XMC_VADC_GLOBAL_BindGroupToEMux:Wrong Module Pointer", (global_ptr ==
VADC))
431 XMC_ASSERT("XMC_VADC_GLOBAL_BindGroupToEMux:Wrong EMUX Group", (emuxif <
XMC_VADC_NUM_EMUX_INTERFACES))
432 XMC_ASSERT("XMC_VADC_GLOBAL_BindGroupToEMux:Wrong VADC Group", (group <
XMC_VADC_MAXIMUM_NUM_GROUPS))
433
434 if (0U == emuxif)
435 {
436 pos = (uint32_t)VADC_EMUXSEL_EMUXGRP0_Pos;
437 mask = (uint32_t)VADC_EMUXSEL_EMUXGRP0_Msk;
438 }
439 else
440 {
441 pos = (uint32_t)VADC_EMUXSEL_EMUXGRP1_Pos;
442 mask = (uint32_t)VADC_EMUXSEL_EMUXGRP1_Msk;
443 }
444
445 global_ptr->EMUXSEL &= ~(mask);
446 global_ptr->EMUXSEL |= (uint32_t) (group << pos);
447
448 }
449 #endif
450
451 /* API to bind result event with a service request line */
452 void XMC_VADC_GLOBAL_SetResultEventInterruptNode(XMC_VADC_GLOBAL_t *const global_ptr,
XMC_VADC_SR_t sr)
453 {
454 uint32_t node;
455
456 XMC_ASSERT("XMC_VADC_GLOBAL_SetResultEventInterruptNode:Wrong Module Pointer", (
global_ptr == VADC))
457 XMC_ASSERT("XMC_VADC_GLOBAL_SetResultEventInterruptNode:Wrong SR Number", (sr <=
XMC_VADC_SR_SHARED_SR3))
458
459 if (sr >= XMC_VADC_SR_SHARED_SR0)
460 {
461 node = (uint32_t)sr - (uint32_t)XMC_VADC_SR_SHARED_SR0;
462 }
463 else
464 {
465 node = (uint32_t)sr;
466 }
467
468 global_ptr->GLOBEVNP &= ~((uint32_t)VADC_GLOBEVNP_REV0NP_Msk);
469 global_ptr->GLOBEVNP |= (uint32_t)(node << VADC_GLOBEVNP_REV0NP_Pos);
470 }
471
472 /* API to bind request source event with a service request line */
473 void XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode(XMC_VADC_GLOBAL_t *const
global_ptr, XMC_VADC_SR_t sr)
474 {
475 uint32_t node;
476
477 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSetReqSrcEventInterruptNode:Wrong Module
Pointer", (global_ptr == VADC))
478
479 if (sr >= XMC_VADC_SR_SHARED_SR0)
480 {
481 node = (uint32_t)sr - (uint32_t)XMC_VADC_SR_SHARED_SR0;
482 }
483 else
484 {
485 node = (uint32_t)sr;
486 }
487
488 global_ptr->GLOBEVNP &= ~((uint32_t)VADC_GLOBEVNP_SEV0NP_Msk);
489 global_ptr->GLOBEVNP |= (uint32_t) (node << VADC_GLOBEVNP_SEV0NP_Pos);
490 }
491
492 /* API to initialize an instance of group of VADC hardware */
494 void XMC_VADC_GROUP_Init( XMC_VADC_GROUP_t *const group_ptr, const
XMC_VADC_GROUP_CONFIG_t *config)
495 {
496 XMC_ASSERT("XMC_VADC_GROUP_Init:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(
group_ptr))
497
498 /* Program the input classes */
499 XMC_VADC_GROUP_InputClassInit(group_ptr, config->class0, XMC_VADC_GROUP_CONV_STD, 0U
);
500 XMC_VADC_GROUP_InputClassInit(group_ptr, config->class0, XMC_VADC_GROUP_CONV_EMUX,
0U);
501 XMC_VADC_GROUP_InputClassInit(group_ptr, config->class1, XMC_VADC_GROUP_CONV_STD, 1U
);
502 XMC_VADC_GROUP_InputClassInit(group_ptr, config->class1, XMC_VADC_GROUP_CONV_EMUX,
1U);
503
504 group_ptr->ARBCFG = config->g_arbcfg;
505
506 group_ptr->BOUND = config->g_bound;
507
508 /* External mux configuration */
509 XMC_VADC_GROUP_ExternalMuxControlInit(group_ptr, config->emux_config);
510
511 }
512
513 /* API to program conversion characteristics */
514 void XMC_VADC_GROUP_InputClassInit(XMC_VADC_GROUP_t *const group_ptr, const
XMC_VADC_GROUP_CLASS_t config,
515 const XMC_VADC_GROUP_CONV_t conv_type, const
uint32_t set_num)
516 {
517 uint32_t conv_class;
518 uint32_t conv_mode_pos;
519 uint32_t sample_time_pos;
520 uint32_t conv_mode_mask;
521 uint32_t sample_time_mask;
522 uint32_t sample_time;
523 XMC_VADC_CONVMODE_t conv_mode;
524
525 XMC_ASSERT("XMC_VADC_GROUP_InputClassInit:Wrong Group Pointer",
XMC_VADC_CHECK_GROUP_PTR(group_ptr))
526 XMC_ASSERT("XMC_VADC_GROUP_InputClassInit:Wrong Conversion Type", ((conv_type) <=
XMC_VADC_GROUP_CONV_EMUX))
527 XMC_ASSERT("XMC_VADC_GROUP_InputClassInit:Wrong ICLASS set number", (set_num <
XMC_VADC_MAX_ICLASS_SET))
528
529 /*
530 * Obtain the mask and position macros of the parameters based on what is being
requested - Standard channels vs
531 * external mux channels.
532 */
533 if (XMC_VADC_GROUP_CONV_STD == conv_type)
534 {
535 conv_mode_pos = (uint32_t) VADC_G_ICLASS_CMS_Pos;
536 conv_mode_mask = (uint32_t) VADC_G_ICLASS_CMS_Msk;
537 sample_time_pos = (uint32_t) VADC_G_ICLASS_STCS_Pos;
538 sample_time_mask = (uint32_t) VADC_G_ICLASS_STCS_Msk;
539 sample_time = (uint32_t) config.sample_time_std_conv;
540 conv_mode = (XMC_VADC_CONVMODE_t)config.conversion_mode_standard;
541 }
542 else
543 {
544 conv_mode_pos = (uint32_t) VADC_G_ICLASS_CME_Pos;
545 conv_mode_mask = (uint32_t) VADC_G_ICLASS_CME_Msk;
546 sample_time_pos = (uint32_t) VADC_G_ICLASS_STCE_Pos;
547 sample_time_mask = (uint32_t) VADC_G_ICLASS_STCE_Msk;
548 sample_time = (uint32_t) config.sampling_phase_emux_channel;
549 conv_mode = (XMC_VADC_CONVMODE_t)config.conversion_mode_emux;
550 }
551
552 /* Determine the class */
553 conv_class = group_ptr->ICLASS[set_num];
554
555 /* Program the class register */
556 conv_class &= ~(conv_mode_mask);
557 conv_class |= (uint32_t)((uint32_t) conv_mode << conv_mode_pos);
558 conv_class &= ~(sample_time_mask);
559 conv_class |= (uint32_t)(sample_time << sample_time_pos);
560 group_ptr->ICLASS[set_num] = conv_class;
561 }
562
563 /* API which sets the power mode of analog converter of a VADC group */
564 void XMC_VADC_GROUP_SetPowerMode(XMC_VADC_GROUP_t *const group_ptr, const
XMC_VADC_GROUP_POWERMODE_t power_mode)
565 {
566 uint32_t arbcfg;
567
568 XMC_ASSERT("XMC_VADC_GROUP_SetPowerMode:Wrong Group Pointer",
569 XMC_ASSERT("XMC_VADC_GROUP_SetPowerMode:Wrong Power Mode", (power_mode <=
XMC_VADC_GROUP_POWERMODE_NORMAL))
570
571 arbcfg = group_ptr->ARBCFG;
572
573 arbcfg &= ~((uint32_t)VADC_G_ARBCFG_ANONC_Msk);
574 arbcfg |= (uint32_t)power_mode;
575
576 group_ptr->ARBCFG = arbcfg;
577 }
578
579 /* API which programs a group as a slave group during sync conversions */
580 void XMC_VADC_GROUP_SetSyncSlave(XMC_VADC_GROUP_t *const group_ptr, uint32_t
master_grp, uint32_t slave_grp)
581 {
582 uint32_t synctr;
583 #if (XMC_VADC_MULTIPLE_SLAVEGROUPS == 1U )
584 #endif
585 XMC_ASSERT("XMC_VADC_GROUP_SetSyncSlave:Wrong Group Pointer",
586
587 #if (XMC_VADC_MULTIPLE_SLAVEGROUPS == 1U )
588
589 /* Determine the coding of SYNCTR */
590 if (slave_grp > master_grp)
591 {
592 master_grp = master_grp + 1U;
593 }
594 #endif
595
596 /* Program SYNCTR */
597 synctr = group_ptr->SYNCTR;
598 synctr &= ~((uint32_t)VADC_G_SYNCTR_STSEL_Msk);
599 synctr |= master_grp;
600 group_ptr->SYNCTR = synctr;
601 }
602
603 /* API which programs a group as a master group during sync conversions */
604 void XMC_VADC_GROUP_SetSyncMaster(XMC_VADC_GROUP_t *const group_ptr)
605 {
607
608 XMC_ASSERT("XMC_VADC_GROUP_SetSyncMaster:Wrong Group Pointer",
609
611 synctr &= ~((uint32_t)VADC_G_SYNCTR_STSEL_Msk);
612 group_ptr->SYNCTR = synctr;
613 }
614
615 /* API to enable checking of readiness of slaves before a synchronous conversion
request is issued */
616 void XMC_VADC_GROUP_CheckSlaveReadiness(XMC_VADC_GROUP_t *const group_ptr, uint32_t
slave_group)
617 {
618 uint32_t i, master_grp_num;
619 XMC_ASSERT("XMC_VADC_GROUP_CheckSlaveReadiness:Wrong Group Pointer",
620 XMC_ASSERT("XMC_VADC_GROUP_CheckSlaveReadiness:Wrong Slave group", (slave_group <= (
XMC_VADC_MAXIMUM_NUM_GROUPS - 1)))
621
622 master_grp_num = 0;
623 for (i = 0; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
624 {
625 if (g_xmc_vadc_group_array[i] == group_ptr)
626 {
627 master_grp_num = i;
628 }
629 }
630
631
632 if (slave_group < master_grp_num)
633 {
634 slave_group++;
635 }
636 group_ptr->SYNCTR |= (1U << (slave_group + XMC_VADC_SYNCTR_START_LOCATION));
637 }
638
639 /* API to disable checking of readiness of slaves during synchronous conversions */
640 void XMC_VADC_GROUP_IgnoreSlaveReadiness(XMC_VADC_GROUP_t *const group_ptr, uint32_t
slave_group)
641 {
642 uint32_t i, master_grp_num;
643 XMC_ASSERT("XMC_VADC_GROUP_IgnoreSlaveReadiness:Wrong Group Pointer",
644 XMC_ASSERT("XMC_VADC_GROUP_IgnoreSlaveReadiness:Wrong Slave group", (slave_group <=
(XMC_VADC_MAXIMUM_NUM_GROUPS - 1)))
645
646 master_grp_num = 0;
647 for (i = 0; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
648 {
649 if (g_xmc_vadc_group_array[i] == group_ptr)
650 {
651 master_grp_num = i;
652 }
653 }
654
655 if (slave_group < master_grp_num)
656 {
657 slave_group++;
658 }
659 group_ptr->SYNCTR &= ~(1U << (slave_group + XMC_VADC_SYNCTR_START_LOCATION));
660 }
661
662 /* API to configure EVAL bit in the slave groups*/
663 void XMC_VADC_GROUP_SetSyncSlaveReadySignal(XMC_VADC_GROUP_t *const group_ptr,
664 uint32_t eval_waiting_group,
665 uint32_t eval_origin_group)
666 {
667 XMC_ASSERT("XMC_VADC_GROUP_SetSyncSlaveReadySignal:Wrong Group Pointer",
668 XMC_ASSERT("XMC_VADC_GROUP_SetSyncSlaveReadySignal:Wrong Group numbers", (
eval_waiting_group != eval_origin_group ))
669
670 if (eval_origin_group < eval_waiting_group)
671 {
672 eval_origin_group++;
673 }
674 group_ptr->SYNCTR |= (1U << (eval_origin_group + XMC_VADC_SYNCTR_START_LOCATION));
675 }
676
677
678 /* API to enable the synchronous conversion feature - Applicable only to kernel
configured as master */
679 void XMC_VADC_GROUP_EnableChannelSyncRequest(XMC_VADC_GROUP_t *const group_ptr, const
uint32_t ch_num)
680 {
682
683 XMC_ASSERT("XMC_VADC_GROUP_EnableChannelSyncRequest:Wrong Group Pointer",
684 XMC_ASSERT("XMC_VADC_GROUP_EnableChannelSyncRequest:Wrong Channel Number",
685 ((ch_num) < XMC_VADC_NUM_CHANNELS_PER_GROUP))
686
688
689 if (!(synctr & (uint32_t)VADC_G_SYNCTR_STSEL_Msk))
690 {
691 group_ptr->CHCTR[ch_num] |= (uint32_t)((uint32_t)1 << VADC_G_CHCTR_SYNC_Pos);
692 }
693 }
694
695 /* API to disable synchronous conversion feature */
696 void XMC_VADC_GROUP_DisableChannelSyncRequest(XMC_VADC_GROUP_t *const group_ptr, const
uint32_t ch_num)
697 {
699
700 XMC_ASSERT("XMC_VADC_GROUP_DisableChannelSyncRequest:Wrong Group Pointer",
701 XMC_ASSERT("XMC_VADC_GROUP_DisableChannelSyncRequest:Wrong Channel Number",
703
705
706 if (synctr & (uint32_t)VADC_G_SYNCTR_STSEL_Msk)
707 {
708 group_ptr->CHCTR[ch_num] &= ~((uint32_t)VADC_G_CHCTR_SYNC_Msk);
709 }
710 }
711
712 /* API to retrieve the converter state - Idle vs Busy */
713 XMC_VADC_GROUP_STATE_t XMC_VADC_GROUP_IsConverterBusy(XMC_VADC_GROUP_t *const
group_ptr)
714 {
715 uint32_t arbcfg;
716
717 XMC_ASSERT("XMC_VADC_GROUP_IsConverterBusy:Wrong Group Pointer",
718
719 arbcfg = group_ptr->ARBCFG;
720 arbcfg &= (uint32_t)VADC_G_ARBCFG_BUSY_Msk;
721 arbcfg = arbcfg >> VADC_G_ARBCFG_BUSY_Pos;
722
723 return ( (XMC_VADC_GROUP_STATE_t)arbcfg);
724 }
725
726 /* API to set boundaries for conversion results */
727 void XMC_VADC_GROUP_SetBoundaries(XMC_VADC_GROUP_t *const group_ptr, const uint32_t
boundary0, const uint32_t boundary1)
728 {
729 uint32_t bound;
730
731 XMC_ASSERT("XMC_VADC_GROUP_SetBoundaries:Wrong Group Pointer",
732
734 bound = group_ptr->BOUND;
735 bound &= ~((uint32_t) VADC_G_BOUND_BOUNDARY0_Msk);
737 bound |= (uint32_t) ((uint32_t) boundary0 << VADC_G_BOUND_BOUNDARY0_Pos);
738 bound |= (uint32_t) ((uint32_t) boundary1 << VADC_G_BOUND_BOUNDARY1_Pos);
739 group_ptr->BOUND = bound;
740 }
741
742 /* API to set an individual boundary for conversion results */
743 void XMC_VADC_GROUP_SetIndividualBoundary(XMC_VADC_GROUP_t *const group_ptr,
744 const XMC_VADC_CHANNEL_BOUNDARY_t selection,
745 const uint16_t boundary_value)
746 {
747
748 uint32_t bound;
749
750 XMC_ASSERT("XMC_VADC_GROUP_SetIndividualBoundary:Wrong Group Pointer",
751 XMC_ASSERT("XMC_VADC_GROUP_SetIndividualBoundary:Wrong Boundary Selection",
752 ((XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 == selection) ||
753 (XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 == selection)))
754
756 bound = group_ptr->BOUND;
757 if (XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND0 == selection)
758 {
760 bound |= (uint32_t) ((uint32_t) boundary_value << VADC_G_BOUND_BOUNDARY0_Pos);
761 }
762 else if (XMC_VADC_CHANNEL_BOUNDARY_GROUP_BOUND1 == selection)
763 {
765 bound |= (uint32_t) ((uint32_t) boundary_value << VADC_G_BOUND_BOUNDARY1_Pos);
766 }
767 else
768 {
769 /* For MISRA*/
770 }
771 group_ptr->BOUND = bound;
772
773 }
774
775 /* Manually assert service request (Interrupt) to NVIC */
776 void XMC_VADC_GROUP_TriggerServiceRequest(XMC_VADC_GROUP_t *const group_ptr,
777 const uint32_t sr_num,
778 const XMC_VADC_GROUP_IRQ_t type)
779 {
780 uint32_t sract;
781
782 XMC_ASSERT("XMC_VADC_GROUP_TriggerServiceRequest:Wrong Group Pointer",
783 XMC_ASSERT("XMC_VADC_GROUP_TriggerServiceRequest:Wrong SR number", (sr_num <=
784 XMC_ASSERT("XMC_VADC_GROUP_TriggerServiceRequest:Wrong SR type", ((type) <=
XMC_VADC_GROUP_IRQ_SHARED))
785
786 sract = group_ptr->SRACT;
787
788 if (XMC_VADC_GROUP_IRQ_KERNEL == type)
789 {
790 sract |= (uint32_t)((uint32_t)1 << sr_num);
791 }
792 else
793 {
794 sract |= (uint32_t)((uint32_t)1 << (sr_num + (uint32_t)8));
795 }
796
797 group_ptr->SRACT = sract;
798 }
799
800 #if XMC_VADC_BOUNDARY_FLAG_SELECT == 1U
801
802 /* API to set the SR line for the Boundary flag node pointer*/
803 void XMC_VADC_GROUP_SetBoundaryEventInterruptNode(XMC_VADC_GROUP_t *const group_ptr,
804 const uint8_t boundary_flag_num,
805 const XMC_VADC_BOUNDARY_NODE_t sr)
806 {
807 uint32_t flag_pos;
808 XMC_ASSERT("XMC_VADC_GROUP_SetBoundaryEventInterruptNode:Wrong Group Pointer",
809
810 /* Program the GxBFLNP */
811 flag_pos = (uint32_t)boundary_flag_num << (uint32_t)2;
812 group_ptr->BFLNP &= ~((uint32_t)VADC_G_BFLNP_BFL0NP_Msk << flag_pos);
813 group_ptr->BFLNP |= (uint32_t)sr << flag_pos;
814 }
815
816 #endif
817
818 #endif
819
820 #if(XMC_VADC_SHS_AVAILABLE == 1U)
821
822 /* API to Initialize the Sample and hold features*/
823 void XMC_VADC_GLOBAL_SHS_Init(XMC_VADC_GLOBAL_SHS_t *const shs_ptr, const
XMC_VADC_GLOBAL_SHS_CONFIG_t *config)
824 {
825 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_Init:Wrong SHS Pointer", (shs_ptr == (
XMC_VADC_GLOBAL_SHS_t *)(void *)SHS0))
826 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_Init:Wrong Index number", (config == (
XMC_VADC_GLOBAL_SHS_CONFIG_t *)NULL))
827
828 /* Initialize the SHS Configuration register*/
829 shs_ptr->SHSCFG = (uint32_t)((uint32_t)config->shscfg | (uint32_t)
SHS_SHSCFG_SCWC_Msk);
830
831 #if(XMC_VADC_SHS_FULL_SET_REG == 1U)
832 /* Select the Calibration order*/
833 shs_ptr->CALCTR &= ~((uint32_t)SHS_CALCTR_CALORD_Msk);
834 shs_ptr->CALCTR |= (uint32_t) ((uint32_t)config->calibration_order <<
SHS_CALCTR_CALORD_Pos);
835 #endif
836 }
837
839 /* API to enable the accelerated mode of conversion */
840 void XMC_VADC_GLOBAL_SHS_EnableAcceleratedMode(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
XMC_VADC_GROUP_INDEX_t group_num)
841 {
842 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_EnableAcceleratedMode:Wrong SHS Pointer",
843 (shs_ptr == (XMC_VADC_GLOBAL_SHS_t *)(void *)SHS0))
844 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_EnableAcceleratedMode:Wrong Index number", (
group_num <= XMC_VADC_GROUP_INDEX_1))
845
846 /* Set the converted to Accelerated mode from compatible mode*/
847 if (group_num == XMC_VADC_GROUP_INDEX_0 )
848 {
849 shs_ptr->TIMCFG0 |= (uint32_t)SHS_TIMCFG0_AT_Msk;
850 }
851 else if (group_num == XMC_VADC_GROUP_INDEX_1 )
852 {
853 shs_ptr->TIMCFG1 |= (uint32_t)SHS_TIMCFG1_AT_Msk;
854 }
855 else
856 {
857 /* for MISRA*/
858 }
859 }
860
861 /* API to disable the accelerated mode of conversion */
862 void XMC_VADC_GLOBAL_SHS_DisableAcceleratedMode(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
XMC_VADC_GROUP_INDEX_t group_num)
863 {
864 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_DisableAcceleratedMode:Wrong SHS Pointer",
866 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_DisableAcceleratedMode:Wrong Index number", (
group_num <= XMC_VADC_GROUP_INDEX_1))
867
868 /* Set the converted to Accelerated mode from compatible mode*/
870 {
871 shs_ptr->TIMCFG0 &= ~(uint32_t)SHS_TIMCFG0_AT_Msk;
872 }
874 {
875 shs_ptr->TIMCFG1 &= ~(uint32_t)SHS_TIMCFG1_AT_Msk;
876 }
877 else
878 {
879 /* for MISRA*/
880 }
881 }
882
883 /* API to set the Short sample time of the Sample and hold module*/
884 void XMC_VADC_GLOBAL_SHS_SetShortSampleTime(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
885 XMC_VADC_GROUP_INDEX_t group_num,
886 uint8_t sst_value)
887 {
888 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetShortSampleTime:Wrong SHS Pointer",
890 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetShortSampleTime:Wrong Index number", (group_num
<= XMC_VADC_GROUP_INDEX_1))
891 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetShortSampleTime:Wrong SST value", (sst_value <
64U))
892
893 /* Set the short sample time for the Accelerated mode of operation*/
895 {
896 shs_ptr->TIMCFG0 &= ~((uint32_t)SHS_TIMCFG0_SST_Msk);
897 shs_ptr->TIMCFG0 |= (uint32_t)((uint32_t)sst_value << SHS_TIMCFG0_SST_Pos );
898 }
900 {
901 shs_ptr->TIMCFG1 &= ~((uint32_t)SHS_TIMCFG1_SST_Msk);
902 shs_ptr->TIMCFG1 |= (uint32_t)((uint32_t)sst_value << SHS_TIMCFG1_SST_Pos );
903 }
904 else
905 {
906 /* for MISRA*/
907 }
908 }
909 #endif
910
911 /* API to set the gain factor of the Sample and hold module*/
912 void XMC_VADC_GLOBAL_SHS_SetGainFactor(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
913 uint8_t gain_value,
915 uint8_t ch_num)
916 {
917 uint32_t ch_mask;
918
919 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetGainFactor:Wrong SHS Pointer", (shs_ptr == (
XMC_VADC_GLOBAL_SHS_t *)(void *)SHS0))
920 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetGainFactor:Wrong Index number", (group_num <=
XMC_VADC_GROUP_INDEX_1))
921
922 /*Calculate location of channel bit-field*/
923 ch_mask = ((uint32_t)ch_num << (uint32_t)2);
925 {
926 shs_ptr->GNCTR00 &= ~((uint32_t)SHS_GNCTR00_GAIN0_Msk << ch_mask) ;
927 shs_ptr->GNCTR00 |= ((uint32_t)gain_value << ch_mask);
928 }
930 {
931 shs_ptr->GNCTR10 &= ~((uint32_t)SHS_GNCTR10_GAIN0_Msk << ch_mask);
932 shs_ptr->GNCTR10 |= ((uint32_t)gain_value << ch_mask);
933 }
934 else
935 {
936 /* for MISRA*/
937 }
938 }
939
941 /* API to enable the gain and offset calibration of the Sample and hold module*/
942 void XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations(XMC_VADC_GLOBAL_SHS_t *const
shs_ptr,
943 XMC_VADC_GROUP_INDEX_t group_num)
944 {
945 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations:Wrong SHS Pointer",
947 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_EnableGainAndOffsetCalibrations:Wrong group
selected",
948 (group_num <= (uint32_t)XMC_VADC_GROUP_INDEX_1))
949
950 /* Enable gain and offset calibration*/
951 if ( XMC_VADC_GROUP_INDEX_0 == group_num)
952 {
953 shs_ptr->CALOC0 &= ~((uint32_t)SHS_CALOC0_DISCAL_Msk);
954 }
955 else if ( XMC_VADC_GROUP_INDEX_1 == group_num)
956 {
957 shs_ptr->CALOC1 &= ~((uint32_t)SHS_CALOC1_DISCAL_Msk);
958 }
959 else
960 {
961 /* for MISRA */
962 }
963 }
964
965 /* API to enable the gain and offset calibration of the Sample and hold module*/
966 void XMC_VADC_GLOBAL_SHS_DisableGainAndOffsetCalibrations(XMC_VADC_GLOBAL_SHS_t *const
shs_ptr,
967 XMC_VADC_GROUP_INDEX_t group_num)
968 {
969 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_DisableGainAndOffsetCalibrations:Wrong SHS Pointer",
971 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_DisableGainAndOffsetCalibrations:Wrong group
selected",
972 (group_num <= (uint32_t)XMC_VADC_GROUP_INDEX_1))
973
975 {
976 shs_ptr->CALOC0 |= (uint32_t)SHS_CALOC0_DISCAL_Msk;
977 }
979 {
980 shs_ptr->CALOC1 |= (uint32_t)SHS_CALOC1_DISCAL_Msk;
981 }
982 else
983 {
984 /* for MISRA */
985 }
986 }
987
988 /* API to get the offset calibration value of the Sample and hold module*/
989 uint8_t XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue(XMC_VADC_GLOBAL_SHS_t *const
shs_ptr,
991 XMC_VADC_SHS_GAIN_LEVEL_t gain_level)
992 {
993 uint32_t calibration_value;
994 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue:Wrong SHS Pointer",
996 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue:Wrong Group number
selected",
997 (group_num == XMC_VADC_GROUP_INDEX_0) || (group_num ==
998 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_GetOffsetCalibrationValue:Wrong gain level selected"
,
999 (gain_level == XMC_VADC_SHS_GAIN_LEVEL_0) || (gain_level ==
XMC_VADC_SHS_GAIN_LEVEL_1) ||
XMC_VADC_SHS_GAIN_LEVEL_3))
1001
1002 calibration_value = 0U;
1004 {
1005 calibration_value = (shs_ptr->CALOC0 >> (uint32_t)gain_level) & (uint32_t)
SHS_CALOC0_CALOFFVAL0_Msk;
1006 }
1008 {
1009 calibration_value = (shs_ptr->CALOC1 >> (uint32_t)gain_level) & (uint32_t)
SHS_CALOC1_CALOFFVAL0_Msk;
1010 }
1011 else
1012 {
1013 /* for MISRA */
1014 }
1015 return ((uint8_t)calibration_value);
1016 }
1017
1018 /* API to set the offset calibration value of the Sample and hold module*/
1019 void XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue(XMC_VADC_GLOBAL_SHS_t *const
shs_ptr,
1021 XMC_VADC_SHS_GAIN_LEVEL_t gain_level,
1022 uint8_t offset_calibration_value)
1023 {
1024 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue:Wrong SHS Pointer",
1026 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue:Wrong Group number
selected",
1028 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetOffsetCalibrationValue:Wrong gain level selected"
,
XMC_VADC_SHS_GAIN_LEVEL_1) ||
XMC_VADC_SHS_GAIN_LEVEL_3))
1031
1033 {
1034 shs_ptr->CALOC0 = (shs_ptr->CALOC0 & ~((uint32_t)SHS_CALOC0_CALOFFVAL0_Msk << (
uint32_t)gain_level)) |
1035 (uint32_t)SHS_CALOC0_OFFWC_Msk;
1036 shs_ptr->CALOC0 |= ((uint32_t)offset_calibration_value << (uint32_t)gain_level) |
(uint32_t)SHS_CALOC0_OFFWC_Msk;
1037 }
1039 {
1040 shs_ptr->CALOC1 = (shs_ptr->CALOC1 & ~((uint32_t)SHS_CALOC1_CALOFFVAL0_Msk << (
uint32_t)gain_level)) |
1041 (uint32_t)SHS_CALOC1_OFFWC_Msk;
1042 shs_ptr->CALOC1 |= ((uint32_t)offset_calibration_value << (uint32_t)gain_level) |
(uint32_t)SHS_CALOC1_OFFWC_Msk;
1043 }
1044 else
1045 {
1046 /* for MISRA */
1047 }
1048 }
1049 #endif
1050
1051 /* API to set the values of sigma delta loop of the Sample and hold module*/
1052 void XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop(XMC_VADC_GLOBAL_SHS_t *const shs_ptr,
1054 XMC_VADC_SHS_LOOP_CH_t loop_select,
1055 uint8_t ch_num)
1056 {
1057 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop:Wrong SHS Pointer",
1059 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop:Wrong Group number selected",
1061 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop:Wrong Delta sigma loop selected",
1062 (loop_select == XMC_VADC_SHS_LOOP_CH_0) || (loop_select ==
XMC_VADC_SHS_LOOP_CH_1))
1063 XMC_ASSERT("XMC_VADC_GLOBAL_SHS_SetSigmaDeltaLoop:Wrong Channel Number",
1065
1066 shs_ptr->LOOP &= ~(((uint32_t)SHS_LOOP_LPCH0_Msk | (uint32_t)SHS_LOOP_LPSH0_Msk | (
uint32_t)SHS_LOOP_LPEN0_Msk)
1067 << (uint32_t)loop_select);
1068 shs_ptr->LOOP |= ((uint32_t)ch_num | ((uint32_t)group_num << (uint32_t)
SHS_LOOP_LPSH0_Pos)) << (uint32_t)loop_select;
1069
1070 }
1071
1072 #endif
1073
1074 #if (XMC_VADC_GSCAN_AVAILABLE == 1U)
1075 /* API to initialize the group scan hardware of a kernel */
1076 void XMC_VADC_GROUP_ScanInit(XMC_VADC_GROUP_t *const group_ptr, const
XMC_VADC_SCAN_CONFIG_t *config)
1077 {
1078 uint32_t reg;
1079
1080 XMC_ASSERT("XMC_VADC_GROUP_ScanInit:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(
group_ptr))
1081
1082 /* All configurations have to be performed with the arbitration slot disabled */
1083 XMC_VADC_GROUP_ScanDisableArbitrationSlot(group_ptr);
1084
1085 /* Read in the existing contents of arbitration priority register */
1086 reg = group_ptr->ARBPR;
1087
1088 /* Program the priority of the request source */
1089 reg &= ~(uint32_t)VADC_G_ARBPR_PRIO1_Msk;
1090 reg |= (uint32_t)((uint32_t)config->req_src_priority << VADC_G_ARBPR_PRIO1_Pos);
1091
1092 /* Program the start mode */
1093 if (XMC_VADC_STARTMODE_WFS != (XMC_VADC_STARTMODE_t)(config->conv_start_mode))
1094 {
1095 reg |= (uint32_t)(VADC_G_ARBPR_CSM1_Msk);
1096 }
1097
1098 group_ptr->ARBPR = reg;
1099
1100 group_ptr->ASCTRL = (uint32_t)(config->asctrl | (VADC_G_ASCTRL_XTWC_Msk) | (
VADC_G_ASCTRL_GTWC_Msk) |
1101 (VADC_G_ASCTRL_TMWC_Msk));
1102
1103 group_ptr->ASMR = (uint32_t)((config->asmr) | (uint32_t)((uint32_t)
XMC_VADC_GATEMODE_IGNORE << VADC_G_ASMR_ENGT_Pos));
1104
1105 if (XMC_VADC_STARTMODE_CNR == (XMC_VADC_STARTMODE_t)(config->conv_start_mode))
1106 {
1107 group_ptr->ASMR |= (uint32_t)VADC_G_ASMR_RPTDIS_Msk;
1108 }
1109
1110 /* Enable arbitration slot now */
1111 XMC_VADC_GROUP_ScanEnableArbitrationSlot(group_ptr);
1112
1113 }
1114
1115 /* API to select one of the 16 inputs as a trigger input for Group Scan request
source */
1116 void XMC_VADC_GROUP_ScanSelectTrigger(XMC_VADC_GROUP_t *const group_ptr,
XMC_VADC_TRIGGER_INPUT_SELECT_t trigger_input)
1117 {
1118 uint32_t scanctrl;
1119
1120 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectTrigger:Wrong Group Pointer",
1121 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectTrigger:Wrong Trigger Port", ((trigger_input) <
XMC_VADC_NUM_PORTS))
1122
1123 scanctrl = group_ptr->ASCTRL;
1124 scanctrl |= (uint32_t) VADC_G_ASCTRL_XTWC_Msk;
1125 scanctrl &= ~((uint32_t)VADC_G_ASCTRL_XTSEL_Msk);
1126 scanctrl |= (uint32_t)((uint32_t)trigger_input << VADC_G_ASCTRL_XTSEL_Pos);
1127 group_ptr->ASCTRL = scanctrl;
1128 }
1129
1130 /* Select a trigger edge*/
1131 void XMC_VADC_GROUP_ScanSelectTriggerEdge(XMC_VADC_GROUP_t *const group_ptr, const
XMC_VADC_TRIGGER_EDGE_t trigger_edge)
1132 {
1134
1135 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectTriggerEdge:Wrong Group Pointer",
1136 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectTriggerEdge:Wrong Trigger Port", ((trigger_edge
) <= XMC_VADC_TRIGGER_EDGE_ANY))
1137
1139 scanctrl |= (uint32_t) VADC_G_ASCTRL_XTWC_Msk;
1140 scanctrl &= ~((uint32_t)VADC_G_ASCTRL_XTMODE_Msk);
1141 scanctrl |= (uint32_t)((uint32_t)trigger_edge << VADC_G_ASCTRL_XTMODE_Pos);
1143 }
1144
1145 /* API to select one of the 16 inputs as a trigger gating input for Group Scan
request source */
1146 void XMC_VADC_GROUP_ScanSelectGating(XMC_VADC_GROUP_t *const group_ptr,
XMC_VADC_GATE_INPUT_SELECT_t gating_input)
1147 {
1149
1150 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectGating:Wrong Group Pointer",
1151 XMC_ASSERT("XMC_VADC_GROUP_ScanSelectGating:Wrong Gating Port", ((gating_input) <
1152
1154 scanctrl |= (uint32_t)VADC_G_ASCTRL_GTWC_Msk;
1155 scanctrl &= ~((uint32_t)VADC_G_ASCTRL_GTSEL_Msk);
1156 scanctrl |= (uint32_t)((uint32_t)gating_input << VADC_G_ASCTRL_GTSEL_Pos);
1158 }
1159
1160 /* API to stop an ongoing conversion of a sequence */
1161 void XMC_VADC_GROUP_ScanSequenceAbort(XMC_VADC_GROUP_t *const group_ptr)
1162 {
1163 uint32_t asctrl;
1164 bool arbitration_status;
1165
1166 XMC_ASSERT("XMC_VADC_GROUP_ScanSequenceAbort:Wrong Group Pointer",
1167
1168 /* To disable trigger and gating before abort*/
1169 asctrl = group_ptr->ASCTRL;
1170
1171 group_ptr->ASCTRL = (0U | (uint32_t)VADC_G_ASCTRL_XTWC_Msk |
1172 (uint32_t)VADC_G_ASCTRL_GTWC_Msk | (uint32_t)
VADC_G_ASCTRL_TMWC_Msk );
1173
1174 /* To disable Arbitration before abort*/
1175 arbitration_status = (bool)((uint32_t)(group_ptr->ARBPR >> VADC_G_ARBPR_ASEN1_Pos) &
1U);
1176 XMC_VADC_GROUP_ScanDisableArbitrationSlot(group_ptr);
1177
1178 group_ptr->ASMR &= ~((uint32_t)VADC_G_ASMR_ENGT_Msk);
1179 group_ptr->ASMR |= (uint32_t)VADC_G_ASMR_CLRPND_Msk;
1180
1181 /* Enable the arbitration slot 1*/
1182 group_ptr->ARBPR |= (uint32_t)((uint32_t)arbitration_status <<
VADC_G_ARBPR_ASEN1_Pos);
1183
1184 /* Enable any disabled gating*/
1185 group_ptr->ASCTRL = (asctrl | (uint32_t)VADC_G_ASCTRL_XTWC_Msk |
1186 (uint32_t)VADC_G_ASCTRL_GTWC_Msk | (uint32_t)
VADC_G_ASCTRL_TMWC_Msk );
1187 }
1188
1189 /* API to find out number of channels awaiting conversion */
1190 uint32_t XMC_VADC_GROUP_ScanGetNumChannelsPending(XMC_VADC_GROUP_t *const group_ptr)
1191 {
1192 uint32_t reg;
1193 uint32_t i;
1194 uint32_t count;
1195
1196 XMC_ASSERT("XMC_VADC_GROUP_ScanGetNumChannelsPending:Wrong Group Pointer",
1197
1198
1199 count = 0U;
1200
1201 if (group_ptr->ASPND)
1202 {
1203 reg = group_ptr->ASPND;
1204
1205 for (i = 0U; i < XMC_VADC_NUM_CHANNELS_PER_GROUP; i++)
1206 {
1207 if (reg & 1U)
1208 {
1209 count++;
1210 }
1211 reg = (uint32_t)(reg >> (uint32_t)1);
1212 }
1213 }
1214
1215 return count;
1216 }
1217
1218 /* API to select a service request line (NVIC Node) for request source event */
1219 void XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode(XMC_VADC_GROUP_t *const group_ptr,
const XMC_VADC_SR_t sr)
1220 {
1221 uint32_t sevnp;
1222 sevnp = group_ptr->SEVNP;
1223
1224 XMC_ASSERT("XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode:Wrong Group Pointer",
1225 XMC_ASSERT("XMC_VADC_GROUP_ScanSetReqSrcEventInterruptNode:Wrong Service Request",
((sr) <= XMC_VADC_SR_SHARED_SR3))
1226
1227 sevnp &= ~((uint32_t)VADC_G_SEVNP_SEV1NP_Msk);
1228 sevnp |= (uint32_t)((uint32_t)sr << VADC_G_SEVNP_SEV1NP_Pos);
1229
1230 group_ptr->SEVNP = sevnp;
1231 }
1232
1233 /* Removes the selected channel from conversion*/
1234 void XMC_VADC_GROUP_ScanRemoveChannel(XMC_VADC_GROUP_t *const group_ptr, const
uint32_t channel_num)
1235 {
1236 uint32_t assel;
1237
1238 XMC_ASSERT("XMC_VADC_GROUP_ScanRemoveChannel:Wrong Group Pointer",
1239 XMC_ASSERT("XMC_VADC_GROUP_ScanRemoveChannel:Wrong channel number", ((channel_num) <
XMC_VADC_NUM_CHANNELS_PER_GROUP))
1240
1241 assel = group_ptr->ASSEL;
1242 assel &= (~( 1 << channel_num));
1243 group_ptr->ASSEL = assel;
1244 }
1245 #endif
1246
1247 /* API to initialize background scan request source hardware */
1248 void XMC_VADC_GLOBAL_BackgroundInit(XMC_VADC_GLOBAL_t *const global_ptr, const
XMC_VADC_BACKGROUND_CONFIG_t *config)
1249 {
1250 #if (XMC_VADC_GROUP_AVAILABLE ==1U)
1251 uint8_t i;
1252 uint32_t reg;
1253 uint32_t conv_start_mask;
1254 #endif
1255
1256 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundInit:Wrong Module Pointer", (global_ptr ==
VADC))
1257
1259 for (i = (uint8_t)0; i < XMC_VADC_MAXIMUM_NUM_GROUPS; i++)
1260 {
1261 XMC_VADC_GROUP_BackgroundDisableArbitrationSlot((XMC_VADC_GROUP_t *)
g_xmc_vadc_group_array[i]);
1262 }
1263
1264 conv_start_mask = (uint32_t) 0;
1265 if (XMC_VADC_STARTMODE_WFS != (XMC_VADC_STARTMODE_t)config->conv_start_mode)
1266 {
1267 conv_start_mask = (uint32_t)VADC_G_ARBPR_CSM2_Msk;
1268 }
1269
1271 {
1272 reg = g_xmc_vadc_group_array[i]->ARBPR;
1273
1274 reg &= ~(uint32_t)(VADC_G_ARBPR_PRIO2_Msk);
1275
1276 /* Program the priority of the request source */
1277 reg |= (uint32_t)((uint32_t)config->req_src_priority << VADC_G_ARBPR_PRIO2_Pos);
1278
1279 /* Program the start mode */
1280 reg |= conv_start_mask;
1281
1282 g_xmc_vadc_group_array[i]->ARBPR = reg;
1283
1284 }
1285 #endif
1286
1287 /* program BRSCTRL register */
1288 global_ptr->BRSCTRL = (uint32_t)(config->asctrl | (uint32_t)VADC_BRSCTRL_XTWC_Msk |
(uint32_t)VADC_BRSCTRL_GTWC_Msk);
1289
1290 /* program BRSMR register */
1291 global_ptr->BRSMR = (uint32_t)((config->asmr) | (uint32_t)((uint32_t)
XMC_VADC_GATEMODE_IGNORE << VADC_BRSMR_ENGT_Pos));
1292
1294 if (XMC_VADC_STARTMODE_CNR == (XMC_VADC_STARTMODE_t)(config->conv_start_mode))
1295 {
1296 global_ptr->BRSMR |= (uint32_t)VADC_BRSMR_RPTDIS_Msk;
1297 }
1298 #endif
1299
1302 {
1303 XMC_VADC_GROUP_BackgroundEnableArbitrationSlot((XMC_VADC_GROUP_t *)
1304 }
1305 #endif
1306
1307 }
1308
1309 /* API to select one of the 16 inputs as a trigger for background scan request source
*/
1310 void XMC_VADC_GLOBAL_BackgroundSelectTrigger(XMC_VADC_GLOBAL_t *const global_ptr,
const uint32_t input_num)
1311 {
1313
1314 XMC_ASSERT("VADC_BCKGND_SelectTriggerInput:Wrong Module Pointer", (global_ptr ==
VADC))
1315 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectTrigger:Wrong Trigger Port", ((input_num
) < XMC_VADC_NUM_PORTS))
1316
1317
1318 scanctrl = global_ptr->BRSCTRL;
1319 scanctrl |= (uint32_t)VADC_BRSCTRL_XTWC_Msk;
1320 scanctrl &= ~((uint32_t)VADC_BRSCTRL_XTSEL_Msk);
1321 scanctrl |= (uint32_t)(input_num << VADC_BRSCTRL_XTSEL_Pos);
1322 global_ptr->BRSCTRL = scanctrl;
1323 }
1324
1326 void XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge(XMC_VADC_GLOBAL_t *const global_ptr,
1327 const XMC_VADC_TRIGGER_EDGE_t trigger_edge)
1328 {
1330
1331 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge:Wrong Global Pointer", (
1332 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectTriggerEdge:Wrong Trigger Port",
1333 ((trigger_edge) <= XMC_VADC_TRIGGER_EDGE_ANY))
1334
1336 scanctrl |= (uint32_t) VADC_BRSCTRL_XTWC_Msk;
1337 scanctrl &= ~((uint32_t)VADC_BRSCTRL_XTMODE_Msk);
1338 scanctrl |= (uint32_t)((uint32_t)trigger_edge << VADC_BRSCTRL_XTMODE_Pos);
1340 }
1341
1342
1343 /* API to select one of the 16 inputs as a trigger gate for background scan request
source */
1344 void XMC_VADC_GLOBAL_BackgroundSelectGating(XMC_VADC_GLOBAL_t *const global_ptr, const
uint32_t input_num)
1345 {
1347
1348 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectGating:Wrong Module Pointer", (
1349 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundSelectGating:Wrong Gating Port", ((input_num)
< XMC_VADC_NUM_PORTS))
1350
1352 scanctrl |= (uint32_t)VADC_BRSCTRL_GTWC_Msk;
1353 scanctrl &= ~((uint32_t)VADC_BRSCTRL_GTSEL_Msk);
1354 scanctrl |= (uint32_t)(input_num << VADC_BRSCTRL_GTSEL_Pos);
1356 }
1357
1358 /* API to abort ongoing conversion of a sequence */
1359 void XMC_VADC_GLOBAL_BackgroundAbortSequence(XMC_VADC_GLOBAL_t *const global_ptr)
1360 {
1361 uint32_t brsctrl;
1363 uint32_t i;
1364 uint8_t grp_asen2_flag[XMC_VADC_MAXIMUM_NUM_GROUPS];
1365 #endif
1366 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundAbortSequence:Wrong Module Pointer", (
1367
1368 /* To disable trigger and gating before abort*/
1369 brsctrl = global_ptr->BRSCTRL;
1370
1371 global_ptr->BRSCTRL = (0U | (uint32_t)VADC_BRSCTRL_XTWC_Msk | (uint32_t)
VADC_BRSCTRL_GTWC_Msk);
1372
1373 /* Disable Background Request source */
1374
1377 {
1378 grp_asen2_flag[i] = (uint8_t)(g_xmc_vadc_group_array[i]->ARBPR >>
1379 XMC_VADC_GROUP_BackgroundDisableArbitrationSlot((XMC_VADC_GROUP_t *)
1380 }
1381 #endif
1382
1383 /* Abort the ongoing sequence */
1384 global_ptr->BRSMR |= (uint32_t)VADC_BRSMR_CLRPND_Msk;
1385
1387 /* Enable Background Request source */
1389 {
1390 if ((uint8_t)1 == grp_asen2_flag[i])
1391 {
1392 XMC_VADC_GROUP_BackgroundEnableArbitrationSlot((XMC_VADC_GROUP_t *)
1393 }
1394 }
1395 #endif
1396
1397 /* Re-enable any disabled trigger and gating*/
1398 global_ptr->BRSCTRL = (brsctrl | (uint32_t)VADC_BRSCTRL_XTWC_Msk | (uint32_t)
VADC_BRSCTRL_GTWC_Msk);
1399 }
1400
1401 /* API to determine how many channels are awaiting conversion */
1402 uint32_t XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending(XMC_VADC_GLOBAL_t *const
global_ptr)
1403 {
1404 uint32_t reg;
1405 uint32_t i;
1406 uint32_t j;
1407 uint32_t count;
1408
1409 XMC_ASSERT("XMC_VADC_GLOBAL_BackgroundGetNumChannelsPending:Wrong Module Pointer", (
1410
1411 count = 0U;
1412
1413 /* Loop through all groups and find out who is awaiting conversion */
1415 {
1416 if (global_ptr->BRSSEL[i])
1417 {
1418 reg = global_ptr->BRSPND[i];
1419
1420 for (j = 0U; j < XMC_VADC_NUM_CHANNELS_PER_GROUP; j++)
1421 {
1422 if (reg & 1U)
1423 {
1424 count++;
1425 }
1426
1427 reg = reg >> 1U;
1428 }
1429 }
1430 }
1431
1432 return count;
1433 }
1434
1435 #if (XMC_VADC_QUEUE_AVAILABLE == 1U)
1436 /* API to initialize queue request source */
1437 void XMC_VADC_GROUP_QueueInit(XMC_VADC_GROUP_t *const group_ptr, const
XMC_VADC_QUEUE_CONFIG_t *config)
1438 {
1439 uint32_t reg;
1440
1441 XMC_ASSERT("XMC_VADC_GROUP_QueueInit:Wrong Group Pointer", XMC_VADC_CHECK_GROUP_PTR(
group_ptr))
1442
1443 /* Disable arbitration slot of the queue request source */
1444 XMC_VADC_GROUP_QueueDisableArbitrationSlot(group_ptr);
1445
1446 reg = group_ptr->ARBPR;
1447
1448 /* Request Source priority */
1449 reg &= ~((uint32_t)VADC_G_ARBPR_PRIO0_Msk);
1450 reg |= (uint32_t) ((uint32_t)config->req_src_priority << VADC_G_ARBPR_PRIO0_Pos);
1451
1452 /* Conversion Start mode */
1453 if (XMC_VADC_STARTMODE_WFS != (XMC_VADC_STARTMODE_t)config->conv_start_mode)
1454 {
1455 reg |= (uint32_t)(VADC_G_ARBPR_CSM0_Msk);
1456 }
1457
1458 group_ptr->ARBPR = reg;
1459
1460
1461 group_ptr->QCTRL0 = (uint32_t)((config->qctrl0) | (uint32_t)(VADC_G_QCTRL0_XTWC_Msk)
|
1462 (uint32_t)(VADC_G_QCTRL0_TMWC_Msk) |
1463 (uint32_t)(VADC_G_QCTRL0_GTWC_Msk));
1464
1465 /* Gating mode */
1466 group_ptr->QMR0 = ((uint32_t)(config->qmr0) | (uint32_t)((uint32_t)
XMC_VADC_GATEMODE_IGNORE << VADC_G_QMR0_ENGT_Pos));
1467
1468 if (XMC_VADC_STARTMODE_CNR == (XMC_VADC_STARTMODE_t)(config->conv_start_mode) )
1469 {
1470 group_ptr->QMR0 |= (uint32_t)((uint32_t)1 << VADC_G_QMR0_RPTDIS_Pos);
1471 }
1472 /* Enable arbitration slot for the queue request source */
1473 XMC_VADC_GROUP_QueueEnableArbitrationSlot(group_ptr);
1474
1475 }
1476
1477 /* API to select one of the 16 possible triggers as a conversion trigger for queue
request source */
1478 void XMC_VADC_GROUP_QueueSelectTrigger(XMC_VADC_GROUP_t *const group_ptr,
1479 const XMC_VADC_TRIGGER_INPUT_SELECT_t input_num
)
1480 {
1481 uint32_t qctrl;
1482
1483 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectTrigger:Wrong Group Pointer",
1484 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectTrigger:Wrong Trigger Port", ((input_num) <
1485
1486
1487 /* Now select the conversion trigger */
1488 qctrl = group_ptr->QCTRL0;
1489 qctrl |= (uint32_t)VADC_G_QCTRL0_XTWC_Msk;
1490 qctrl &= ~((uint32_t)VADC_G_QCTRL0_XTSEL_Msk);
1491 qctrl |= (uint32_t)((uint32_t)input_num << VADC_G_QCTRL0_XTSEL_Pos);
1492 group_ptr->QCTRL0 = qctrl;
1493 }
1494
1496 void XMC_VADC_GROUP_QueueSelectTriggerEdge(XMC_VADC_GROUP_t *const group_ptr, const
XMC_VADC_TRIGGER_EDGE_t trigger_edge)
1497 {
1499
1500 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectTriggerEdge:Wrong Group Pointer",
1501 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectTriggerEdge:Wrong Gating Port", ((trigger_edge
) <= XMC_VADC_TRIGGER_EDGE_ANY))
1502
1503 /* Now select the gating input */
1505 qctrl |= (uint32_t)VADC_G_QCTRL0_XTWC_Msk;
1506 qctrl &= ~((uint32_t)VADC_G_QCTRL0_XTMODE_Msk);
1507 qctrl |= (uint32_t)((uint32_t)trigger_edge << VADC_G_QCTRL0_XTMODE_Pos);
1509 }
1510
1511 /* API to select one of the 16 possible trigger gates as a trigger gating signal for
queue request source */
1512 void XMC_VADC_GROUP_QueueSelectGating(XMC_VADC_GROUP_t *const group_ptr, const
XMC_VADC_GATE_INPUT_SELECT_t input_num)
1513 {
1515
1516 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectGating:Wrong Group Pointer",
1517 XMC_ASSERT("XMC_VADC_GROUP_QueueSelectGating:Wrong Gating Port", ((input_num) <
1518
1519 /* Now select the gating input */
1521 qctrl |= (uint32_t)VADC_G_QCTRL0_GTWC_Msk;
1522 qctrl &= ~((uint32_t)VADC_G_QCTRL0_GTSEL_Msk);
1523 qctrl |= (uint32_t)((uint32_t)input_num << VADC_G_QCTRL0_GTSEL_Pos);
1525 }
1526
1527 /* API to determine the number of channels in the queue (length includes the valid
channel in the Backup register)*/
1528 uint32_t XMC_VADC_GROUP_QueueGetLength(XMC_VADC_GROUP_t *const group_ptr)
1529 {
1530 uint32_t qsr;
1531 uint32_t qbur0;
1532 uint32_t length;
1533
1534 XMC_ASSERT("XMC_VADC_GROUP_QueueGetLength:Wrong Group Pointer",
1535
1536 qsr = group_ptr->QSR0;
1537 qbur0 = group_ptr->QBUR0;
1538
1539 if (qsr & (uint32_t)VADC_G_QSR0_EMPTY_Msk)
1540 {
1541 length = 0U;
1542 }
1543 else
1544 {
1545 length = (qsr & (uint32_t)VADC_G_QSR0_FILL_Msk) + 1U;
1546 }
1547
1548 if (qbur0 & (uint32_t)VADC_G_QBUR0_V_Msk )
1549 {
1550 length++;
1551 }
1552
1553 return length;
1554 }
1555
1556 /* API to abort ongoing conversion of a channel sequence */
1557 void XMC_VADC_GROUP_QueueAbortSequence(XMC_VADC_GROUP_t *const group_ptr)
1558 {
1559 uint32_t qctrl0;
1561
1562 XMC_ASSERT("XMC_VADC_GROUP_QueueAbortSequence:Wrong Group Pointer",
1563
1564 /* Disable any gating if present*/
1565 qctrl0 = group_ptr->QCTRL0;
1566
1567 group_ptr->QCTRL0 = (0U | (uint32_t)VADC_G_QCTRL0_XTWC_Msk |
1568 (uint32_t)VADC_G_QCTRL0_GTWC_Msk | (uint32_t)
VADC_G_QCTRL0_TMWC_Msk );
1569
1570 /* Disable the Arbitration 0 in the group before abort*/
1U);
1573
1574 /* Flush the Entries from queue*/
1575 XMC_VADC_GROUP_QueueFlushEntries(group_ptr);
1576
1579
1581 group_ptr->QCTRL0 = (qctrl0 | (uint32_t)VADC_G_QCTRL0_XTWC_Msk |
1583 }
1584
1585 /* API to abort conversion of the channel queued up next */
1586 void XMC_VADC_GROUP_QueueRemoveChannel(XMC_VADC_GROUP_t *const group_ptr)
1587 {
1588 uint32_t length_before_abort;
1589 uint32_t length_after_abort;
1590 uint32_t qctrl0;
1592
1593 XMC_ASSERT("XMC_VADC_GROUP_QueueRemoveChannel:Wrong Group Pointer",
1594
1595 /* Disable any gating if present*/
1596 qctrl0 = group_ptr->QCTRL0;
1597
1598 group_ptr->QCTRL0 = (0U | (uint32_t)VADC_G_QCTRL0_XTWC_Msk |
1600
1601 /* Disable the Arbitration 0 in the group before abort*/
1U);
1604
1605 length_before_abort = XMC_VADC_GROUP_QueueGetLength(group_ptr);
1606
1607 if (length_before_abort)
1608 {
1609 /* Remove the first entry of the queue */
1610 group_ptr->QMR0 |= (uint32_t)VADC_G_QMR0_CLRV_Msk;
1611
1612 length_after_abort = XMC_VADC_GROUP_QueueGetLength(group_ptr);
1613
1614 /* Loop until a reduction in queue length is assessed */
1615 while (length_after_abort == length_before_abort)
1616 {
1617 length_after_abort = XMC_VADC_GROUP_QueueGetLength(group_ptr);
1618 }
1619 }
1622
1624 group_ptr->QCTRL0 = (qctrl0 | (uint32_t)VADC_G_QCTRL0_XTWC_Msk |
1626 }
1627
1628 /* Get details of channel meant to be converted right after the ongoing conversion */
1629 int32_t XMC_VADC_GROUP_QueueGetNextChannel(XMC_VADC_GROUP_t *const group_ptr)
1630 {
1631 int32_t ch_num;
1632
1633 XMC_ASSERT("XMC_VADC_GROUP_QueueGetNextChannel:Wrong Group Pointer",
1634
1635 /*
1636 * Check if there is something in the backup stage. If not, read queue-0
1637 * entry.
1638 */
1639 if ( (group_ptr->QBUR0) & (uint32_t)VADC_G_QBUR0_V_Msk)
1640 {
1641 ch_num = (int32_t)(group_ptr->QBUR0 & (uint32_t)VADC_G_QBUR0_REQCHNR_Msk);
1642 }
1643 else if ( (group_ptr->Q0R0) & (uint32_t)VADC_G_Q0R0_V_Msk)
1644 {
1645 ch_num = (int32_t)(group_ptr->Q0R0 & (uint32_t)VADC_G_Q0R0_REQCHNR_Msk);
1646 }
1647 else
1648 {
1649 /* Nothing is pending */
1650 ch_num = -1;
1651 }
1652
1653 return ch_num;
1654 }
1655
1656 /* Get the channel number of the channel whose conversion had been interrupted */
1657 int32_t XMC_VADC_GROUP_QueueGetInterruptedChannel(XMC_VADC_GROUP_t *const group_ptr)
1658 {
1659 int32_t ch_num;
1660
1661 XMC_ASSERT("XMC_VADC_GROUP_QueueGetInterruptedChannel:Wrong Group Pointer",
1662
1663 if ((group_ptr->QBUR0) & (uint32_t)VADC_G_QBUR0_V_Msk)
1664 {
1665 ch_num = (int32_t)(group_ptr->QBUR0 & (uint32_t)VADC_G_QBUR0_REQCHNR_Msk);
1666 }
1667 else
1668 {
1669 /* No such channel */
1670 ch_num = -1;
1671 }
1672
1673 return ch_num;
1674 }
1675
1676 /* Select a Service Request line for the request source event */
1677 void XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode(XMC_VADC_GROUP_t *const group_ptr
, const XMC_VADC_SR_t sr)
1678 {
1679 uint32_t sevnp;
1680
1681 XMC_ASSERT("XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode:Wrong Group Pointer",
1682 XMC_ASSERT("XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode:Wrong Service Request",
((sr) <= XMC_VADC_SR_SHARED_SR3))
1683
1684 sevnp = group_ptr->SEVNP;
1685
1686 sevnp &= ~((uint32_t)VADC_G_SEVNP_SEV0NP_Msk);
1687 sevnp |= (uint32_t)((uint32_t)sr << VADC_G_SEVNP_SEV0NP_Pos);
1688
1689 group_ptr->SEVNP = sevnp;
1690
1691 }
1692 #endif
1693
1695 /* API to initialize a channel unit */
1696 void XMC_VADC_GROUP_ChannelInit(XMC_VADC_GROUP_t *const group_ptr, const uint32_t
ch_num,
1697 const XMC_VADC_CHANNEL_CONFIG_t *config)
1698 {
1699 uint32_t prio;
1700 uint32_t ch_assign;
1701 uint32_t mask;
1702
1703
1704 XMC_ASSERT("XMC_VADC_GROUP_ChannelInit:Wrong Group Pointer",
1705 XMC_ASSERT("XMC_VADC_GROUP_ChannelInit:Wrong Channel Number", ((ch_num) <
1706
1707 prio = (uint32_t)config->channel_priority;
1708
1709 /* Priority channel */
1710 ch_assign = group_ptr->CHASS;
1711 ch_assign &= ~((uint32_t)((uint32_t)1 << ch_num));
1712 ch_assign |= (uint32_t)(prio << ch_num);
1713 group_ptr->CHASS = ch_assign;
1714
1715 /* Alias channel */
1716 if (config->alias_channel >= (int32_t)0)
1717 {
1718 mask = (uint32_t)0;
1719 if ((uint32_t)1 == ch_num)
1720 {
1721 mask = VADC_G_ALIAS_ALIAS1_Pos;
1722 group_ptr->ALIAS &= ~(uint32_t)(VADC_G_ALIAS_ALIAS1_Msk);
1723 }
1724 else if ((uint32_t)0 == ch_num)
1725 {
1726 mask = VADC_G_ALIAS_ALIAS0_Pos;
1727 group_ptr->ALIAS &= ~(uint32_t)(VADC_G_ALIAS_ALIAS0_Msk);
1728 }
1729
1730 group_ptr->ALIAS |= (uint32_t)(config->alias_channel << mask);
1731 }
1732
1733 group_ptr->BFL |= config->bfl;
1734
1735 #if (XMC_VADC_BOUNDARY_FLAG_SELECT == 1U)
1736 group_ptr->BFLC |= config->bflc;
1737 #endif
1738 /* Program the CHCTR register */
1739 group_ptr->CHCTR[ch_num] = config->chctr;
1740
1741 }
1742
1743 /* API to determine whether input to a channel has violated boundary conditions */
1744 bool XMC_VADC_GROUP_ChannelIsResultOutOfBounds(XMC_VADC_GROUP_t *const group_ptr,
const uint32_t ch_num)
1745 {
1746 bool retval;
1747 uint32_t chctr;
1748 uint32_t ceflag;
1749
1750 XMC_ASSERT("XMC_VADC_GROUP_ChannelIsResultOutOfBounds:Wrong Group Pointer",
1751 XMC_ASSERT("XMC_VADC_GROUP_ChannelIsResultOutOfBounds:Wrong Channel Number",
1753
1754 retval = (bool)false;
1755 /*
1756 Check if the Channel event is configured to be generated in the event of
1757 boundary violation and if affirmative, check if the channel event is set.
1758 */
1759 /* Extract CHEVMODE for requested channel */
1760 chctr = group_ptr->CHCTR[ch_num];
1761 chctr = (uint32_t)(chctr >> (uint32_t)VADC_G_CHCTR_CHEVMODE_Pos) & (uint32_t)0x3;
1762
1763 /* Extract CEFLAG for the requested channel */
1764 ceflag = group_ptr->CEFLAG;
1765 ceflag = ceflag & ((uint32_t)((uint32_t)1 << ch_num) );
1766
1767 /* Check what was the channel event generation criteria */
1768 if ( (( (uint32_t)XMC_VADC_CHANNEL_EVGEN_INBOUND == chctr) \
1769 || ((uint32_t) XMC_VADC_CHANNEL_EVGEN_OUTBOUND == chctr)) && (ceflag) )
1770 {
1771 retval = (bool)true;
1772 }
1773
1774 return retval;
1775 }
1776
1777 /* Set a reference voltage for conversion */
1778 void XMC_VADC_GROUP_ChannelSetInputReference(XMC_VADC_GROUP_t *const group_ptr,
1779 const uint32_t ch_num,
1780 const XMC_VADC_CHANNEL_REF_t ref)
1781 {
1783 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetInputReference:Wrong Group Pointer",
1784 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetInputReference:Wrong Channel Number", ((ch_num)
< XMC_VADC_NUM_CHANNELS_PER_GROUP))
1785 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetInputReference:Wrong Voltage Reference", ((ref)
<= XMC_VADC_CHANNEL_REF_ALT_CH0))
1786
1788 chctr &= ~((uint32_t)VADC_G_CHCTR_REFSEL_Msk);
1789 chctr |= (uint32_t)((uint32_t)ref << VADC_G_CHCTR_REFSEL_Pos);
1790
1791 group_ptr->CHCTR[ch_num] = chctr;
1792 }
1793
1794 /* API to select one of the available 16 registers for storing the channel result */
1795 void XMC_VADC_GROUP_ChannelSetResultRegister(XMC_VADC_GROUP_t *const group_ptr,
1797 const uint32_t result_reg_num)
1798 {
1800
1801 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetResultRegister:Wrong Group Pointer",
1802 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetResultRegister:Wrong Channel Number",
1804 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetResultRegister:Wrong Result Register",
1805 ((result_reg_num) < XMC_VADC_NUM_RESULT_REGISTERS))
1806
1808 chctr &= ~((uint32_t)VADC_G_CHCTR_RESREG_Msk);
1809 chctr |= (uint32_t)(result_reg_num << VADC_G_CHCTR_RESREG_Pos);
1810
1812 }
1813
1814 /* API to select one of the available 4 class conversion */
1815 void XMC_VADC_GROUP_ChannelSetIclass(XMC_VADC_GROUP_t *const group_ptr,
1817 const XMC_VADC_CHANNEL_CONV_t conversion_class)
1818 {
1819
1821
1822 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetIclass:Wrong Group Pointer",
1823 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetIclass:Wrong Channel Number",
1825 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetIclass:Wrong input class ",
1826 (XMC_VADC_CHANNEL_CONV_GLOBAL_CLASS1 >= conversion_class))
1827
1829 chctr &= ~((uint32_t)VADC_G_CHCTR_ICLSEL_Msk);
1830 chctr |= (uint32_t)((uint32_t)conversion_class << (uint32_t)VADC_G_CHCTR_ICLSEL_Pos
);
1831
1833
1834 }
1835
1836 /* API to retrieve the result register bound with specified channel */
1837 uint8_t XMC_VADC_GROUP_ChannelGetResultRegister(XMC_VADC_GROUP_t *const group_ptr,
const uint32_t ch_num)
1838 {
1839 uint8_t resreg;
1840
1841 XMC_ASSERT("XMC_VADC_GROUP_ChannelGetResultRegister:Wrong Group Pointer",
1842 XMC_ASSERT("XMC_VADC_GROUP_ChannelGetResultRegister:Wrong Channel Number",
1844
1845 resreg = (uint8_t)((group_ptr->CHCTR[ch_num] & (uint32_t)VADC_G_CHCTR_RESREG_Msk) >>
VADC_G_CHCTR_RESREG_Pos) ;
1846
1847 return resreg;
1848 }
1849
1850 /* API to manually assert channel event */
1851 void XMC_VADC_GROUP_ChannelTriggerEvent(XMC_VADC_GROUP_t *const group_ptr, const
uint32_t ch_num)
1852 {
1853 uint32_t ceflag;
1854
1855 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEvent:Wrong Group Pointer",
1856 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEvent:Wrong Channel Number", ((ch_num) <
1857
1858 ceflag = group_ptr->CEFLAG;
1859 ceflag |= (uint32_t)((uint32_t)1 << ch_num);
1860 group_ptr->CEFLAG = ceflag;
1861 }
1862
1863 /* API to bind channel event with a service request (NVIC Node) */
1864 void XMC_VADC_GROUP_ChannelSetEventInterruptNode(XMC_VADC_GROUP_t *const group_ptr,
1866 const XMC_VADC_SR_t sr)
1867 {
1868 uint32_t route_mask;
1869
1870 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetEventInterruptNode:Wrong Group Pointer",
1871 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetEventInterruptNode:Wrong Channel Number",
1873 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetEventInterruptNode:Wrong Service Request", ((sr
) <= XMC_VADC_SR_SHARED_SR3))
1874
1875 route_mask = group_ptr->CEVNP0;
1876 route_mask &= ~((uint32_t)15 << (ch_num * (uint32_t)4));
1877 route_mask |= (uint32_t)( (uint32_t)sr << (ch_num * (uint32_t)4));
1878 group_ptr->CEVNP0 = route_mask;
1879 }
1880
1881 /* API to configure conditions for generation of channel event */
1882 void XMC_VADC_GROUP_ChannelTriggerEventGenCriteria( XMC_VADC_GROUP_t *const group_ptr,
1884 const XMC_VADC_CHANNEL_EVGEN_t criteria)
1885 {
1887
1888 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEventGenCriteria:Wrong Group Pointer",
1889 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEventGenCriteria:Wrong Channel Number",
1891 XMC_ASSERT("XMC_VADC_GROUP_ChannelTriggerEventGenCriteria:Wrong Event Generation
Criteria",
1892 ((criteria) <= XMC_VADC_CHANNEL_EVGEN_ALWAYS))
1893
1895 chctr &= ~((uint32_t)VADC_G_CHCTR_CHEVMODE_Msk);
1896 chctr |= (uint32_t)((uint32_t)criteria << VADC_G_CHCTR_CHEVMODE_Pos);
1898 }
1899
1900 /* API to configure the boundary selection */
1901 void XMC_VADC_GROUP_ChannelSetBoundarySelection(XMC_VADC_GROUP_t *const group_ptr,
1903 XMC_VADC_BOUNDARY_SELECT_t boundary_sel,
1904 XMC_VADC_CHANNEL_BOUNDARY_t selection)
1905 {
1906 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetBoundarySelection:Wrong Group Pointer",
1907 XMC_ASSERT("XMC_VADC_GROUP_ChannelSetBoundarySelection:Wrong Channel Number",
1909
1910 group_ptr->CHCTR[ch_num] &= ~((uint32_t)VADC_G_CHCTR_BNDSELL_Msk << boundary_sel);
1911 group_ptr->CHCTR[ch_num] |= (selection << ((uint32_t)VADC_G_CHCTR_BNDSELL_Pos + (
uint32_t)boundary_sel));
1912 }
1913
1914 /* Make the specified result register part of Result FIFO */
1915 void XMC_VADC_GROUP_AddResultToFifo(XMC_VADC_GROUP_t *const group_ptr, const uint32_t
res_reg)
1916 {
1917 uint32_t fen;
1918
1919 XMC_ASSERT("XMC_VADC_GROUP_AddResultToFifo:Wrong Group Pointer",
1920 XMC_ASSERT("XMC_VADC_GROUP_AddResultToFifo:Wrong Result Register", ((res_reg) <
XMC_VADC_NUM_RESULT_REGISTERS))
1921
1922 /* Extract and clear the FIFO enable field */
1923 fen = group_ptr->RCR[res_reg];
1924 fen &= ~((uint32_t)VADC_G_RCR_FEN_Msk);
1925 /* Set this register up as a FIFO member */
1926 fen |= (uint32_t)((uint32_t)1 << VADC_G_RCR_FEN_Pos);
1927 group_ptr->RCR[res_reg] = fen;
1928 }
1929
1930
1931 /* Applicable to fast compare mode, this API sets up the value which is to be
compared against conversion result */
1932 void XMC_VADC_GROUP_SetResultFastCompareValue(XMC_VADC_GROUP_t *const group_ptr,
1933 const uint32_t res_reg,
1934 const XMC_VADC_RESULT_SIZE_t compare_val)
1935 {
1936 uint32_t res = group_ptr->RES[res_reg];
1937
1938 XMC_ASSERT("XMC_VADC_GROUP_SetResultFastCompareValue:Wrong Group Pointer",
1939 XMC_ASSERT("XMC_VADC_GROUP_SetResultFastCompareValue:Wrong Result Register",
1940 ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS))
1941
1942 res &= ~((uint32_t)VADC_G_RES_RESULT_Msk);
1943 res |= (uint32_t)((uint32_t)compare_val << XMC_VADC_RESULT_LEFT_ALIGN_10BIT);
1944 group_ptr->RES[res_reg] = res;
1945 }
1946
1947 /* API to retrieve the result of fast mode comparison */
1948 XMC_VADC_FAST_COMPARE_t XMC_VADC_GROUP_GetFastCompareResult(XMC_VADC_GROUP_t *const
group_ptr, const uint32_t res_reg)
1949 {
1950 XMC_VADC_FAST_COMPARE_t result;
1951 uint32_t res;
1952
1953 XMC_ASSERT("XMC_VADC_GROUP_GetFastCompareResult:Wrong Group Pointer",
1954 XMC_ASSERT("XMC_VADC_GROUP_GetFastCompareResult:Wrong Result Register", ((res_reg) <
1955
1956 res = group_ptr->RES[res_reg];
1957
1958 if (res & (uint32_t)VADC_G_RES_VF_Msk)
1959 {
1960 result = (XMC_VADC_FAST_COMPARE_t)((uint32_t)(res >> (uint32_t)VADC_G_RES_FCR_Pos)
& (uint32_t)1);
1961 }
1962 else
1963 {
1964 result = XMC_VADC_FAST_COMPARE_UNKNOWN;
1965 }
1966
1967 return result;
1968 }
1969
1970 /* Applicable to fast compare mode, this API sets up the value which is to be
compared against conversion result */
1971 void XMC_VADC_GROUP_SetResultSubtractionValue(XMC_VADC_GROUP_t *const group_ptr,
1972 const uint16_t subtraction_val)
1973 {
1974 uint32_t res;
1975
1976 XMC_ASSERT("XMC_VADC_GROUP_SetResultSubtractionValue:Wrong Group Pointer",
1977
1978 res = group_ptr->RES[0];
1979 res &= ~((uint32_t)VADC_G_RES_RESULT_Msk);
1980 res |= (uint32_t)subtraction_val;
1981 group_ptr->RES[0] = res;
1982 }
1983
1984
1985 /* API to select a service request line (NVIC Node) for result event of specified
unit of result hardware */
1986 void XMC_VADC_GROUP_SetResultInterruptNode(XMC_VADC_GROUP_t *const group_ptr,
1987 const uint32_t res_reg,
1988 const XMC_VADC_SR_t sr)
1989 {
1990 uint32_t route_mask;
1991
1992 XMC_ASSERT("XMC_VADC_GROUP_SetResultInterruptNode:Wrong Group Pointer",
1993 XMC_ASSERT("XMC_VADC_GROUP_SetResultInterruptNode:Wrong Result Register", ((res_reg)
< XMC_VADC_NUM_RESULT_REGISTERS))
1994 XMC_ASSERT("XMC_VADC_GROUP_SetResultInterruptNode:Wrong Service Request", ((sr) <=
1995
1996 if (res_reg <= 7U)
1997 {
1998 route_mask = group_ptr->REVNP0;
1999 route_mask &= ~((uint32_t)((uint32_t)15 << (res_reg * (uint32_t)4) ));
2000 route_mask |= (uint32_t)((uint32_t)sr << (res_reg * (uint32_t)4));
2001 group_ptr->REVNP0 = route_mask;
2002 }
2003 else
2004 {
2005 route_mask = group_ptr->REVNP1;
2006 route_mask &= ~((uint32_t)((uint32_t)15 << (( res_reg - (uint32_t)8) * (uint32_t)4
) ));
2007 route_mask |= (uint32_t)((uint32_t)sr << ((res_reg - (uint32_t)8) * (uint32_t)4));
2008 group_ptr->REVNP1 = route_mask;
2009 }
2010 }
2011
2012 /* API to retrieve the tail of the fifo which the specified result register is a part
of */
2013 uint32_t XMC_VADC_GROUP_GetResultFifoTail(XMC_VADC_GROUP_t *const group_ptr, uint32_t
res_reg)
2014 {
2015 uint32_t tail;
2016 uint32_t rcr;
2017 int32_t i;
2018 bool exit_flag;
2019
2020 XMC_ASSERT("XMC_VADC_GROUP_GetResultFifoTail:Wrong Group Pointer",
2021 XMC_ASSERT("XMC_VADC_GROUP_GetResultFifoTail:Wrong Result Register", ((res_reg) <
2022
2023 tail = 0U;
2024 exit_flag = (bool)false;
2025
2026 if ((bool)true == XMC_VADC_GROUP_IsResultRegisterFifoHead(group_ptr, res_reg))
2027 {
2028 res_reg = res_reg - 1U;
2029 }
2030
2031 /* Border condition */
2032 if (0U == res_reg)
2033 {
2034 tail = 0U;
2035 }
2036 else
2037 {
2038 /* Stop either at a node that does not have FEN set or at Node-0 */
2039 for (i = (int32_t)res_reg; i >= (int32_t)0; i--)
2040 {
2041 rcr = group_ptr->RCR[i];
2042 rcr &= (uint32_t)VADC_G_RCR_FEN_Msk;
2043
2044 if (rcr)
2045 {
2046 if ((int32_t)0 == i)
2047 {
2048 /* No more nodes. Stop here */
2049 tail = (uint32_t)0;
2050 exit_flag = (bool)true;
2051 }
2052 }
2053 else
2054 {
2055 /* The preceding register forms the tail of the FIFO */
2056 tail = (uint32_t)i + (uint32_t)1;
2057 exit_flag = (bool)true;
2058 }
2059 if (exit_flag)
2060 {
2061 break;
2062 }
2063 }
2064 }
2065 return tail;
2066 }
2067
2068 /* API to retrieve the head of the fifo which the specified result register is a part
of */
2069 uint32_t XMC_VADC_GROUP_GetResultFifoHead(XMC_VADC_GROUP_t *const group_ptr, const
uint32_t res_reg)
2070 {
2071 uint32_t head;
2072 uint32_t rcr;
2073 uint32_t i;
2074
2075 XMC_ASSERT("XMC_VADC_GROUP_GetResultFifoHead:Wrong Group Pointer",
2076 XMC_ASSERT("XMC_VADC_GROUP_GetResultFifoHead:Wrong Result Register", ((res_reg) <
2077
2078 if ((bool)true == XMC_VADC_GROUP_IsResultRegisterFifoHead(group_ptr, res_reg))
2079 {
2080 head = res_reg;
2081 }
2082 else
2083 {
2084 head = XMC_VADC_NUM_RESULT_REGISTERS - (uint32_t)1;
2085
2086 for (i = res_reg; i < XMC_VADC_NUM_RESULT_REGISTERS ; i++)
2087 {
2088 rcr = group_ptr->RCR[i];
2089 rcr &= (uint32_t)VADC_G_RCR_FEN_Msk;
2090
2091 if (!rcr)
2092 {
2093 /* This node forms the head of the FIFO */
2094 head = i ;
2095 break;
2096 }
2097 }
2098 }
2099 return head;
2100 }
2101
2102 /* API to determine if the specified result register is the head of a result fifo */
2103 bool XMC_VADC_GROUP_IsResultRegisterFifoHead(XMC_VADC_GROUP_t *const group_ptr, const
uint32_t res_reg)
2104 {
2105 bool ret_val;
2106 uint32_t rcr_head;
2107 uint32_t rcr_next;
2108
2109 XMC_ASSERT("XMC_VADC_GROUP_IsResultRegisterFifoHead:Wrong Group Pointer",
2110 XMC_ASSERT("XMC_VADC_GROUP_IsResultRegisterFifoHead:Wrong Result Register",
2111 ((res_reg) < XMC_VADC_NUM_RESULT_REGISTERS))
2112
2113 rcr_head = group_ptr->RCR[res_reg];
2114 rcr_head &= (uint32_t)VADC_G_RCR_FEN_Msk;
2115 rcr_next = group_ptr->RCR[res_reg - (uint32_t)1];
2116 rcr_next &= (uint32_t)VADC_G_RCR_FEN_Msk;
2117
2118 if (rcr_head)
2119 {
2120 ret_val = (bool)false;
2121 }
2122 else if (rcr_next)
2123 {
2124 ret_val = (bool)true;
2125 }
2126 else
2127 {
2128 ret_val = (bool)false;
2129 }
2130
2131 return ret_val;
2132 }
2133
2134 #endif
2135

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