EXPERIMENT NO.

Study of IC-74LS138 as a Demultiplexer / Decoder

Title: Study of IC-74LS138 as a Demultiplexer / Decoder

Objectives:

1) To get knowledge of basic working of Demultiplexer and decoder.

2) Design and Implementation of full adder and subtractor function using IC-
74LS138.
3) Design & Implementation of 3-bit code converter using IC-74LS138.

Aim: Study of IC-74LS138 as a Demultiplexer/ Decoder

Hardware: Digital IC trainer kit, patch cords, power supply, IC74LS138, IC 74LS20.

Theory:

Discrete quantities of information are represented in digital systems with binary

codes. A binary code of n bits is capable of representing up to 2n distinct elements of the
coded information. A decoder is a combinational circuit that converts binary information
from n input lines to a maximum of 2n unique output lines. If the n-bit decoded
information has unused or don't-care combinations, the decoder output will have fewer
than 2n outputs. The decoders presented here are called n-to-m-line decoders, where m
≤2n. Their purpose is to generate the 2 n (or fewer) minterms of n input variables. The
name decoder is also used in conjunction with some code converters such as a BCD-to-
seven segment decoder. As an example, consider the 3-to-8-line decoder circuit of Fig.
3.1. The three inputs are decoded into eight outputs, each output representing one of the
minterms of the 3-input variables.
 Fig3.1: A 3 -to-8 line decoder
The three inverters provide the complement of the inputs, and each one of the eight AND
gates generates one of the minterms. A particular application of this decoder would be a
binary-to-octal conversion. The input variables may represent a binary number, and the
outputs will then represent the eight digits in the octal number system. However, a 3-to-8-
line decoder can be used for decoding any 3-bit code to provide eigbt outputs, one for
each element of the code.

Table 3.1: Truth Table of a 3·to·8·Llne Decocler

The operation of the decoder may be further clarified from its input-output rdationship,
listed in Table 3.1. Observe that the output variables are mutually exclusive because only
one output can be equal to 1 at anyone time. The output line whose value is equal to 1
represents the minterm equivalent of the binary number presently available.
Introduction of IC 74LS138: The LSTTL/MSI SN54/74LS138 is a high speed 1-of-8
Decoder/ Demultiplexer. This device is ideally suited for high speed bipolar memory chip
select address decoding. The multiple input enables allow parallel expansion to a 1-of-24
encoder using just three LS138 devices or to a 1-of-32 decoder using four LS138s and
one inverter. The LS138 is fabricated with the Schottky barrier diode process for high
speed and is completely compatible with all Motorola TTL families.

Fig3.2:Pin diagram of IC 74LS138

 Fig3.3:(a) Truth table &(b) logic diagram of IC 74LS153

Design and Implement full adder and subtractor function using IC-74LS138:
A) Implementation of full adder Sum=m(1,2,4,7) and Carry=m(3,5,6,7)
 Fig 3.4: Design of full adder using IC-74138

Table 3.2: Truth table of full adder

B) Implementation of full subtractor Difference=m(1,2,4,7) and Borrow=m(1,2,3,7)

 Fig 3.5: Design of full adder using IC-74138

Table 3.3: Truth table of full subtractor

Design 3 bit binary to gray code convertor using IC74LS138:

Implement binary to gray code convertor G0=m(1,2,5,6), G1=m(2,3,4,5), G2=m(4,5,6,7)

using IC 74153
 Fig 3.6: Design of Binary to Gray code convertor using IC-74138

Table 3.4: Truth Table of binary to gray code convertor

Design 3bit Gray to Binary code convertor using IC74LS138:

Implement Gray to Binary code convertor B0=m(1,2,4,7), B1=m(2,3,4,5), B2=m(4,5,6,7)
using IC 74153

Fig 3.6: Design of Gray to Binary code convertor using IC-74138

Table 3.4: Truth Table of Gray to Binary code convertor

Input(Gray Output(Binary
Code) Code)
G2 G1 G0 B2 B1 B0
0 0 0 0 0 0
0 0 1 0 0 1
0 1 0 0 1 1
0 1 1 0 1 0
1 0 0 1 1 1
1 0 1 1 1 0
1 1 0 1 0 0
1 1 1 1 0 1

Procedure:
1. Connect the circuit as shown in the figure
 2. Verify the truth table

Conclusion: We have studied the concept of Demultiplexer/Decoder as well as we have

designed 3 bit code convertor using IC-74LS138.

Upon completion of experiment students will be able to:

1. Describe concept of Demultiplexer/Decoder.

2. Design Full adder and subtractor using IC 74LS138.
3. State the importance of gray code over other codes.
4. Create code convertor using IC 74LS138.

Oral Question Bank

Q. No Description

How any 4:1 mux required to implement four variable function.

1

2 Convert BCD 0001 0010 0110 to binary.

3 How many 1-of-16 decoders are required for decoding a 7-bit binary number?
4 A decoder can be used as a Demultiplexer by ________.
Draw the logic diagram of a 2-bit Demultiplexer, a circuit whose single input line is
5 steered to one of the four output lines depending on the state of the two control lines.
Build a two-bit multiplier out of gates (i.e. it multiplies two two-bit numbers resulting
in
6
a 4-bit number).
What is a Demultiplexer circuit? Briefly describe one or two applications of a
7 Demultiplexer?
Design BCD to Gray code convertor using decoder IC.
8
Implement a full subtractor combinational circuit using a 3-to-8 decoder and external
9 NOR gates.