Tio Operectional Amplifier Ard Linear Application Operational Amplifier (Op-Amp): The ep-amp is te most extensively used anilog integrated circuit (IC). Its name specifically redeys 40 the many mathematica operations" that this type of amplifier” is capable of | carrying out. Te schematic symbel of Ux op-ampis displayed in Fig (14) and its equivalent circult in Fig (1bJ.while Fig tz) shows the transfer characteristic of « typical Op-amp » Noninvey-ting Sake Mec we ve Ne output Lnverting, Vee Input ot Fig) Op-amp schematic iat: Rin > 10 M2 4 Ro Foon, land Ua open loop. quin is clecredsed with Battles as_|| shown in Fig (3). i | tl (de) Los Ao Fiy(3) openioop guin sf typical opamp PCHz) tf f fe Tt is clear that th ep—amp gain have the Low-pass tsk order Filter responses and Acs) «.\ may be exprssed as | Ales Ae ere eae) | I+ SfwWe | which Ar physical Frequency 2 Sajw, becomes i i a = os ee (2) i It db Yule | where We és Be corner er cutoff Pegs For Bequences (OD We + Gy (2) may be approximated by: Atju) = Anes Se ee || | ogTus, JAtjoo) = w | From which f& con be seen thet [A| reaches unity (0 d8) ata fequmcy knot by Wy uhure \ fare ae] The Arequeay Fee BE Fs usually specified on Yu cabs sheets fle FP iijeciuiag li ee inpalaaes onilk gant aden nl ag | : commercially a amp, “Unity, gain bandusidlth ®, and since fis the product of Ua de “gain As)and the 3d® buadwidth Cfc) » it is also known as, the gain — bandwidth product ” . | The Op-amp amplifies the difference signal Vin=Vi-Va and hence ignores ony Signal commen to beth inputs » That is sift V=Ve > then Vo will ideally be Bere. This property is calh © common-moda rejection 5 and we conclucle thaé on ideal op-amp has Bere Commen-mocke gain or infinite commone, moda rejection - Practically > the common—made is not OC were, and He ratio of ol’ fPerential gain ta Ue common— mode gain is quantified by a measure known as “Common meds rejection rakio” 5 defined as EU PG me Delage I Tend Since ideal op-amp has infmite open loop gain, where Ao = ME = Ve, Bias vi approaches and ideally equals Va, Vi; hav and-—there-is—o rrbual but 7 not physical” shert “circurt betweon the twe inputs of the opamp - Baas cal EER sy coop ieee neg) ee - ILinear Applications of the Bp dep: 7 Linear application is cafined as one in which we employ Sp-amp eperuts in linear gion and otha linear elemetts. Such eppilications are + amplifrers 5 summers filters, ete» 1. Inverbing ond Moniaverting Amplifiers # Figl4) illustrate the noninverting amplifier circuit. ia | Motice that Hw ompir fier hasanegative feedback network Formed by a resistive veleage divider. The F-Bn isadded to _ control the ‘closed loop: gain © G&” 5 Lhun G is | hes Mie Ae icidbomactdee tna ea | Ue 1+ BAs where Bis the feedback gain and can easily be Sound as | Ri ce Ce) mat eH) Re Fig( 4). Moninverting Amp.The © closed _Ieep gain” canbe found. asin = — Lhe PolTowing oe : | since de =o, then ip is a commen current ae Ry» thus 2 || wn esr feedback gain A= VE = Ri] (Ro R$) = 1a a Ts find the bandwidth od the omplidterr, the | Pegneasye respones—ob the omplidicae is_weritten—as + - a wy = AG es || — ; Gifu a T+ BAG Se ; but as in_eg (2) Aju) = Acfuti 3) . Hhesede Ge tfuty = Achi+i%) a _— / e t+ B Soe . It diwe t BAc Sine AAS>1 Cee tak — ma PAS = Gum) ea | Tus the closed Joop gains pt ju! /8 Hus) | — _ '+3 GimE hye, B= ig and We fo = We +— | eyed the —clored! —Joop—amp i drer—Damdwidth—is—__, Uk, = RB We —-yrro-- — (14) SsEx 2 Given i i ide. teeuth with - — Pp -2049 hus As = 10 and unity. gain baadwid-th}, of 10° Hz ~The Power supply is FIOV~ Find the circuit gain—cng bandwidth for _Rz-=1009 Ha and Ry == 10_k, - — Fa 7 ee ie ee ne | eo re _ he inverting input—dfor the tvee_ease: @ For Re oy > G aes Tz two wavedyms are shown belon =— — _| . Volta - : Vy =i, a > cee ee ee = —__Vo. a eermnenes Ma Nets that Vea Br linear spevaéronflattens of fF at + Vee (or -/O Vv) EX = For tHe circuit in Frg. below Lindl th. Values in ino | eilsaestinit nuteetleots ky 2 Az 2 Ve » Ap. 2 hee s Also Caad Ys v Voltage gain We the carrent gain + 9 and the powr gein iso a Fin * Ri=ik ee ee It is clear that whan Vin exceeds (Me = imv) > the output Vin | | || | | | @ For Be =|9 = G=20 => Ve= ZO Sinwt | 1 V2 = a — 0.05 Vo pope Ft Ri | | | | i | I | | | | ; i 1 | |1 Shes = Since the input psistance of Ye 0P-amp is very — large thon Aiy rr hy follows V2 — I] Vlt He. a Leet — Moz _Cht St) Vig = 10-V i re | | + 4 ss fii: Ve =. Zo oo io mA i AY Ry /000 ho = A2zpdye = 14105 KN mA a ip FE = 10 VA- Vin in Sie A jf So current goin = Zh = 0 ond Yy p owey gain == eo -fro > Lin Fee: > Design ol noninirting oP -amP complidyev having a gain | | of 10 ool ot bandwidth of 100 KHz. | thee Sel. ae. Ucuiavy ting circult fs given yn Frys belaw —_—_—. for this ect | —_ Sa = fp BRE = fp SSE ee AE = 9 Ea Api | let RpadkKra = R2i K2 R Bw ky = Affe = + Lp = ites io” ——— | hits 2p gt Min | be | - es We pod, a1 Op—camp having unity gain bonduidth af’ 1 MHz. rr g | | Asan jo lame inverting conhiqurection of tu op -amp “amplifier cIrcuik is shown in Frg(9). Ib is also a negative | Feedback amplifier ig Rp Fig69) For this circuit 3 dy = Af since the input cunt b> the op-amp is negligibly smell . eee Va. — Ve Sots us RF Thus But we hare the open beep gain Av= “> _ and V,20| therefore : ies | Van Me —é) | Substituting ia ey 05) gives tate? ann re 1 Rr Re | = chred lop gain ( B) can easily be ound as | (Ge Wes ae ABR ce) vin Re + Ri tRiAs } Since Ae is very large Ack, S> (Ria RE)A fw _ | eo chad pe | Aang be eqs UB) and chividing the mameratoy and denominator by RRs | G2 ———_As__ al | 14 (& LFA) I But 14+Ar a As | nh | Rus a = As i 1+(%) As A comparison with the sess Fesdback eqyattn Ge SAS indicates that we can equate th Redback | 7+#RAc ‘geal | = Ree) ae | a Re G ane Remember Lhut the clased loup amplifier bandustdbh andl the closecl ep sponse are ; cy | | | | | UL, = AWA = Bu, ~ — en | Gis Be + 2 a“ The Frequency respoce— of He inver trang and noninverting | emplifiea is 7 | 1/8 = Se 8 atl ‘ ee au Ges/ 1+) 2On Fy \| Sajw \| | |sa ea ee a Peet Note sx We epeetional amplidver circuit illustrated in Fy Cio) is a noninverting amplifier ith Rezo and RK, =00 , thus the gain =1 — or Me 24 => Vo=Vin » That means te cutput of te circuie Follows the input — Voltaye , hence this circuit /s commonty referred t as a ~ Voltage Fillewer » rn I ip high || # is: Ie4 e1p low eee ee Fig 10) voltage dellower (This circuit 1s Frequently used as a buffer amplifier te “rechice Velbuge attenudtisa caused by connecting « source with a high impedance ta Jon —impecane Joad, 4-2 Eo iselate tha load - OC EX Fer the cireuit in Fig in) determine the values V, > 44 > 42-4 Ve, L, and 4, . Also detevmine He Voltage gain Vo/Vin » current gain Le fi, > and power gain R Pin | ee woke FiganSol: Vi= Ve =o byes Vine 4. Min 8S Sie seal Ri RK 1x10% ‘ | | ‘ fr . ; | Av adh) (Sine no current pass inte th op. amp circuit) | oo Ap = 1 mA | | | | Me i. Vi=Vve — —Ve : ~~ Fa aR A | oe Ve = — do RP = — (1x102) (10x00) =-10V i Be Vee IO atc A I Gai 707 IT ; 5 Ee | doe heh. = —tl mA | Voltage gain = awpiuyl). current gain = de = =/0 = 0 AIA ‘ i sa power gain = Pe = ACR = 10K 37 UNC) _ Jog | tn iT Ri (1xe5 DCIKIO3) ny Ex 2 Design an inverbin ompslidh'er having Again of (10) — and & bandwidth of 100 KHz- : (Sol The-ampliher ect is shown th Fy below 1 anne me ae Re | vin Ri i det Rp = 10 Kae R, {| => RR, = | KL Vin, er Ne | snee Bwe gfe = 1 £ £ 1 ae ince W= 2Te = -e “t => fi =1 Ma Figtizy * That means we need an o—amp of 1MHzA | 2 aa Si ummiag Ampli fier TI Tie suraming omplifrers. are special cases of inverting | and nen imerting op-ompA amplifiers Thx ofp of such | omplidrers is the weighted algebraic sum of multi-inputs . Tlare are kwe configurations for summing amplidrer 2 inverting and noninverting condi guration , 2-1 Tnverting Condigurabion go | a so = % | | Fi139 shows three een fe Inputs inverting suimming Naa (adding) sircuit . The fp — Vye—R Vo Welbage far such circurt | ‘ean be exprssea As sl \ \ Re a } \ TR move tmputs or used , tay add additional componeats be the output - Since tu output is c« weighted sum of the inputs 5 this circuit is theredire called ~ sealing” o- bi («Weighted amplifier Y. Tf 8, = Rr =Rs =R 5 the oulpab we be Vo =-SE (V, + V2 + Vs) 5 hence the circuit is called | a © Summing amplifver And If RE= 1 where(n)is the umber of inputs (fr circuk of By U3) n=2). Consagupatly, | Vo mene Vt VAAV _ Suchioti-cittt dts refered tn az aq | & neous ee ath | averaging Circuit”. | (2 ;The weighted summer_has te constraint that al) the. summing cocfic‘ents aye of Ya some sign» Tha need occasionally arises fr summing signals with opposite Signs.Such a ! function can be Jmplemented using tws ep-amp as shown in Fig) « | Ra Re | v F | Va Ve | Fig 4) ; I R Rey, (BWA | Vee) — CB) —(Bv4] Oe ee | i Ex tx For he circuit shown in Fig (15) Lakerming the | — galues__j, ba, A fa -Vo-w > tregp n VaHa | gains Ye and & = Assume V; =A Volt s Vas" 1 Volt. i kp joke iS Sel —— = = S422 cod Kh ike i, . Va-Va _ 2=O ne I Aas Gs SS soem \| tps ky +-la = 0.6 wA - | Fracis) | 4o Ve = = (2244 Lv) = - © Volt 3 | os \|Ex: Tas an pouch op-amp circuit to dorm. the Weighted sum Ve = —(V4+5 V2)- Choose the values for R, 5 R24 and Rp ss that for a maximum output Vol of 10oV the currentin the Redback resistor will not exceed 1mA. | Sol | | Vom — (Rev, 4 RF v, J om ~ (H+ Sv) I Ry = Naava phan A te Figea— [oot Rp | = | In ord be not exceed {mA in te fudback branch, when Ves lov => Rp aio KR Taig sf, necessary to cheose Ry 210k Ria 2 Kn \) Ex Designa weighted summur that provides |— Ve = 2V-+ Ve — 4 V3 1 i Ra Re Ra Re Vox Fe Rey, +B Rv. — Rey rs TT RR = Be Re Ry =H RU) 2, Vilas Roma wip ce asd Rise Seah oan Ray 4 Rav, Ye vy | Ft sehen ee ce ee Frg at) Roz lokn i12.2! Noninverting Configuration 2x The noinverting configuration of the sunming amplifier is shown in Fig (18) « Again, to verify the Function of the dircity the expression far te output voltage must be obtained. Recall that the input wsiskanca of te op-amp is very large. Wierefore , using the superposition -theorm , the Voltage Vy is | | | Woven RA Ray, Rey, Vy +Va V3 A | Mi Reha * RRR + Ree? = : Henee the oubput voltage is (14 2) va = (+ R, Re The circuit can be used efthar as a summing or “averaging omplifrer aes Ne through selection of Vee ry appropriate values Ms a Fig (12) Noninverting (of resistars > name ly summer R, and Re Exes Design a nonimer ting summer circuit &e achieve (— t_ summing functian rr twe analog signals fi)=5Sinariet and Kita uit) . Drew the eutput waveform.3. Splatt iat ha (Diference Ten “r) +n. i! A basic differential amplifier can be used asa subtrabor circuit as shown in Fi'y (19) - Ri Re +a civcult has two inputs y, ly and Va 5 we will, Deredores Use the superposition Ve: Pinay stitambe stanseckableh 2° t the relation. ship between inputs Hi cand eutput . au Fig) DWhen Varo => te circuit Swotracter cok “beeoms an inverting amplifier | peace t I Vora xe pg PD @ When Vso then Vip ee a ee ee A x eee (29) but. the circuit. (when V2.6) is evnoninverting amplidrer vara RE as 1 | Vor = (I+ g) Vi _—— = (30) + Theretore nae | ae # GRE aOR Vasa: Ot ae Vas =v. (3) 1 Bf Vow ee RP ya Ys) ale (32) differential gain 3s Ne = RR = Ad Wa-K) Ri a)|For the difference amplifier shown in Fig (20) the oli ferential inpul resistines ts Rive eS a dd | + | ware kd= sx =ty 5 and Vin = be R + igh = 2igR | Rue eee Note that the dnput resistance of this amplifrer is low. cand depends eon MR value. This is a drawback of the circuit + Another drawback is that it is not easy te Vary the differential guin of the amplidier « These two preblems make the difference. amplifrer useless for use in Hw electronic instruments where the input signals (usually | are reading of bransclucers) are very low-level sfgnals. a Jow ae rsistana problem of this ampiifur can be | solved by buffering the two input terminals using voltage | followers - Hens & superior circuit 7s achie known i as © instrumentation amplifier) (see Fig (21)).Since Sometimg we use followers with gain (i.e noninverting Figen I insbrumentation ana Val Mar Eat ha RE | Ve= $f (vs -vi) CSSD), | amplifiers) rather than the two unity gain Pellowers to achieve some more Voltage gain+ I | | Exee Consider a simple subtracty circuit having Ri = 2k and Rp= 200k2~ Find the value of th difheverrtial gain ant input and cutput res/stonces . RE _ zoey _ Ada ZSs¥ = 100 Rea DR = 4 kw Ro = @ aLee The Integrator év A circuit in which the. gitput ustiog is the inkggral of the input voltage is ta integrator? . Sucha circuit, is ebtuined by using a basic inverting omplids Be Poswelern IP te Sescloack resister Rp is replaced by a capacitor as shown in Fig(22) » = | ie ey : } ae e Tha capacitive impedances i a" be expressed as + — “We integrator ect fs = oll | Xe= ec ae Bethan of sot, Thishe Vine See) => Vey Xe ed re Ri Xe Vine = Ry SR ry Observe that if the input signal Frequuncy is a bo Bere 4 tHe capacitor will behave as an open circuits and thus the integraby i's operating as open loop amplifier will infinite gain. The de problem can be “alleviated by comecting a resister Rp acress theaA capasitar C5 a8 shown in Fig (23). Such a resister | provides apeth fr de sow Frequency signab chrough which thay can Plows and hence the low- diequency “gain evil be Limited . Te transtkey fanction of this cir-curt beoomes ¢ * Er = Bi. a RHR (23) i Vig (59 I+ S Re ic Fig (23) Practical inkginier or eee (38) 14+ foRC | | Te Fellowin frequency t \ Pn ee ei te ates) REC 2r RC , | is assumed asa corner frequency above which Be circuit will perfarm as an integrator - | Asa summary > Ar te circuit shown in Fig (as), REE Vin Ct) Vice) “(he tt # Vote) = —10 (b= eo) a + Tt is clear that the addition he of Ry will keep Be output Voltage Pom reaching tu saturation bevel K * chem te input isadc Signal . — Fry (29) Ext. Find and sketch Ux output waveform of te integrate act shown below if 2 4) Vin = 5 Sin 20k Lae b) Vin =5 Sin arr 1k a i ae 1 tne | 2 |= — — = Sol Sina the inputs ae signal tan it is neecssary — te chk Ele corer Gequincy ~ 1 1 90 zs 2T KC 27 (2000)( 15%) 2 || eu)._Lin ts dese than P thureLore Ue ries will eperat as an inverting mpl BUH with aaa gain | eV, fe) TK, tel a See ie Vino ve joy t | lov is Figesi), (@) Pin = 1000_shich-is greater than de Uaseidove \ the cet will epurite as an integva tu tt t Vote) = 2%aA 5. Te Differentiator ta Fig(33) shows the differentiator circuit . As its name implies, (t perkrms th mathematical operation of differentintion 3 that is, the output wavhrm is the derivative of Gu input waveborm. the differentiator may be constructed fiom a basic inverting amplifrer id the input resisbr R, ts replaced by « capacitor - | Xe se tel Re Yar Ve sc = Fig(s3) Fras Ve) 2 — SRE = TF, Basic differentiator or Vac = — S RpC VCs) | “a i In time clemain c AU) | ca) dé I I Mie transfur function of the circurt can be writken ds z WV ‘ Hijws = veal = —jw Rf sajw eend— ftsinufa aa Rp C2. 042) 2526 ae = Fig (34) shows the magnitude of the transbe.- function tn dB as a function A Frequency " + Iagol (d= avieg¥ ) The Faquency response of the differentiate canbe thought of *°P > > as that of a highpass Filter with ae Prequency att redfice Hz below which aie - there is nearly no output . Ree Ree RS Figs) | On te other hand, fr very high frequencies 5 the gain will go te infinity, and in ore to reduce the guin od this circuit at high Fequencits , a small resistor is added in series with the capacitor as iMastrated in Fig(35). I pia tiren sfc sPanction of a this circuit is | Ve EV, Pe Vint) or elim) Fig (35) Vintiw? _ J | Fe following frequency | eae eet is assumed t be a corner Frequency below thich the cireurt wil perBrm as a differentiator Practical differentiatorree ees - 1s As a summi 4° Br ta circuit shown in vig (35)2 = Ree atest Fhe fn \ Fe — BE Vint) i f,> f Vet) = ——- (46) | i | Note: The Frequuncy response of Hu oli Rrentiatnr 9 with repect te all Hequencies is given in Fig er, wate ‘ Ree kek ” amplifier differen— tiator Ex 2 @) Design a differentiator to differatiat. an input ——— signal that Varies in Aequency Bom 1 KHe te mn te 20 KH. (b) If a sine wave oft V)peak at 10KHz fs al bo the differentiate of part (a), draw i: eutput waveform . H (c) If a sine wave of(1V) peak at 100 kHz is applied now, draw Us nw eutput waveform, ct Yo d | Solis la). age ae 1000 4 | let Cacti Mf = Rpa=bb ka la) i | 2% —_—/ 2T RC icHene Rk, = 4 = 80-2 27 (20000)(16*) Wa complete circuit is shown in Fig (3) Re Ve Fiqis#) (b) Vin = 0-1 Vpeak and f= 10KAe which is in the differentiation frequency renge . Thus Volt? 2 — RC Vat where Viqlt) = O1Sin 2zrid' k Tredire Vol) = (6x18) (8.1418) (28 10 Gs)Cos aT Me) —1)-Cos_2mis"2 Vin Vin = 0-1 Vpewk and Aan = 100 Sette ulhels tosis thea Ih amplidicatran Pequency range . Thus Sa : { Ne! + } Void = = Re (ce) Vintt) =—-2 Sin aw ote 7A —— =f 6. Cuncent toe VolLage Converter 2 4 | One of the mest common uses f Yu current — pe —vellags converter is in sensing ov measuring current: from platadeisrioa: or any oth sense in on electronic circurt . The circuit in. | I Fig (38) shows an Cp-amp Used as a current—to — Voltage converter. | Sina Va = tee and te Qe Neceenliecirent Ls Science theagh the fudback resister Rg. Thus Eoin Nee a Fig(32) ! Z Z Current — bo Woltaye convertor er hig Pipi, ns as, | | | Mat means » the cireuit of Fy (38) converts the input | current info a Proportional output Veltage « H Tee current. to— Voltage converter makes_an excellent an oe ee 4 current measuring instrument since it is an ammeter with Zere voltage acress te mete. F. Voltage —to— Current Converter ox ———— | | Sometimes ik is chsirable tm produce a /oad currant. Uwt Us preportional t0 an applred input voltage 5 but independent ef the load character. This i's required 5 for example , wha - we drive the caflection coils of the cathode vay tube (CRT). ay a | | ee | el ee ee{| | | A = ae a at Fig (39) shows a voltage te —current converter in which the foc /'s Floating Chas nerGu- side grounded). Per this cirewlt Ve= Vy | eunel Bua current in Zy, is --—- (42) That means» the cirewt of x Firg (39) converts Hu source dL. Veltaga Inte « preportional Fig (33) Voltage te cunent current appears across the convertey with Floating tenet Joad . Note that Ly is indepenchnt | of Yu lead Bz -On the other hand» & very Wiele current brom | the seurce is required ole to the very high input resistance Lek Bu opamp. (TP te load is grounded + a civcurt of Fig(40) can be useal« Rr this circutt dye dy de * fia et Vw Rin= Vin+Vo -2Vi eae ViatVe — Rie | ae But we havea noninverting 1 eumplidrey to the Vy and 7 i | Vo. se = Fig (AO) V/E conver lg Re emer ith grounded. load (ob Ve = Vin to — Rie * > [ir = Va | ___ (49) ae Peres ee ee| 8. Fischenia Tha. Op—amp Analog Computation ¢ o i's the Fandamental building block in an electronic analog computer. As an illustration, let us consider pow to simulate the differential equation fy Sees + ate dure) ere f as + FY, =2x ~ ~———— (60) S (t) . Ta precedurt is carried out as in te Following 2 Si —sidtisy + 2x ot? This equation can be simulukdas tn Fiq(4\-a) » Fig (lb) shew xe —>—_ s the detailed explanation of the circuit | | d* li => ra Tes =e yee)pa + Exes Reems Bea saath rade ides nici function ja Ba analog computer simulation . as pS cp ee oe? s+) Gs+2) Sol Let mothod — Hema Veo? Ker S74 28+2 Ss 425s) p2¥e = x05) So +29 +240 = xc) ce YW = — Zh) 2 yt) + x) ) a p Ke to Sut? pte) ae Figth2) Sa ands Pecbhicdlct —Aics med I is oman Cs#0Gs#2) SHI S42 Th. transber Sanction can be implement as in block diagram of Fig (43) below 4] | xs) ie Gees | re Fig (43)xe) xe yee) Fig ed Paral form, yce) Fig (4S) Cascade dorm Fig(43) can be transferd bs tine domain rpresenbation as show/ in Eg C44)» 33Be Exsy Find the equivelont curalog computer Simulation of the fiilowing network. Ke) wnFour A Oscillators and Waveform ze a Gbneatnnge 2s | Ad Tah oncbieh ois 22 a } - oh A (Most electronic equipment 5 stmt male alt | requires.cne or more. Periodic waveforms to perform. ih various functions... Such waveforms canbe sinusoids, | A square or pulse waves 4 -Erianqular waves and othr | Forms - Consequently , it is_necessary to. generate these), various woreferms.using eppropriat. elictrenlé comporents. Tia classical term Rrra circuit used te. generate |. eo waredarm ts the C Oscillator) + dere recent terms includa“Punckion generabor Dane © waveform generator, | Other hermsare alse used —in eran Cases suchas r | © Multivibrate 2. apes 1 eee Within the chapter, we consicler beth Seated Peisintenigaletveilat +. Sinaadidal oxi Meeyas telades lt camel te Wien bridge oscillator andl the “phiise shift 1 oscitlater. Among the nonsinuscidel exciletars we || discuss are multivibraker 5 square wave and éringulel Be ware generndar— .. We alse_previcle_an- inter duction ee to the S55.IC timer and 3038 IC wanform generittors Which produces several warbrm simultaneously. Al assleap cf _an_amplifpe- was positive , then the circuit became unstables that is, jt asctllated ~Undu-—this || ____ In_this_ section, we will look at te inate of the | Sine wave_escillation. It iz known thot jf Dua Redback Condition the clsed loop pales were drawn inte the right, cutput. This jdee iste basts.of sinusoidal_oscrllater— | ciccusts = stone Thies Bi aoe csinseidal osetllaberjs shown, -half—plane anda excitation wos needed te peduce an — || — _jn the block eliagram of Fig (4met). Dé fs clear that the Japat voltage is 22a (Vin 0)» Besides that, the feedbick — ARE Sirosside Oscillators 2x eee Se hfs peste < “ ae ag ibd i —- = -— = Gea of Aarne h ze LA | ale PATS ae = sass is - ao ig (41) rosliysise lea erm es = Wie chsed loop gain i's i 228 A = $s és (4.1) 1-BA i ~~WT Retwmn to Fig (Het) 2s | Va bv & 4 | and — et macpllinO ta? 5 i a gg lal tn Set RS a a ee at “ on ae ARe= 1 cer Agwe)-B (jue) = 1 (4.4) || [fleet AB ty_the Ino Hata ne Expressed in polar form — oe oltapi es pl ~ ree pf sie a CA oie il = | Thetis is psgeedesltly she Phase of the icepiap guinis be be Bere and the magnitude ob the loop gain should be i Lunity.. This is known as © Barkhausencriterion.”s lhick states the requirements for oscillation . Ror instance 51£ the amplifier causes a phase shift of — (180°), the Penelbaick ciy-cuit must provide an adblitional || Phase shift of (180°) so that tu total phase shift | aveund he loop ts Berm. —Based_on the-tpe of components used in Ba oscil circuits 5 they are divided inte. three types? RC, LC 5 and- Crystal escillater. Crystal escijjatecs_are |) Fur more stable than RC and LC escillaberss pecially vet Ingher Axquoncies- LC circuses and crystals ore generally used dor the genevation of high frequency ie = while RC civeusts cur most suitable y-low Srequeny application Sass -3-|| below 1MHz or so. ee i shown in Fig (4—~2)~ The inverting amplifier introduces 0 (1g0°) phase shift 4 which means that each RC network | Here we discuss RC oscilakees only - 42 Phase Shift Oscillator zx Hees eS Phase ahife escillater js _omong the most — widely used for generation.of sinuseids in the Frequency ma The classical form of eee chi s talons must. previde (60°) of phase shift to _preduce tHe — |. (180°) required of tha Frequency. ~ sensitive feedback — |. _ netwerk inorder to. ee feedback |, Lees Amplifier soot Set a ay, Pim = oat in Saa al c rt — Fig (4-2) A_plase—| Hanno aaa) ook shift oscillatorcep sie Nt Sue C Pic SRC ) ws a, : H TS Wades loltaga analysis cant applica! ta ahebecmine tha fon re TS aeeg, the condition of oscillation given by the | Barkhausen criterion (AB = 4 $j O) othe Imaginary — (B) transfer function . The result is Nis it in ee SO I 6 w*R c+ fj (5 wre-wRic®), \| Ra _Joop gain ts ; is ae (-6u PRC") + ] (EF WRE ~ es part of equation (4-7) must equal Zere. Since the | sumerator js purely imaginar 2 te denominator must. become “purely. daagina cy pale ssa at eee ef which yields —_ o. : aan Sl a d ano Desig b48) Vvé RC equation (4.7%) becomes ca AL 29 (i > SS (43) i ee is the ee ce “this + den ES eed St—t |) Ex_2 Design a phace—shift escilletor to_precluce— “Fig (3) shews ak Practical phase shift. oscilaber Using back-to-back Zeners connected at the output Heeecming | 9 5 “ ees Sl Tha desired output ampittyele can be basically stabil | onteulitg (4-3 A Practical i de soD ers tilled —__ esilations at 1 Khe, with amplitucle limited by 13-8Vpp #3 : Sols — aah L - Tre olesived circutt is shown in Pig (4-3). Let C= c-.o1 MF» the valuecd RQ can be __claber mined in terms of fo -and-C as fellows — i | 206 ( 107) ( 0- > ee = 2 Rp—=29-R—= 122.4 me ss Tre . ae OAc i Te inayat requirement fs. Se LGR eA RE i” _ er a et ne ee eateries A= 3 |— oe 14) Pin -inplamiition a Winniettly ys esuillabore using shown in ner Abs) acts BS _ noninverting —op—amp. ae gain Assis aA_ practical form. of typical Wien bridge oscillator | using amplréude stabilizing method is shown tn Fig (pn6) This, stabilizing ebmunt isan Nx channel JEET ~The | cliecle ond Hua Rs Cs circuit are represents a negative | peak chtector-. Ta resulting de Volkage at the gate | of the trnsistay- starts te become more negative han the amplitude of the oscillation starts to increase — | Aa result 5 te FET Is biased further into the negatiin | gate region, ond tks effective sistance fem drain Eo source increases. Thus 5 dhe omplidi gaints decreaseel Land Hs amplitude ts brought back boa stable tevel. If tHe output peak starts te decrease , the opposite Ye pattern caurs . tee ll, pda Salis lied chil ce vary Uy Frequincy of oscillarbion - Me aviation of resistace value can be achieved by a Pstentiometese. Fig (4-6) A practical firm of Wien bridge oscillatoris Aerie Ble Wien bridge oscillate eto Be designed to produce ancoutput sinusoid that an be adjusted from looHz te 1KHa —. Determina a sutbable. ee aa Sel 8a ie aoe cirecutb—is- shana Readies: but _ivith replacing R_by pobtntiometer.| 1 fanaa ste diet — = acl f gad ts a Neagle Proper. tn tk a ea i : = are Beg Sele = Js HE one ceo sak S Sais nea 1 $c. pa iee Value of Ls alana: Sia et BA Rand vice versa. 5 Sane ae pe mG ae Fe a 2 a7 (on(ei or xe) —— Rnax = : AB AIT Ko 2m (10% De 01 x1o~4) Thus 5 the resistanea must be adjustable Pee. ed || be 1595 KO E Se = — oes hs aa otha. See4.3 Nonsinusotdal Oscillators Nensinusoidal oscillater 2xrm include = shisicieiinies Briangular— war, pulse or clock generator. In genwal,square5 pulse and chek generators are, known ase’ Multivibrators » or dining circuits), Thay are_very important in saa -applications eespcealt computers and oligital electronic systems» _ | a me Sand Specs liputs ; Oscilla arcs lhasno—stable states .It_is therefore called an | || {i Ti Schmitt trigger can-be_used-in an. = Circuit te generate —osquare.wave output signal This. is accomplished by addiag an RC network ‘be the it negative feedback loop of the Schmitt brtggeras Ht shown in Fig (4—-F)- As we will see, this circuit - © Astable_multivibrator I. Fig(4—4) A square wave oscillatorFrom _the _comparaber cherachertetics = segs Weies fee aie. Mdees eo (445)}|— Ve apr, Wid oe Th differen tial input voltage Vi—is_gien by ee an instant of time wun Vid <0 Le< BN Fa capacitor new charges expenentially -tsward (Vz Eas though He RC Compnents The. cut putremains sonstahé lat Vz until Ve equals BVe > at which time the comparator | erathdtet-resteriiely arbixi ols: Vy 5 Meme Ve charges: toward (Wa) + Tp we let t=0 when Ve Ppa the ll First half-cycle. 5 We have (since Ve approaches Yo | exponentially swith «diet constant RE) pam sence Ve ft) Ve pea) pes ete] i be | Siha at t= 2D.) =+RV2—,we dnd sa £ ii . Ss e a 1 equation (4 SP)» PY by 7 -| Fa 2Re n( #8) ae a 4 z Ta frequney of oscillation jsf. a Fo - ban [he BRE || EXE Design a Schmitt trigger oscillator be — i supply is FASV . The peak te peak Voltage © the oscillated waveform is wanke do be F5V. Fx designd cet is > shown —in Fig (4-2 )5 ; Mo Fer this creuit aT gi = 0-001 = 2K. In (1-4 3) = A Finaly the —eeneys should be et pepe yee Ht 2 rT - Eriyger square —wave ascillator~ can be changed to |—__escillate at fy = 1 KH 2 ote dic. power | Let Rp a dlé Rie 16 be DR s10kn Sgt, == eh 2Rc. ls dete a ee as haps coy tn spgpscsdggl te Sek triangular by replacing the RCO cient with an Hintegratare . The _indegratorconvucts the square ware Linea triangular. The resulting circuit ts shown in File ) |) -18-Wie transition veltages Vee = Mee dor tha. comparater ce =. Vp ete FVyy whichsalso represents. —_—5| — the peak 4 peak triangle level, ie Is givtnby " Refering bm Fig (4—10) < sieges oO pollo Sanam Vee) =a [CMae = a seis ivade teri Madlte)sies vet tesco ES laAta3 (420) ylelds Zaks peda d C — bio) ane lube Bagtian in Saphks Using op-amps with eee I3V_5 -cictipel a civeuse dn generut a 1_KkHa Ertangulem _weive with a peak=te— peak output Voltage of (&Y) — Ta circuit of Fy ldeatasceadinea=t ae oes fe ee = 81.25. “kB Sanst | | Sine ware, a square wave and a triangular ware . 4.3.3 Tez 8038 Waveform Generator gx |) Linear integrated circuit technolegy has developed. to the point where complete function generaterss hav a Variety of warforms art available on a single ch One particular function generator chip» namely 5 || the 8038 4 isan example of these irrkegrubed. circuits. | One comection dor the 8038 function generator is || | Fac this ciceuit , fethe case of aRy= fea] es of nner bier shown in Fry lit). TE Simultaneously preducesa | —— + Mee —1é——(ts a function cf_an_external Vokbage + Ansystem ee ll jebtatning « square or triangular waveform generator [ ya Voltage Cosa alleak Oscillator ( vco) gu U A Ko (er voltage zo Frequency converter V/e) | produces an output signal_whoce instantaneous Frequency | whose frequency olepends linearly onan Input voltage (Vin) | is shown Jn Fig (4-l2) ~ Tx CMOS inverter formed by, Q1-and Q2 acts_as. a.doubke throw switch. Te | buffer stage isa voltage follower which drives the J integrator Prema low impedance .| Veat— exceeds Vip + Then > switch Qy is OF andl @2ts-0N.. |The inpaut Vy bo the integrator ts Vin. Hence Volt) Asssums thet the Schmitt trigger output is Y= Veat > where. increase _Irnsew-ly Wes ae &) until Vo reaches the arate uper threshold Jevel (Vr =2V,)-01- Rize. | s Ri +Rp = | Tin tH eemparater cha: ate to V,= vas depicted in Fg (4-13) Now Qi is ON and Q2 is OFF, Land Vx becomes —+Vin s-resulting in a linea negativ wang (Vo = =Vin &) until the negative threshold (Vr). Clearly , the twe half cycles are identical and Vs = = - tte? ae Ri + Rp Rig) jets. de St —— (24)Thus = RARE Vin | 4RER, Vsat Equation (4:24b) clearly. indicating thot this VCO | | Frequency vardes linearly with £h. input. voltage. There are several inbegrated circuits (ICs) which Lperfarm VCO eperation suchas NE 566. T | saeco hohe } [Argued nahi cies .s 5 ates 2 | — Mulkivibrators ar defined as Square pulse — i \ generators that are used extensively in systems for ] | T _timing applications . In. general , ther. cre three eypes | Pe pgn lS pm gw as a Bistable_(or-flp-flop)-=- Bao \ Tt has two stable states _and_will_rematn ineithe- stale _yntil a preper trigger ts received. While it EA is possible to implementa bis able multivibrator a with OP—amps, there _is very Itetle reason to. | emphasize such an approach > since cligital flip-flop = circuits are superior and_are readily avarlable. i[2 Monostabs ic. (aE one— shot) S Lin tha stable stake until « trigger pulse is | received . The circuit then changes states Sor || 4.3.6. The 555 Timer ea —a-specified_periad, but then jt _reLurns te the | original stable state. Beth cligital and lineal =. mondstable IC chips —areavailable suchas F421 | alles cand 555. chip - Ig Astable (or free — running ) oF Ft has one stable state. Wie circuit will remain It has no stable state ‘andl its conditions + —4Vsat— and Meat. Widely. used astable multivib: — ts designed. er see TCT || Thi_use_of the S55 chip as a monostable and _ |Lastable multivibrator will be. discussed in the following section. — eS at ____escf/late between two jewels (suchas the square—|)___ ware oscillator in which the output Potcot é a igh spate eatis Pi te ag Te SSS timer js one of the most important _ linear. integrated. circuits . Tt ig-a general. purpose IC, _ that can be used Ser timing 4 clock 5 er pulse_generation| source er sink output currents up te 200mA. | {Ta -basiewbleck diagram of the S55 Ic is shown | In Fig (4 —Wer). aise | Fig (414) Block diagram cf the SBS timer chip The output oP bh circuit san_assume of two possibie levels The high” Jevel_ is (Vee)->-and Clow? 1 The 55S _cop_npmpalte lethunsbabde) apsderubcsabia ll —|| modes, with Liming pulses ranging From microseconds. | be hours Tt alse—has_an adjustable duty sysle,and can) |A Astoble eae of 555 Timer: * oan ee The baste circuit for astable (free running) operation of te 555 time- js shown in Fig (4-15). Tie timing leneeuit consists of Ra,Ras and C.. Te waveform foi. the output voltage Volt) is shown in Fig l4-16).— ere using S55 timer 555 astable circuit ~22— ai ae I i cnuco tea Gib eC | hae expressions fort He abil and _— seh + Duty cycle less thar SOM, can be ebtained by connecting an inverter at he ee output of the SSS. circuit ~ son a ) A fifty percent duby cycle or (Th = tr) can be achieved with different methods ~ One relatively. simple { Leoncepé i's Hlustrated tn Fig (41%) . Far this circuit, (ducing. the Intervalof high” state > the oicdewill be Porward biased > anol (Tn = 0.693 RaC.) . When the discharge ‘diode zurns OFF 5 then the “Jow state period will-bex | | re = 0.693 Rgf) - Thus, i? Ra were equal to Re , the ce Lwo time conshant would be the some tf the diode were — | fdeal and the circuit will be square wave oscillators | with Th =Th- [—aa—al oe ss ie evn cutdh gi Scie os a reais piste ti ad to a ta —Design_an_astable 5S5_ timer cicutk. such that, tha Frequency is 5OKHe ond the oluty cycle is || SS FS percent. a a ee shown Wn Fig 4A) Fr beak 693 ( Rat+2RedC 0. 93 (50X10) 1 cae Wehave D = 0.35 RA+RB ee Se | Ra+2Re 42d soncoiltihgassen RII ‘ Combining eptins (44.26)-and (ee. Diaiieagsil tli = 24— Ses 22 ese. sail. Ren Fe ke |_ A monosiable multivibrator 5 alse called «one-shot, > is a pulse Generating circuit thak gives a single | Pulse -at the output of a deésired duration whenever Bu input js triggered. with a negative —going pulse a h Cagative trigger) or positave — going pulse (positave | pulse) . “ = 1 The basic circut for monestable operation of ah S55 time Js shown in Fig (418) while the inpubfoutpat “waveforms are_shown in Fig (4-—19)_. Tha timing circuit. | eee of Raand Cc. He . | Veena aa 1 Pa = Tre Vo Py io Vo) 1 See eer eit EE | SERS zt 3 4 = | Fig (4-18) Monostable _ Figl4-I9) Waveforms in 555 | multivibrater using 555 IC. monostable Diseneke time signal > ih is alsa kaowa as Sampled — data signal which has discrete |_A- eee ae ee essentially ac S/H circuits coure_used_with ADC to holo! the input —_| andieg memory civcurt in which. veltage or point of an| : cunaley_sigaal i temporarily stored_on d_capacitor.___|_ | signal constané daring bhe _conversion period, with UDAC_ in_erdlye_t0_remove bhe transient _noise.,—and a any other applic ations for signal reconstruction | clesired, the switch is_closed fora short pericd_and. pacitor vapidly charges tothe same volbage—as—the pens—and the capaci ter “helds” or “freezes” __ We _basic_ form of the S/H siccurt is _illust. in Fig (5-3). Whan_a sample of the input signal is — input. Wan the sumple command js removed -»the switch a the sigual_lerel_ sampled —see Fig ( 54) « This- js also known as sample —and— quantization . so