III ECE - MPMC– UNIT (4)

UNIT-4
8051 MICROCONTROLLER

4.1. Microprocessors Vs Microcontrollers

4.2. Intel 8051 Microcontroller – Features & Architecture
4.3. Memory organization of 8051 µC
(a) Internal Memory - Internal RAM and SFRs
(b) Interfacing with External memory
4.4. Addressing modes of 8051
4.5. Instruction set of 8051

4.6. Timers/Counters of 8051

4.7. Interrupts of 8051
4.8. Serial port of 8051

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4.1. MICROPROCESSORS & MICROCONTROLLERS

Microprocessors Microcontrollers

Microprocessor is a digital computer CPU that Microcontroller is a true computer on the

fetches the instructions from memory and chip, used to control the operation of a
executes them. machine using fixed program.

Microprocessors are used for general purpose Microcontrollers are used for some specific
applications. control applications.

Microprocessor contains ALU, Registers and Microcontroller contains all the features of
Timing control units. Microprocessor and as well as internal RAM,
ROM, I/O ports, Serial port, Interrupt
control, Timers/Counters….etc.

To make a computer, Microprocessor requires

additional devices such as Memory, I/O ports, Microcontroller can function as a computer
Timers, CLK generator..etc. with the addition of no external devices.

Microprocessor is concerned with rapid Microcontroller is concerned with rapid

movement of data & code from external movement of data and code within the Chip.
memory to CPU

Microprocessor will have one (or) two types of Microcontroller has many bit-handling-
bit-handling-instructions. instructions.

Ex: Intel 8086, 80386, Pentium Ex: 8051, 80196, MSP430

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4.2. INTEL 8051 MICRO CONTROLLER:

Architectural Features of 8051:

1. Intel 8051 is a 8-bit microcontroller  It has 8-bit ALU

2. Internal Clock generator with CLK frequency 11.0592 MHz
3. Internal ROM (Program Memory) : 4 K bytes
4. Internal RAM (Data memory) : 128 bytes : 00 H to 7F H

5. Four 8-bit parallel I/O ports :

The 8051 has Four 8-bit I/O ports used for sending and receiving data from external
devices. The alternate function of each port is given below:

PORT-0 : It acts as a 8-bit I/O port when ̅̅̅̅

𝐄𝐀 = 1
̅̅̅̅ =0
It acts as external Address/Data bus (AD0 – AD7) when 𝐄𝐀

PORT-1 : It acts as a 8-bit I/O port & this port has no alternate function

PORT-2 : ̅̅̅̅ = 1
It acts as a 8-bit I/O port when 𝐄𝐀
It acts as external Address bus (A8 – A15) when ̅̅̅̅
𝐄𝐀 = 0

PORT-3 : It acts as a 8-bit I/O port.

Each pin of PORT-3 has some alternate function

Pin Function Description

P3.0 RxD Serial data input
P3.1 TxD Serial data output
P3.2 INT0 External interrupt-0
P3.3 INT1 External interrupt-1
P3.4 T0 External input to Counter-0
P3.5 T1 External input to Counter-1
P3.6 ̅̅̅̅̅
WR External RAM write pulse
P3.7 ̅̅̅̅
RD External RAM read pulse

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6. Two 16-bit Timers/Counters

Timer  Counts the no. of internal machine cycles

Counter  Counts the no. of external pulses applied at pins T0 & T1 .

The Timer/Counter action is controlled by TWO control registers

TCON : Timer Control register
TMOD : Timer Mode control register

7. Interrupt Control :

These 5-interrupts are controlled by TWO control registers

IE : Interrupt Enable register
IP : Interrupt Priority register

8. Serial data port :

The 8051 has internal serial data port which uses SBUF register to hold the serial
data to be transmitted (or) received data.
SBUF is a full duplex serial data buffer register – Tx buffer & Rx buffer.

Serial data communication is controlled by TWO control registers

SCON : Serial port Control register
PCON : Power Control register

9. Timing & Control unit

̅̅̅̅
𝐄𝐀 (External Access) : This signal is used to access the external memory
If ̅̅̅̅
𝐄𝐀 = 0 then, PORT-0 emits AD0 – AD7 & PORT-2 emits A8 – A15

ALE (Address Latch Enable) : This signal is used to enable the address latches for
the de-multiplexing of Address/Data lines.

̅̅̅̅̅̅̅̅ (Program Strobe Enable) : It is used to read the code from external ROM
𝐏𝐒𝐄𝐍

RESET : This signal is used to reset the microcontroller . After Reset, PC is initialized
to ZERO and µc starts execution from location 0000H of internal ROM.

XTAL0 & XTAL1 : These two pins are provided for connecting the crystal oscillator

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 General purpose registers are 8-bit registers used to hold the 8-bit data
 DPTR (Data pointer) is a 16-bit register used to hold the address of external RAM
and ROM. It is divided into two 8-bit registers named as DPH and DPL
 PC (Program Counter) is a 16-bit register used to hold the address of next instruction
to be fetched from ROM
 SP (Stack Pointer) is used to hold the address of stack top.
 PSW (Program Status Word) is a flag register which hold the status flags

PSW (Program Status Word) / FLAG register of 8051

11. Special Function Registers (SFR) : 80 H to FF H

The 8051 provides 128 bytes of memory for Special Function Registers (SFRs).
The SFRs are used to perform the specific functions and are used to control timers,
counters, serial I/O, port I/O, and peripherals

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4.3. MEMORY ORGANIZATION OF 8051 :

 The 8051 microcontroller has separate Data memory (RAM) & Program Memory (ROM)
 The RAM is used to store temporary data and keeping intermediate results /variables.
 The ROM is used to store the permanent program being executed.

Internal Memory:
(a) 128-bytes of RAM (Data memory) : 00 H to 7F H
(b) 128-bytes of SFR memory (Special Function Registers) : 80 H to FF H
(c) 4 K bytes of internal ROM (Program memory) : 0000 H to 0FFF H

External Memory:
 If the memory built in the microcontroller is not sufficient, then it is possible to add
external memory with capacity of 64Kbytes.
 In this case, PORT-0 & PORT-2 are used for their addressing and data transmission.
 External memory is connected when ̅̅̅̅ 𝐄𝐀 = 0
̅̅̅̅
 If 𝐄𝐀 = 0, PORT-0 emits AD0-AD7 and PORT-2 emits A8-A15
 ̅̅̅̅̅̅̅̅
𝐏𝐒𝐄𝐍 (Program Strobe Enable) is used to access the external ROM
 𝐑𝐃̅̅̅̅ and 𝐖𝐑
̅̅̅̅̅ control signals are used to access the external RAM

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INTERNAL RAM

The 8051 has 128-bytes of internal RAM which is divided into 3-parts as shown in figure.
 32- bytes : Working registers (00 H to 1F H)
 16-bytes : Bit addressable area (20 H to 2F H)
 80-bytes : General purpose area (30 H to 3F H)

The first 32-bytes of internal RAM can be used as 32- working registers.
This area is divided into 4 – register banks : BANK-0 , BANK-1, BANK-2 & BANK-3
Each bank consists of 8- registers : R0 , R1 , R2 , R3 , R4 , R5 , R6 , R7
The Register Banks are selected by the bits RS1 & RS0 of PSW

RS1 RS0 Register Bank selected Address (H)

0 0 BANK-0 00 to 07
0 0 BANK-1 08 to 0F
0 0 BANK-2 10 to 17
0 0 BANK-3 18 to 1F

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SFR ( Special Function Registers) : 80 H to FF H

 The 8051 provides 128 bytes of memory for Special Function Registers (SFRs).
 The SFRs are used to perform the specific functions and are used to control timers,
counters, serial I/O, port I/O, and peripherals.

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EXTERNAL MEMORY INTERFACING

If the internal memory of microcontroller is not sufficient, then it is possible to add

two external memory chips of RAM and ROM with capacity of 64Kbytes each. In this case,
PORT-0 & PORT-2 are used for their addressing and data transmission.

Interfacing of External ROM

 The 8051 has internal ROM of 4 K bytes : 0000 H to 0FFF H

 After Reset, the program execution starts from 0000H
 ̅̅̅̅ = 1 then the code is fetched from
If the program address is less than 0FFF H and 𝐄𝐀
internal ROM. If the program address is greater than 0FFF H, the code will be
automatically fetched from external ROM.

 The external ROM can be accessed under two conditions :

(i) When ̅̅̅̅
𝐄𝐀 = 0
(ii) When PC > 0FFF H
 The PORT-0 emits AD0-AD7 & PORT-2 emits A8–A15 for accessing external memory.
 The ALE indicates the presence of valid address on multiplexed bus(AD0-AD7 )
 ̅̅̅̅̅ signal is used to read the code from external ROM
The 𝐏𝐒𝐄
 The DPTR register is used to store the address of external memory.
 The following instructions are used to read the code from external ROM

MOVC A, @DPTR : Move the code byte from external ROM location
pointed by DPTR to Accumulator.

MOVC A, @A+DPTR : Move the code byte from external ROM location
pointed by (A+DPTR) to Accumulator.

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Interfacing of External RAM

 The external RAM can be accessed when ̅̅̅̅

𝐄𝐀 = 0
 The PORT-0 emits AD0-AD7 & PORT-2 emits A8–A15 for accessing external memory.
 The ALE indicates the presence of valid address on multiplexed bus(AD0-AD7 )
 ̅̅̅̅ and 𝐖𝐑
The control signals 𝐑𝐃 ̅̅̅̅̅ are used to access the external RAM

 The DPTR register is used to store the address of external memory.

 The following instructions are used to read and write operations of external RAM

MOVX A,@DPTR ; Move the data from external RAM location pointed by DPTR
to Accumulator

MOVX @DPTR, A ; Move the content of A to the external RAM location

pointed by DPTR.

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4.4. ADDRESSING MODES OF 8051 :

The method of specifying data to be operated by an instruction is called as addressing mode.

The 8051 µC supports the following addressing modes:

1. Immediate addressing
2. Register addressing
3. Direct addressing
4. Indirect addressing
5. Implied / Implicit addressing
6. Indexed addressing
1. Immediate addressing:
The operand (or) data is available in the instruction itself.
Ex: MOV A, #25 H ; The immediate data 25 H is moved to register A
ADD A, # 36 H ; The immediate data 25 H is added to register A

2. Register addressing:
The data is available in any one of the general purpose registers.
Ex: MOV A, R0 ; The content of register R0 is copied to register A
ADD A, R0 ; The content of register R0 is added to register A

3. Direct addressing:
The address of the data is available in the instruction.
Ex: MOV A, 25H ; The content of internal RAM location 25 H is moved to A
ADD A, 36H ; The content of internal RAM location 36 H is added to A

4. Indirect addressing:
The address of the data is available in the register.
The symbol ‘@ ’ is used to indicated indirect addressing.
Ex: MOV A,@R0 ; The content of internal RAM location pointed by R0 is moved to A
MOVX A,@DPTR ; The content of external RAM pointed by DPTR is moved to A

5. Implicit addressing:
There are some instructions which operate on the content of Accumulator.
Such instructions do not require the address of operand.
This type of addressing is called as Implicit (or) Implied addressing.
Ex: DAA - Decimal Adjust Accumulator after addition

6. Indexed addressing:
The address of the operand is the sum of A & PC (or) sum of A & DPTR.
Ex: MOVC A, @A+PC
MOVC A, @A+DPTR ; Moves the code byte from external ROM location
pointed by (A+DPTR) to Accumulator.

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4.5. INSTRUCTION SET OF 8051 :

Instruction : An instruction is a command given to the processor to perform a specific
operation on specified data. Each instruction has 2- parts:

Opcode  the operation to be performed

Operand  the data to be operated

The 8051 instruction set can be classified as:

(1) Data transfer Instructions
(2) Arithmetic Instructions
(3) Logical Instructions
(4) Boolean variable operations / Bit manipulation instructions
(5) Machine control and Branch instructions

(1) Data transfer Instructions

(i) MOV <dest.>, <source> ; dest.  source

This instruction copies the data from Source to Destination.
Source  Immediate, Register, Direct, Indirect, Indexed
Destination  Register, Direct, Indirect

Ex: MOV A, #25H ; Copy immediate data #25H to Accumulator

MOV A, R0 ; Copy data from R0 to A
MOV A, 25H ; Copy data from internal RAM location 25H to A
MOV A, @R0 ; Copy data from internal RAM location pointed by R0 to A
MOVX A, @DPTR ; Copy data from External RAM pointed by DPTR
MOVC A, @A+DPTR ; Copy data from External ROM pointed by A+DPTR

(ii) Stack instructions

PUSH source ; Push the content of source on to the stack
POP dest ; Pop the content of stack to the destination

(ii) Exchange
This instruction swaps the content of A with specified operand
XCH A, R0 ; Exchange the contents of A with register R0

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(2) Arithmetic Instructions

(i) ADD A, <source> ; A  A + source

This instruction adds the source data to register A.
All flags are affected
Source  Immediate, Register, Direct, Indirect

Ex: ADD A, #25H ; Add immediate data #25H to Accumulator

ADD A, R0 ; Add the content of Register R0 to Accumulator
ADD A, 25H ; Add data from internal RAM location 25H to Accumulator
ADD A, @R0 ; Add data from internal RAM location pointed by R0 to A.

(ii) ADC A, <source> ; Add with Carry ; A  A + <source> + C

(iii) SBB A, <source> ; Subtract with borrow ; A  A - <source> - C

(iv) INC <dest.> ; Increment destination ; dest.  dest. + 1

(v) DEC <dest.> ; Decrement destination ; dest.  dest.- 1

(vi) MUL AB ; Multiply A & B ; B:A  A*B

Result is stored in B:A (16-bit result)

(vii) DIV AB ; Divide A by B ; A  A/B

Quotient is stored in A and Reminder is stored in B

(viii) DAA ; Decimal Adjust Accumulator after Addition

It is used in BCD addition.
It adds ‘6’ to lower nibble, if lower nibble > ‘9’ (or) Auxiliary Carry is 1
It adds ‘6’ to higher nibble, if higher nibble > ‘9’ (or) Carry is 1

(3) Logical Instructions

(i) ANL A, <source> ; A  A AND <source>

Performs the AND operation of source and Accumulator
All flags are affected
Source  Immediate, Register, Direct, Indirect

Ex: ANL A, #25H ; AND immediate data to A

ANL A, R0 ; AND register data to A
ADD A, 25H ; AND data from internal RAM location 25H to A
ADD A, @R0 ; AND data from internal RAM location pointed by R0 to A

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(ii) ORL A, <source> ; A  A OR <source>

Performs the OR operation of source and Accumulator

(iii) XRL A, <source> ; A  A XOR <source>

Performs the EX-OR operation of source and Accumulator

(iv) CPL A ; A  NOT A ; Compliment A

(v) CLR A ; A  0 ; Clear A
(vi) SWAP A ; Swap nibbles within A

Rotate Instructions

(4) Boolean operations / Bit manipulation Instructions

CLR C Clear carry flag ; C 0

CLR bit Clear direct bit ; bit  0
SET C Set carry flag ; C  1
SET bit Set direct bit ; bit  1
CPL C Complement carry flag ; C  NOT C
CPL bit Complement direct bit ; bit  NOT bit
ANL C, bit AND bit with C ; C  C AND bit
ANL C, /bit AND (NOT bit) with C ; C  C AND (NOT bit)
ORL C, bit OR bit with C ; C  C OR bit
ORL C, /bit OR (NOT bit) with C ; C  C OR (NOT bit)
MOV C, bit Move bit to C ; C  bit
MOV bit, C Move C to bit ; bit  C

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(5) Machine control and Branch Instructions

(i) ACALL addr11 ; Absolute subroutine call

PC is pushed on to the stack and loaded with address of ISR

(ii) LCALL addr16 ; Long subroutine call

PC is pushed on to the stack and loaded with address of ISR

(iii) RET ; Return from subroutine

(iv) RETI ; Return from Interrupt

(v) AJMP addr11 ; Absolute Jump (11-bit address)

(vi) LJMP addr16 ; Long Jump (16-bit address)
(vii) SJMP rel ; Short Jump (Relative address)
PC  PC + Signed displacement (8-bit)
(viii) JMP @A+DPTR ; Jump Indirect

(ix) NOP ; No operation

Conditional Execution

JZ rel ; Jump if A is Zero

JNZ rel ; Jump if A is Not Zero

JC rel ; Jump if C =1
JNC rel ; Jump if C= 0

JB bit, rel ; Jump if direct bit is Set

JNB bit, rel ; Jump if direct bit is Not set

CJNE A, direct, rel ; Compare and Jump if Not equal

CJNE A, #data, rel ; Compare and Jump if Not equal

DJNZ Rn, rel ; Decrement Register and Jump if Not zero

DJNZ direct, rel ; Decrement direct byte and Jump if Not zero

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4.6. TIMERS/COUNTERS OF 8051 :

 The 8051 micro controller has two 16-bit timers

 These registers can be operated as timers (or) counters.

Timer  Counts the no. of internal machine cycles
Counter  Counts the no. of external pulses applied at pins T0 & T1 .

The pin T0 supplies external pulses to Counter 0

The pin T1 supplies external pulses to Counter 1

 The Timer/Counter action is controlled by TWO control registers

TCON : Timer Control register
TMOD : Timer Mode control register

Gate  Controls the Run/Stop of the Timer

C/T̅  Selects either counter (or) timer operation
C/T ̅ = 1 for Counter and C / T ̅ = 0 for Timer
M1 & M0  Selects the mode of operation for Timers

M1 M0 Mode Register
0 0 Mode-0 13-bit
0 1 Mode-1 16-bit
1 0 Mode-2 8-bit→ Auto reload
1 1 Mode-3 8-bit

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 The timers of 8051 can be operated in 4 Modes - Mode 0, Mode 1, Mode 2, mode 3.

Timer  Counts the no. of internal machine cycles

(One machine cycle = 12 Clock periods)
Counter  Counts the no. of external pulses applied at pins T0 & T1 .

MODE-0 : 13-bit counter (Max. count is 1FFF H)

MODE-1 : 16-bit counter (Max. count is FFFF H)

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MODE-2 : 8-bit counter with Auto Reload mode

 The timer in Mode -2 Operation acts as 8-bit register (TLx).

 When the time is overflow the timer flag interrupt TFX will be generated and the TLx is
initialized to value in THx so that the timer starts counting from THx to Max. value this
Mode is called as “Auto reload mode”.

MODE-3 : In mode-3 operation TH0 and TL0 acts as TWO independent 8-bit timers.
The timer TL0 uses Timer0 control bits. The timer TH0 uses Timer1 control bits

Summary of Time Modes

Mode 0 Mode 1 Mode 2 Mode 3

TL0 (8- bit)

Timer 0 TL0 : TH0 (13- bit) TL0 : TH0 (16- bit) TL0 (8- bit)
TH0 (8- bit)

Timer 1 TL1 : TH1 (13- bit) TL1 : TH1(16- bit) TL1 (8- bit)

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4.7. 8051 INTERRUPT STRUCTURE & CONTOL:

 The 8051 has 5-interrupts

 ̅̅̅̅̅̅̅̅ & ̅̅̅̅̅̅̅

External interrupts (𝐼𝑁𝑇0 𝐼𝑁𝑇1 ) :
These are used for receiving interrupts from external sources.

 Internal Interrupts: (TF0, TF1, SI)

→ Timer flag interrupts TF0 & TF1 are generated when a timer/counter overflows.
→ These flags are cleared to zero after the execution of ISR
→ Serial port interrupt is generated in serial data transmission / receiption.
If a data byte is transmitted then Transmit Interrupt (TI) will be generated.
Similarly, if a data byte is received then Receive Interrupt (RI) will be
generated. Serial port interrupt is generated if TI=1 or RI=1

 The Interrupt service routine (ISR) for each interrupt begins at fixed location in
internal ROM
Interrupt ROM location
External interrupt -0 0003 H
Timer-0 over flow flag 000B H
External interrupt -0 0013 H
Timer-0 over flow flag 001B H
Serial port interrupt (TI/RI) 0023 H

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 The interrupts of 8051 are controlled by TWO control registers

IE : Interrupt Enable register  used to enable / disable the interrupts individually
IP : Interrupt Priority register  used to set the priority levels for interrupts

If two interrupts with some priority occurs at same time, then they have the following
priorities.

1. External interrupt-0 highest Priority

2. Timer 0 over flow flag.
3. External interrupt-1
4. Timer 1 over flow flag.
5. Serial port interrupt (TI/RI) Lowest Priority

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4.7. SERIAL COMMUNICATION PORT OF 8051:

 The 8051 has internal serial data port which uses SBUF register to hold the serial
data to be transmitted (or) received data.
 SBUF is a full duplex serial data buffer register, consists of Tx buffer & Rx buffer.
 The internal RAM address of SBUF is 99 H.
 The Pins TxD & RxD are used to transmit/receive serial data
Serial data communication is controlled by TWO control registers
SCON : Serial port Control register  controls the serial data
PCON : Power Control register  control the data rates

SM0 & SM1 :-Serial Port Mode selections bits

M0 M1 Mode Description
0 0 Mode 0 Shift register, baud = f/12
0 1 Mode 1 8 – bit UART, baud → Variable
1 0 Mode 2 9 – bit UART, baud → f/64 (or) f/32
1 1 Mode 3 9 – bit UART, baud → Variable

SM2 : disables the reception of frames for which bit-8 is ZERO

REN (Receive. Enable) : It is set to 1 to enable the reception
TB8 (Transmitted bit 8) :
It is a programmable transmitted 9th bit along with 8-data bits in Mode 2 & Mode 3.
RB8 (Received bit 8):
It is received 9th bit along with 8-data bits received in Mode 2 & Mode 3.
TI (Transmit interrupt flag): It is set to 1 at the end of transmission of 8- data bits.
RI (Receive interrupt flag) : It is set to 1 at the end of reception of 8- data bits.

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