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DS1 For ATM
DS1 For ATM
DS1 For ATM
Tuan Nguyen-viet
Part 1
GENERAL
ATM Cell
The header field HEC protects only the header (not the payload!). Error control of the payload is performed by higher layer protocols and applications. The integrity of the header is extremely important because a corrupted header can cause delivery of cells to wrong addresses, or can interfere with network management. This can bring the network in a catastrophic condition.
Among all errors in fiber-optic transmission media, 99.64% of them are single bit errors. This means that two-bit or three-bit errors are not very likely. However, it is also known from the experience that the large error bursts have also a high probability (of course, far less than single bit errors, but far more than two, three or four bit errors). This fact has influenced the design of the ATM error control mechanism and the size of the HEC field.
ATM layer uses the Bose-Chadhuri-Hocquenghem (BCH) algorithm which corrects single-bit errors and detects multiple bit errors. The algorithm is based on a combination of the 8-bit CRC scheme (which can detect errors) and Hamming code (which can correct single bit errors). This combination is based on the redundancy of HEC, which has 8 bits and is used to protect only 5x8 = 40 bits (5 header bytes). The coding theory shows that only 6 bits are necessary to detect and correct a single bit error in a message that has 40 bits. Furthermore, an extended 8-bit HEC can correct single-bit errors and detect 84% of other errors.
The algorithm computes the HEC value by modulo-two division of the header bit pattern (with the HEC field initialized to zeroes) by the CRC generator whose polynomial is x8 + x2 + x + 1. The remainder of the modulo-two division is then OR-ed with 01010101 and placed into the last octet of the cell header (HEC field). Similar operation is performed at the receiver's side, where the entire header (including HEC field) is modulo-two divided by the CRC generator. The error correction capability greatly diminishes the need for cell discarding, and consequently, the need for cell retransmission.
The algorithm starts in "correction mode" state. In detection mode the cells have an opportunity to be corrected (if the error is singlebit). If any error happens, the state is changed to detection mode, and it stays there as long as errors persist. This is designed to handle error bursts. It is assumed that the burst has stopped if a valid cell entered the switch - then the state is changed back to the correction mode.
Physical Medium Dependent (PMD) Sub-layer: Fiber, Twisted-Pair, Coax, etc. SONET/SDH, DS3/DS1, E3/E1, etc. Transmission convergence (TC) layer: Convert bit stream to cell stream Transmission frame adaptation: packing cells into frames Cell delineation: scrambling and cell recovery after descrambling HEC generation and verification Cell rate decoupling: Insertion and suppression of Idle cells.
Part 2
FRAMING
DS1 System
E1 System
E1 System (2)
HDLC frame
In HDLC, we use a special octet, the string of bits 0111 1110, as a framing character. Inside the frame, we suppress occurrences of this string with a technique known as zero bit insertion. And since HDLC frames can be variable length, we use another of these special characters as an ending flag to show where the frame ends.
Part 3
TRANSMISSION STRUCTURE
Cell-Stream Physic
Cell Alignment/Delineation
Since cells have no flags to indicate their beginning and the end, there must be some "pattern recognition" algorithm to find the exact location of a cell in a stream of incoming bits. To accomplish this, the receiver checks if a candidate header is valid: it modulo-two divides the 40 bits of the supposed header with the CRC generator. A zero remainder would indicate the possibility for a valid header. If the remainder is not zero, the receiver moves one bit further and perform the check again. This process continues, bit-by-bit, until a successful match occurs. As seen, the HEC has two functions: error control and cell synchronization (alignment, delineation).
Cell Scrambling
What happens if a payload accidentally contains a 40-bit sub-pattern which satisfies the HEC? This situation must be not permitted. Therefore the ATM forum has proposed an optional capability of cell scrambling, which looks for a bit pattern within the payload that satisfies the HEC. If such bit pattern is found, it is modified so that the match cannot occur within the payload, and that the payload can be easily unscrambled at the receiver's side.
Repetitive Checking
The HEC is not 100% accurate. Therefore the check must be performed several times successfully on three consecutive cells before the receiver finally can decide that it has found the right header and is in synchronism. This is called repetitive checking. A usual value of repetitions is three times.
Part 4
Direct Mapping
When direct mapping framing mode is used, cell delineation is used to locate the cell boundaries. Cell delineation is the process of framing to ATM cell boundaries using the header error checksum (HEC) field found in the ATM cell header. The HEC is a CRC-8 calculation over the first 4 bytes of the ATM cell header. When performing delineation, correct HEC calculations are assumed to indicate cell boundaries. An initial bit by bit search is made for a correct HEC sequence (HUNT state). Once located, the particular cell boundary is noted (PRESYNC state) and the search continues to determine whether the following pattern is correct. Once no incorrect HEC is received within a set number of cells, the SYNC state is declared. In this state, synchronization is not relinquished until a set number of consecutive incorrect HEC patterns are received.
Thank You !