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ECE385 DIGITAL SYSTEMS LABORATORY

Experiment 3 Shifters and Counters


Janak H. Patel Department of Electrical and Computer Engineering University of Illinois at Urbana-Champaign

Todays Topics
Experiment 3 Shift Registers and Counters Shift Registers
Logical shifts Arithmetic Shits Circular Shifts

Synchronous Counters
Binary Counters Gray-Code Counters

Asynchronous Counters
Ripple Counter

Experiment 3
Design of A Shift Register A 4-bit Synchronous Binary Counter
Synchronous - All flip-flops use one clock. All flipflops change their states at the same time (e.g. at the positive edge of the clock)

A Ripple Counter (Asynchronous Counter)


Asynchronous - Clock inputs to flip-flops can come from other flip-flop outputs or other logic. Flip-flop states may not change at the same time.

A 4-bit Gray-Code Counter (See Appendix C)


Successive counts differ in one bit. In the design of a Gray-code counter, care must be taken so that only one-bit changes between counts without producing any glitches.
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n-Bit Synchronous Counters


Combinational Logic

n-1

n-2

Clock Q 4+ = Q 4 Q3 Q 2 Q 1 Q 0 Q 3+ = Q 3 Q2 Q 1 Q 0 Q 2+ = Q 2 Q1 Q 0 Q 1+ = Q 1 Q0 Q0+ = Q0 1

Ripple Counters
1 T 0 Q 1 T 1 Q 1 T 2 Q 1 T 3 Q

Negative edge triggered Toggle (T) flip-flops

Intermediate States in Counters


4-Bit Counter A3 A2 A1 A0

State Detector

A3* A2* A1* A0*


Where star is Complemented or Un-complemented

A3A2A1A0 - - - - - - 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 - - - 6

What is the next State to 0111?


Binary Synchronous Counter 0111 goes to 1000
Could have intermediate states, 0110, 0100, 1011, 1100, 1101, ., etc. In fact any 4-bit vector is possible!

Ripple Counter 0111 goes to 1000 A 1 to 0 transition on Qi complements the next Qi+1
0111 0110 0100 0000 1000

Gray Code Counter 0111 goes to 0101 In a correctly designed counter there are no intermediate states
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Binary to Gray Code Conversion


Binary 4-bit Synchronous Counter A3 A2 A1 A0

Gi = Ai Ai+1
Binary to Gray Code Translation Combinational Logic G0 G1 G2 G3

Dont do this! See Appendix C


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4-Bit Gray-Code Counter


Combinational Logic

J3 K3

Q3

J2 K2

Q2

J1 K1

Q1

J0 K0

Q0

Clock

Gray Code Sequence: 0000, 0001, 0011, 0010, 0110, 0111, 0101, 0100, 1100, 1101, 1111, 1110, 1010, 1011, 1001, 1000

Experiment 3
This will be a single document for each team One Pre-Lab One Post-Lab One Lab Report Demonstration of working Design Demonstrate Counter Operations Demonstrate Shift Operations Demonstrate State Detector

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