Professional Documents
Culture Documents
Digital Systems Laboratory: Experiment 3 Shifters and Counters
Digital Systems Laboratory: Experiment 3 Shifters and Counters
Todays Topics
Experiment 3 Shift Registers and Counters Shift Registers
Logical shifts Arithmetic Shits Circular Shifts
Synchronous Counters
Binary Counters Gray-Code Counters
Asynchronous Counters
Ripple Counter
Experiment 3
Design of A Shift Register A 4-bit Synchronous Binary Counter
Synchronous - All flip-flops use one clock. All flipflops change their states at the same time (e.g. at the positive edge of the clock)
n-1
n-2
Clock Q 4+ = Q 4 Q3 Q 2 Q 1 Q 0 Q 3+ = Q 3 Q2 Q 1 Q 0 Q 2+ = Q 2 Q1 Q 0 Q 1+ = Q 1 Q0 Q0+ = Q0 1
Ripple Counters
1 T 0 Q 1 T 1 Q 1 T 2 Q 1 T 3 Q
State Detector
A3A2A1A0 - - - - - - 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 - - - 6
Ripple Counter 0111 goes to 1000 A 1 to 0 transition on Qi complements the next Qi+1
0111 0110 0100 0000 1000
Gray Code Counter 0111 goes to 0101 In a correctly designed counter there are no intermediate states
7
Gi = Ai Ai+1
Binary to Gray Code Translation Combinational Logic G0 G1 G2 G3
J3 K3
Q3
J2 K2
Q2
J1 K1
Q1
J0 K0
Q0
Clock
Gray Code Sequence: 0000, 0001, 0011, 0010, 0110, 0111, 0101, 0100, 1100, 1101, 1111, 1110, 1010, 1011, 1001, 1000
Experiment 3
This will be a single document for each team One Pre-Lab One Post-Lab One Lab Report Demonstration of working Design Demonstrate Counter Operations Demonstrate Shift Operations Demonstrate State Detector
10