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4NK60ZFP Datasheet
4NK60ZFP Datasheet
N-CHANNEL600V-1.76-4ATO-220/FP/DPAK/IPAK/D2PAK/I2PAK
ID 4 4 4 4 4 4 A A A A A A
Pw 70 W 25 W 70 W 70 W 70 W 70 W
3 1
D2PAK TO-220
3 1 2
TYPICAL RDS(on) = 1.76 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEATIBILITY
TO-220FP
3 1
3 12
1
3 2
DPAK
I2PAK
IPAK
DESCRIPTION The SuperMESH series is obtained through an extreme optimization of STs well established stripbased PowerMESH layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh products.
APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING s IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC s LIGHTING
s
ORDERING INFORMATION
SALES TYPE STP4NK60Z STP4NK60ZFP STB4NK60ZT4 STB4NK60Z-1 STD4NK60ZT4 STD4NK60Z-1 March 2003 MARKING P4NK60Z P4NK60ZFP B4NK60Z B4NK60Z D4NK60Z D4NK60Z PACKAGE TO-220 TO-220FP D2PAK I2PAK DPAK IPAK PACKAGING TUBE TUBE TAPE & REEL TUBE TAPE & REEL TUBE 1/16
STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter
STP4NK60Z STB4NK60Z STB4NK60Z-1
Value
STP4NK60ZFP STD4NK60Z STD4NK60Z-1
Unit
VDS VDGR VGS ID ID IDM ( ) PTOT VESD(G-S) dv/dt (1) VISO Tj Tstg
Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Gate source ESD(HBM-C=100pF, R=1.5K) Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Operating Junction Temperature Storage Temperature 4 2.5 16 70 0.56
600 600 30 4 (*) 2.5 (*) 16 (*) 25 0.2 3000 4.5 2500 -55 to 150 -55 to 150 4 2.5 16 70 0.56
V V V A A A W W/C V V/ns V C C
( ) Pulse width limited by safe operating area (1) ISD 4A, di/dt 200A/s, VDD V(BR)DSS, Tj TJMAX. (*) Limited only by maximum temperature allowed
THERMAL DATA
TO-220 D2PAK I2PAK Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 1.78 62.5 300 TO-220FP 5 DPAK IPAK 1.78 100 C/W C/W C
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 4 120 Unit A mJ
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the devices ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the devices integrity. These integrated Zener diodes thus avoid the usage of external components.
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) ON/OFF
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V VDS = VGS, ID = 50A VGS = 10V, ID = 2 A 3 3.75 1.76 Min. 600 1 50 10 4.5 2 Typ. Max. Unit V A A A V
DYNAMIC
Symbol gfs (1) Ciss Coss Crss Coss eq. (3) Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 15 V, ID = 2 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 3 510 67 13 38.5 Max. Unit S pF pF pF pF
SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Test Conditions VDD = 300 V, ID = 2 A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD = 480V, ID = 4 A, VGS = 10V Min. Typ. 12 9.5 18.8 3.8 9.8 26 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf tr(Voff) tf tc Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 300 V, ID = 2 A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD = 480V, ID = 4A, RG = 4.7, VGS = 10V (Inductive Load see, Figure 5) Min. Typ. 29 16.5 12 12 19.5 Max. Unit ns ns ns ns ns
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
Safe Operatingrea:TO-220/DPAK/IPAK/D2PAK/I2PAK Safe Operating Area For TO-220FP A
Output Characteristics
Transfer Characteristics
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
Transconductance Static Drain-source On Resistance
Capacitance Variations
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
D1
L2
F1
G1
E
Dia. L5 L7 L6 L4
P011C
L9
8/16
F2
H2
STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
DIM. A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7
L3 L6 L7
F1 F
G1 H
F2
L2 L5
E
1 2 3
L4
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
DIM. 2.20 0.90 0.03 0.64 5.20 0.45 0.48 6.00 6.40 4.40 9.35
inch MAX. 2.40 1.10 0.23 0.90 5.40 0.60 0.60 6.20 6.60 4.60 10.10 MIN. 0.087 0.035 0.001 0.025 0.204 0.018 0.019 0.236 0.252 0.173 0.368 0.031 1.00 8
o
TYP.
TYP.
MAX. 0.094 0.043 0.009 0.035 0.213 0.024 0.024 0.244 0.260 0.181 0.398
0.8 0.024 0
o
0.039 0o
P032P_B
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
C C2
L2 D
B3
B6
A1
B5
A3
=
B2
G
=
L1
0068771-E
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
DIM.
C2
B2
L1 L2 D L
P011P5/E
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A1
STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
D2PAK FOOTPRINT
STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
DPAK FOOTPRINT
mm MIN. 6.8 10.4 1.5 1.5 1.65 7.4 2.55 3.9 7.9 1.9 40
15.7 16.3
inch MIN. MAX. 7 0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0.153 0.161 0.311 0.319 0.075 0.082 1.574 0.618
0.641
MAX. 10.6 12.1 1.6 1.85 7.6 2.75 4.1 8.1 2.1
* on sales type
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STP4NK60Z,STP4NK60ZFP,STB4NK60Z,STB4NK60Z-1,STD4NK60Z,STD4NK60Z-1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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