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Project Name: Building PONG GAME On DE1
Project Name: Building PONG GAME On DE1
Project Name: Building PONG GAME On DE1
Report
Project name : Building PONG GAME on DE1 hardware foundation of Altera
Guiding lecturer : Phm Ngc Nam. : ng c Tn T3 Nguyn Minh c T3 ng Minh c T4 H Minh c T11 - 20070840 Nguyn Mnh t T2
Members
Content
1 2 Thankful expression ...................................................................................................... Overview ....................................................................................................................... 2.1 2.2 2.3 Purpose ..................................................................................................................... Basic foundation ...................................................................................................... Project requirement .................................................................................................. Functional requirement ..................................................................................... Non-functional requirement ..............................................................................
Block diagram of the system ......................................................................................... 4.1 4.2 4.3 4.4 Keyboard .................................................................................................................. Display ..................................................................................................................... ROM......................................................................................................................... Processing unit .........................................................................................................
5 5
PS2 Keyboard ................................................................................................................ Block for receiving PS2 data .................................................................................... 5.1.1 5.1.2 5.2 Giao tip vt l cng PS2 .................................................................................. Khi nhn d liu PS2 ......................................................................................
Mch giao tip vi PS2 Keyboard ........................................................................... Tng quan v m ha bn phm ........................................................................
5.2.1
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5.2.2 6
VGA............................................................................................................................... 6.1
Graphic .......................................................................................................................
M h to pix ...................................................................................................
VGA text .................................................................................................................. Gii thiu ........................................................................................................... To t xt .............................................................................................................. Font ROM ......................................................................................................... M h to t xt T n .........................................................................................
Font.....................................................................................................
c xy dng game .............................................................................................. Xy dng mn hnh new game ................................................................................ Layer nn ........................................................................................................... Text layer...........................................................................................................
Xy dng mn h i hnh ........................................................................................ Text.................................................................................................................... Header ............................................................................................................... B tng .......................................................................................................... Bng m i ........................................................................................................... Rn ....................................................................................................................
Khi no kt th tr h i? ........................................................................................
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7.4
7.4.1 7.4.2 8 9
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1 Thankful expression
We would like to give thankful voice to lecturer Nam who guided and helped through the implementation process.
2 Overview
2.1 Purpose
Designing PONG GAME based on DE1 kit. Holding knowledge of DE1 hardware. Expanding programming capacity with C language.
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2.5 Achievement
The game is basically completed with the friendly interface and not complex to play. Handling ball reflection is quite well.
2.6 Shortcoming
Som tim s, st rting g m is sti ow n .
3 Used technology
3.1 Hardware
3.1.1 DE1 Kit
DE1 board is a development tool has many features, the board allow the user to implement from simple circuits to complex projects. Particularly, the following hardware is provided on the DE1 board : t r Cy on II 2C20 FPG t r S ri Configur tion vi vi EPCS4
US
Serial (AS) programming modes are supported 512-Kbyte SRAM 8-Mbyte SDRAM 4-Mbyte Flash memory SD C r so t
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8 r n us r LEDs 50-MHz oscillator, 27-MHz oscillator and 24-MHz oscillator for clock sources 24-bit CD-quality audio CODEC with line-in, line-out, and microphone-in jacks VG D C (4-bit resistor network) with VGA-out connector RS-232 transceiver and 9-pin connector PS/2 mous / y oard connector Two 40-pin Expansion Headers with resistor protection Pow r y ith r 7.5V DC pt r or US
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3.2 C language
C is a popular language used for many embedded systems. We use the language to programme the NIOS II on the SoPC system.
4 Block Diagram
KEYBORAD
KEYBOARD CONTROLLER
VGA CONTROLLER
VGA MONITER
PONG MAIN
PONG CORE
AUDIO COTROLLER
IC CODEC
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There four key parts in our project : VGA controller, PS2 controller, Audio controller and Pong main with input : PS2 keyboard, and output : VGA display, speaker. Data from keyboard to control balls and paddlers and the score calculation would be processed by the Pong main.
5 PS2 Keyboard
To control the direction of movement of the slider up and down, enter the level to start playing, pause the game or to save the name if the player scores high ... we have to use akeyboard. Currently the market has two types of keyboard is usb port keyboard and keyboard port ps2.Trong pong game made by the group selected the ps2 keyboard to use. We will turn to find out about this type of keyboard as well as design mass necessary to be able to receive data sent from the keyboard correctly.
1 stop bit
Data Bits (8 bits) Odd Parity Bit (1 bit) Stop Bit (1 bit)
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Clock of the keyboard is transmitted through the pin ps2c frequency range from 10kHz to 16.7 Khz, ps2d signal must be stable for at least 5us front and back up and down slopes of the signal ps2c. We can see this by describing the drawing:
Hnh 5.3
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Idle
dps
F Fail_edge=1
n=0
n<=n-1 T
Basically, the circuit works as follows: First in the standby mode, the circuit to check the slope of the clock signal of the PS2 and get a start bit. After identifying the start bit to 10 bit circuits will next include 8 data bits, 1 parity bit and 1 stop bit. End of the 8 bit data and move on hold.
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In this section we'll learn how to encode keyboard design and a circuit for decoding the commands sent from the keyboard to the Host.
The figure below shows the code of the keys make the keyboard:
For the keyboard usually make its code size is 1 byte longer to extend the key size is from 2 to 4 byte for byte. PS2 keyboard will begin serialization code depending on the operation of the keyboard. For example, you press and release the first key A make code is sent to then break its code: 1C F0 1C For example key expansion up button: E0 75 F0 E0 75
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If you press a key long enough then release the make code will be sent several times: 1C 1C 1C .. F0 1C If multiple keys are pressed simultaneously, the code is sent in turn make code and break code of two keys. For example, you press two keys simultaneously, the Shift and A COE will be sent to: 12 1C F0 1C F0 12
ps2c ps2d
ps2c ps2d
Key_code
dout got_tick done_tick w_data wr r_data rd
got_key
clk
PS2_rx
FIFO
Figure 5.7
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Spotlight in this circuit is the signal got_key. After the circuit receives data sent from the PS2 keyboard and output is a signal dout is done_tick signal. Output signal will be sent to an FSM circuit to determine the main components of the code that we need to collect to serve our purposes. Got_tick positive signal high when the circuit will determine the composition of FSM code to read, and write into the code for this in the Control Unit Fifo waiting for treatment. Chart FSM to start make code:
wait
done_tick = 0
Check key
got_key = 0 brk_key = 1 brk_key = 0 brk_flag = 1
loop
Clear flag
brk_flag = 0 brk_flag = 1
Check flag
got_key = 0 brk_flag = 0
Read key
got_key = 1
Figure 5.8
FSM is designed to break code scan code instead of all keys pressed including extended keys. The advantage is that can get the right key when a key is pressed but the change is more complex circuits. This reading is E0 FSM will skip this code; Upon receiving F0 F0
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will ignore and bypass the code and immediately following its receipt. Thus, complete the task FSM received scan code. FSM do the job as follows: At first signal and brk_flag got_key by 0. When you receive a code from the receiver, it will have to check the extended code E0 or not, if it will ignore (got_key <= 0) and return to standby. If you are not E0, check to see if it is F0 or not. If the flag F0 is set to 1 and skip brk_flag this code and move on hold. If not the E0 and F0, this will check the flag brk_flag, if the one they will ignore the code, and delete flag brk_flag about 0. If is 0, then get this code. Then move on hold. For example, when you press and release the up arrow key will have the following code is transmitted in turn: E0 75 E0 F0 75 Upon receipt of first E0 values, this is wide open to be missed. Upon receipt of the next 75 value, this is not the E0 or F0, brk_flag flag and check for the value 0 => get this value => we get scan code E0 next skip. F0 next brk_flag flags ignored and set to 1. The value of the last 75, the flag brk_flag check for a value => ignore and delete this flag to 0.
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6 VGA
6.1 Graphics
6.1.1 Introduction
- VGA stands for "video graphics array", is a graphics standard introduced in late 1980 from the same type computer IBM PS / 2. In the following sections, we will discuss the interface 640 x 480 resolution with 8 basic colors of the screen CRT (cathode ray tube). - Below is a combination of color from the 3-bit VGA: red (R) 0 0 0 0 1 1 1 1 Green (G) 0 0 1 1 0 0 1 1 Blue (B) 0 1 0 1 0 1 0 1 Color black Blue Green Cyan red Magenta Gold White
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External data/control
VGA monitor
clock
VGA_sync VGA_sync
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6.2.1.2 sync signal in the vertical Map-time scanning sync signal vertically as follows:
side. Border area on: is the black area above, in this region the picture messaging is disabled is not displayed. border below: black area is the same as the area below and above the boundary, in the region this competition the picture signal of breath is not displayed. 6.2.1.3 Speed pixel - Call p is the number of pixels in a horizontal row, l be positive in a horizontal screen and s is the number of displays in the 1 s test speed by pixel p * l * s. - Note: order to be not blinking screen test s must be greater than or equal to 24. - With a screen resolution 640x480 and displays the number of 1s is 60 images / s test p = 800 pixels / line, l = 525 line / screen, s = 60 screens / second tape speed 800x525x60 pix 25M pix / s.
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Map type bit - mapped. Map style tile - mapped. Map object model - mapped. - In the chart type bit - mapped, data displayed on the screen is stored in a memory cell. Each pixel is stored directly in memory that forms words memory (memory word) and signal pixel_x, pixel_y create memory cell address. A micro processor constantly updated graphical screen and write data to memory cells. A receiver for continuous read from the memory and transfers data to RGB. Chart bit - mapped commonly used to create color. Disadvantage when using this diagram is a waste of space. - To reduce memory requirements, people use chart style tile - mapped. In the diagram this model, we group a set of bits to form a tile (square tiles) and to treat each tile as a bit. Chart is usually used to create text. - Finally, the object model diagram - mapped is often used to create the objects. In the preserve, we trade on a combination of three ways to generate a complete screen. 6.2.2.1 Diagrams object model - mapped. Block diagram:
Data/control Video_on pixel_x pixel_y Object 1 Object 1 Generation circuit Generation circuit
rgb mux
rgb
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- Block diagram including circuit creates the objects, a mux to select the objects displayed. Circuits perform the following functions: Hold down the coordinates of the object coordinates and comparing this with the current position and that pixel_x pixel_y provided. Hold down the coordinates of the object coordinates and comparing this with the current position and that pixel_x pixel_y provided. Only the color of the object signal. - Set mux check the signal on and identify information would be transmitted to the output signal rgb. 6.2.2.2 Diagrams style bit - mapped In this type of diagram, each pixel memory cells should constitute a drawback of this method is very religious memory. This approach does not require additional circuitry to switch the signal pixel_ x and pixel_y memory locations but much wasted memory. 6.2.2.3 Diagrams style tile - mapped Diagrams for this model is used to create text and will be discussed in Section 2.
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00000000 00000000 00000000 00000000 00010000 00010000 00111000 00111000 01101100 01101100 11000110 11000110 11000110 11000110 11111110 11111110 11000110 11000110 11000110 11000110 11000110 11000110 11000110 11000110 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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-- code
x00
(blank space)
00000000, -- 0 00000000, -- 1 00000000, -- 2 00000000, -- 3 00000000, -- 4 00000000, -- 5 00000000, -- 6 00000000, -- 7 00000000, -- 8 00000000, -- 9 00000000, -- a 00000000, -- b 00000000, -- c 00000000, -- d 00000000, -- e 00000000, -- f ... begin -- addr register to infer block RAM process (clk) begin if (clkevent and clk = 1) then addr-reg end end data end if ; process; <= ROM(to_integer(unsigned(addr_reg))) ; arch; <= addr;
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- Under this method, the screen is considered as a resolution of 80x30 tiles, each tile is a box the size of 8x16. First, pixel_x and pixel_y will indicate the location coordinates of the current tile.The circuit used to create character coordinates in conjunction with the data signal / control from the outside to create the value of tlie corresponding ASCII code. Next, this will make ASCII 7 bits of the address of the font ROM and the location of the sample in question. Combined with the lower 4 bits of the y coordinates to form the full address of the font ROM. The output of the ROM font corresponding to a row of an 8 bit samples, and the third bit is the smallest weight of x coordinates indicate the position of the pixel.
7 Cc bc xy dng game
S FSM c a game:
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Reset Enter = 0
Start
Enter = 1
Play
Fail = 1 Bigger = 0
Fail = 0
Game over
Bigger = 1
Enter = 1
Enter name
ASM c a game:
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New game
End game
Level <= 1
Del_count_ena <=1'
Level ++ T Level -T
End_count = 1 T Score_bigger = 1 T
Play
Enter Name
Snake_size <= 4 Score <= 0 Size_tick <= 0 Score_tick = 0 F F eat = 1 T Size_tick <= 1 Score_tick = 1 Fail = 1 T
Btn = Ent r T
Get_key <= 1
Get_name <= 1
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SNAKE GAME
Difficulty: Level 1 Level 2 Level 3 Level 4 Level 5
di chuy n v tr c a box.
V thit k, c th chia m hnh new game lm 2 phn nh 2 y r: y r nn cha background mu xanh v box mu trng , top layer cha text.
RGB
0 1
Text_on
Start_RGB
Start text
ena
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7.1.1 Layer nn
Cha nn xanh v select_box mu trng:
SNAKE GAME
Difficulty: Level 1 Level 2 Level 3 Level 4 Level 5
i t ng hnh ch nht, v tr c a n l m t
nh trc t ng ng vi 5 v tr c a cc level. N xu t hin u v ngi h i mun chn. x iu ny, ta s dng m t bin c a select_box. Khi ngi h i nh n phm mi tn n hoc
nh t
xung s m tng hoc gi m gi tr c a bin position ny dn n th y i v tr c a select_box. Bin position ny ng c s dng cho phn h i hnh nh th m s u vo x nh t di chuy n c a ch rn.
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Position = 1
Position = 1
Phn vic tip theo l cho hi n th select_box mu trng ny ln trn nn mu x nh nh m t i t ng hnh ch nht th ng thng.
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SNAKE GAME
Difficulty: Level 1 Level 2 Level 3 Level 4 Level 5
Vic xy dng layer text ny khng c g phc tp, hon ton da trn kin thc v vic hi n th text ln mn hnh VGA. Ch t tr t ng ng c a select_box. c a cc m v s o ho ng vi cc v
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SPEED: 3
SCORE: 13
N bao g m cc phn chnh: Text hi n th level hin ti c B tng gia mn hnh. Rn. M i. tr h i v m i m t c c ngi h i.
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Postion
Key board
ena
ena
Speed_counter
Snake_size
Snake counter
Snake drive
Score_tick
RGB
Snake_fail
read
random
0 1
Play_RGB
ena
score level
RGB
Text on
7.2.1 Text
Vic hi n th t xt v t lm top- y r bit phn trc. y hng t s i vo vic m s o hi n th level v score c ngi h i.
score
RGB
Text on
Hnh 7.10S khi hin th text mn chi chnh
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SPEED: 3
SCORE: 13
i m c
ngi h i
u th o i u d liu in ry 14 it. hi n th i m s:
i m s ny,
trc tin ta chuy n v dng BCD 16 bit thng qua b chuy n i BIN_2_BCD. C 4 bit c a tn hiu CD ny t ng ng vi 1 ch s c
Bin2BCD
14bit Binary 16bit BCD
572
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ng thm 48. T
vic
7.2.2 Header
Vng header mu trng c to ra bng cch s dng thut to r nht th ng thng. i t ng hnh ch
7.2.3 Bc tng
to ra b tng hnh ch nht. S u ROM c hi n nhng v tr mun hi n th b tng, ta ch vic cho hi n bng cch load tng. ho vn t n s dng ROM to i t ng khng ph i
111100 111001 110011 100111 001111 111100 111001 110011 100111 001111 111100 111001 110011 100111 001111
Tng
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7.2.4 Bng mi
Vic hi n th bng hon ton ging vi vic hi n th b tng. Sau mi ln rn n c bng m i s cn bng m i mi xu t hin v xu t hin m t v tr ngu nhin. to ra t ngu nhin ny, ta s dng 2 b m vi cc gi tr ln nh t ng vi 2 t t s l y 2 gi tr c a 2 b ln m lm m ny s m quay vng lin tc. Khi rn n m i s
nh t c a 2 chiu mn hnh. 2 b
m i lin tip c a rn. V v kho ng thi gian ny l ngu nhin nn 2 gi tr t ng ngu nhin.
ena
Ball feed
Snake drive
Score_tick
read
random
N-1
Ball_X
M-2 M-1
Ball_Y
Read
Nu nh
ng m i mi sinh ra c t sinh r
ng c hi n th c a rn
th m t qu bng mi s ph i
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Head Ball
New ball
Hnh 7.15 Bng nm trong thn rn
trnh vic qu bng mi sinh nm trong b tng, ta chn to trong b m sinh t ngu nhin cho bng.
c a bng ngay t
7.2.5 Rn
Vic hi n th t ng t c a rn ng hon ton ging vi m vi b tng, load ROM cho t ng t m t. C iu ch rn c chiu i th y i. x m nh m t tham s u vo t b tnh chiu di rn m oi nh m t m ng nhiu phn t, mi phn t ng vi nh v t tri c a mi t t ng
Chiu di c a ch rn
ta s xt sau ny. Ch rn
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hi n th
Kh ng
hi n th
L-1
L: Chiu i rn N: Chiu i rn ti rn
Kh ng
hi n th
u Snak_on
L-1
Khi khi VGA qut mn hnh theo pixel_x v pixel_y, ta s ki m tra xem t c thu t rn no khng. Gi s t t rn ng qut nm trong m t t rn no . ki m tra tn hiu sn on t ng ng. Nu n bng 1 ta s load ROM v hi n th
hin ti , t s t rn
, ng c li th khng cho hi n th
t rn m pix
c hi n th hay khng. Nu gi tr x
ROM t ng ng 1 th pix
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Pixel_x
Pixel_x
Pixel_y
1 1
1 1 1
t th i
0 1 1
Pixel_y
Sna_on(i) =0'
Sna_on(i) =1'
Nh hnh trn,
ng 1 th s xu t ra gi
tr RGB c a ch rn. m iu ny, ta or t t c cc bit c a tn hiu sna_on li vi nhau to ra tn hiu snake_on. => b t c khi no snake_on bng 1 th ho xu t gi tr RGB c a ch rn ra cng VGA:
Sna_on 0
Sna_on 1
Sna_on 2
Sna_on 3
Sna_on n-3
Sna_on n-2
Sna_on n-1
Snake_on
OR
OR
OR
OR
OR
OR
Hnh 7.19
iu khin rn di chuyn:
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M t h h rn. T t c c
n gi n
iu khi n rn di chuy n
h vi
iu khi n u c a nh v tri
t rn cn li s t ho t ng sau:
ng i th o u rn bng cch gn t
t ng tr
Top1 Left2
Top2 Left3
Top3 Left4
Top4 Left5
Top5
Head
th ng o hi no th c
ch t
c a t li c iu
u rn v
m ph thu c vo level c
ngi h i. L v
level
Step_tick
Counter
clk
clk Step_tick
iu khin u rn:
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ena
Co-ordinate of snake_head
Snake drive
Hnh 7.22 Khi iu khin u rn
u rn hng t
trng nhn vo phm mi tn h ng c li vi hng di chuy n c a rn dn n u c a ch rn chui vo thn c a n ta cn m t bin cha chiu x l nhn phm b m. Do rn nh phn 2 bit ng i huy n c a ch rn 4 hng di chuy n trn mn hnh nn ta dng m t bin
direc <= "00"; => di chuy n t tri sang ph i. direc <= "01"; => di chuy n t ph i sang tri. direc <= "10"; => di chuy n t trn xung i. direc <= "11"; => di chuy n t i ln trn.
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01
11
00
Hnh 7.23 Hng trn mn hnh
Khi nhn m t phm b m t bn phm- v d l "01110100" ( phm di chuy n sang ph i)ta s ki m tra phm g. Trong trng h p ny t phm mi tn s ng ph i. Tip theo ki m tr hng ng i huy n c a rn l chiu no. Nu 01 ph i sang tri
10
Hng Hng
ng i huy n th r i
Hng h ng th
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u c a rn c nm trong vng c a b tng hay khng. Vic ki m tra xem con rn c t n hnh n h y h ng ng c thc hin t ng t bng cch ki m tra t hay khng. u rn c trng vi t c t c bt c a con rn
Do vic ki m tra rn m vo tng v t m hnh n hai tn hiu ring r nn s cn kt h p li bng php or.
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SCORE: 120
Top 5: Player1: 560 Player2: 440 Player3: 360 Player4: 210 Player5: 100
5 ngi c s i m cao nh t tr
Score sreen
RGB
Name array
Hnh 7.27 Khi hin th im ngi chi
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i m v v trong mn h i hnh.
LONG_
Mn hnh g m 2 phn : layer text v background cha text_box mu trng. V n hi n th ging cc phn n tr y v h n gi n.
Ta xt v n nhp tn t bn phm v x u tr tn ng i m s vo m ng. u tn phm ngi h i c nhp t bn phm ta s dng m ng 7 phn t, mi phn 1 phm c nh n, scan code SCII t ng ng thng qua b c chuy n ln host v chuy n thnh m
t 1 c
a ch c a 1 ch ci trong font_ROM. Mi hi
chuy n i SCAN2ASCII.
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Key board
2 ASCII
Hnh 7.29 Chuyn Scan code sang m ASCII
, m
c gi tr
a ch ROM t
trong m ng v load k t t ng ng. Khi nhn c phm backspace, mch s xa phn t tr 5 ngi h i i m s cao nh t. v gi tr 0 ( a ch c a
kho ng trng trong ROM). Khi nhn phm enter, m ng cha tn s c chn vo trong m ng 2 chiu cha tn c
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Playe r 4: 2 00
Player 5: 100
8 Kt lun
Sau m t thng h lm vi , hng t i hon thnh sn g m trn it DE1. Th ng qu g m hon nh dng ti hng t i hc h i thm r t nhiu thut trong lp trnh VHDL ng nh nhng kinh nghim qu bu trong vic pht tri n ng dng trn FPGA. M thnh nhng vn cn r t nhiu vic ph i m game hon thin h n na. hon thin g m nh hi n th
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