FLUXLESS WAFER-LEVEL CuSn BONDING FOR MICRO- AND NANOSYSTEMS PACKAGING

Nils Hoivik, Kaiying Wang, Knut Aasmundtveit, Guttorm Salomonsen,

Department of Micro and Nano Systems Technology - IMST, HiVe-Vestfold University College

Adriana Lapadatu, Gjermund Kittilsland and Birger Stark

Sensonor Technologies AS, Norway

ESTC2010, Sept 13-16, Berlin - Germany

Motivation
Needed a bonding technology to:
Interconnect MEMS devices (few I/O) Encapsulation/package (bond frames)

Infineon SP12T Pressure sensor

Once MEMS devices are freestanding on device wafer

No further wet processing allowed MEMS devices require a well defined atmosphere, or vacuum (hermetic)

Cu-Sn SLID bonding is a well established interconnect technology

SLID Cu-Sn (Cu/Cu3Sn/Cu) Chips are joined ~235oC (Sn melts) IMC can tolerate T > 350oC

MEMS and ASIC combined: to create a package

ESTC2010, Sept 13-16, Berlin

Cu-Sn Solid-Liquid Inter-Diffusion Bonding

SLID* bonding intermetallic formation between a high-melting point component (Cu) and a low melting point component (Sn) Bonding Temperature: 250-300oC Final bond line can tolerate higher temperatures
Cu3Sn > 650oC Successive stacking

Goal: Stable, single-phase bond line (Cu/Cu3Sn/Cu)

*AKA: Isothermal Solidification (IS) Transient Liquid Phase (TLP)

ESTC2010, Sept 13-16, Berlin

Symmetric Cu-Sn Bonding

Heat and Pressure

Cu
Silicon substrate
Cu
TiW/Au

Cu3Sn
Cu6Sn5 Cu3Sn

Cu6Sn5

Sn Cu

1 min at 260C

Cu

Silicon substrate As electroplated Heat and pressure applied during bonding Final bond

Cu3Sn
30 min at 260C

In the Cu-Sn system, Cu6Sn5 is formed first by solid state diffusion, followed by grain boundary diffusion to create Cu3Sn

First reaction is fast (seconds), however longer times are required for second diffusion (minutes)

ESTC2010, Sept 13-16, Berlin

Wafer-level Fluxless Cu-Sn Bonding

Etch backside marks on wafers Oxidize wafers
500-750 nm SiO2
Alignement marks

Sputter seedlayer
TiW, Au

Cu/Sn bond frame

Pattern bond frames

AZ4562 (~10 m)

Si wafer

Electroplate
Cu: 5 m, Sn: 1.5 m Uniformity ~ 2-5% across wafer

220 um

Wafer bonding
Vacuum/N2 (EVG501) Use no flux, nor pre-clean of wafers Bond frame geometry

ESTC2010, Sept 13-16, Berlin

IMC formation Effect of thermal ramp

Rapid anneal to 400oC
400 5 10 20 25 30
Cu3Sn Cu6Sn5 Cu6Sn5

Slow anneal to 400oC

400 5 10 20 25 30
Cu3Sn

Two-step anneal to 400oC

Sn melting point

400 235 5 10 20 25 30
Cu3Sn Cu3Sn

For thin Sn films at the bonding interface must obtain an even IMC formation

ESTC2010, Sept 13-16, Berlin

Bond Process Temperature & Force

Employing a slow ramping rate after wafers are brought into contact (150 oC) is beneficial for reducing the flow of any excess Sn. More Sn will have reacted with Cu by T [oC] the time the temperature reaches the melting point of Sn, and thus less pure liquid Sn is available at the bonding 300 interface. 260
Ramp 1: 7 K/min Ramp 2: 3 K/min Bond force of 7kN (20 MPa) at 150C. Wafer A, B: 1kN (3 MPa) at T ~240C) Wafer C, D & E: maintained high throughout the soak time.
1000 Time Ramp 1 Ramp 2 Soak time Cool down

Bond force [N] 7000

Tm
150

ESTC2010, Sept 13-16, Berlin

Bond Results
100 mm wafer

Bonding and dicing yield: 96-100% IR inspection used to evaluate Sn overflow Cross-sections to evaluate IMC composition
Wafer D: high force Clean edges Wafer B: High/Low force Sn overflow

Sn overflow ~ 10 m

ESTC2010, Sept 13-16, Berlin

IMC Formation
Observations: A continuous high bond force in general leads to a higher dicing yield As desired, all available Sn has been converted to Cu3Sn between the Cu areas, with some remaining Cu6Sn5 observed at the frame edges. Upon further annealing, this area will end up converted to Cu3Sn as well.

A: 7kN/1kN 1 min 260oC

B: 7kN/1kN 10 min 300oC

C: 7kN 10 min 300oC

D: 7kN 30 min 260oC

ESTC2010, Sept 13-16, Berlin

Encapsulation Evaluation 100 um Si Wafer

For wafers bonded in vacuum, one can observe deflection of a thin membrane due to the pressure difference
100 um thick wafer bonded to 450 um thick Si wafer

Cu-Sn bond process worked very well but, Handling of 100 m thick wafer did not!

100 um Cu

Cu3Sn

Cracks Deflected areas

Cu

ESTC2010, Sept 13-16, Berlin

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Encapsulation Evaluation Membranes

Vacuum bonding of back-side etched SOI wafers (10 um device layer) Dies measured over a period of two months No detectable variation in deflection of membrane
Measured deformation (um)
Membrane SOI wafer Cu/Sn bond frame

Si wafer

Bond frame

Membrane
ESTC2010, Sept 13-16, Berlin

Location along membrane (mm)

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Shear Testing

Avoid unintentional heat treatment (adhesive used to glue down dies) Test devices as-is after bonding fixed in place by another substrate of same thickness

Delamination mainly occurs between TiW/SiO2, not at the bond interface

ESTC2010, Sept 13-16, Berlin

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Measured Shear Strength

From each wafer pair, 20 dies were tested after bonding, and 20 dies after thermal cycling.
- 40 oC/150 oC 8 cycles/hour 1000 cycles

Wafer pair D

Additionally, a wafer pair stored for ~60 days was bonded and measured
E (stored)

Wafer pair E

ESTC2010, Sept 13-16, Berlin

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Summary
Symmetric Cu-Sn interdiffusion bonding offers a cost-effective packaging process compatible with sensitive micro- and nano-scale devices. Capping the Cu on both bonding surfaces with Sn, Cu will be protected from oxidizing. Wafers are bonded without the use of any pre-cleaning, etching or use of fluxing agent. Using a two-step temperature profile, with the wafers brought into contact at 150 oC, initiates the diffusion process between Cu and Sn early on and reduces the amount of pure Sn left in the bond line when reaching the melting temperature of Sn. Measured shear strength is above 30 MPa, and wafers stored for nearly two months were bonded using no pre-clean or flux and without any reduction in bonding yield or shear strength.

ESTC2010, Sept 13-16, Berlin

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Thank you for your attention!

More on Cu-Sn encapsulation will be published at ECS2010, Oct 12-16, 2010
Cu-Sn Wafer Level Bonding for Vacuum Encapsulation of Microbolometers Focal Plane Arrays A. Lapadatu, T.I. Simonsen, G. Kittilsland, B. Stark N. Hoivik, V. Dalsrud, Guttorm Salomonsen

Email: nh@hive.no Website: www.hive.no/imst

ESTC2010, Sept 13-16, Berlin

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