May 09 12:12:41.

505 VTTY: Console port: waiting connection on tcp port 2001 (FD
11)
May 09 12:12:41.506 VTTY: AUX port: waiting connection on tcp port 2501 (FD 12)
May 09 12:13:14.715 slot0: C/H/S settings = 256/4/32
May 09 12:13:14.716 slot1: C/H/S settings = 0/4/32
May 09 12:13:14.919 C2691_BOOT: starting instance (CPU0 PC=0xffffffffbfc00000,id
le_pc=0x60aaf1b8,JIT on)
May 09 12:13:14.919 CPU0: CPU_STATE: Starting CPU (old state=2)...
May 09 12:13:15.167 ROM: Microcode has started.
May 09 12:13:16.168 CPU0: IO_FPGA: write to unknown addr 0x34, value=0x22, pc=0x
6028bc28 (size=2)
May 09 12:13:16.168 ROM: unhandled syscall 0x00000047 at pc=0x60aaa174 (a1=0x631
9862f,a2=0x656b2efa,a3=0x656b2ef3)
May 09 12:13:43.031 ROM: trying to read bootvar 'RANDOM_NUM'
May 09 12:13:43.095 CPU0: PCI: read request at pc=0x6029b70c: bus=0,device=0,fun
ction=0,reg=0x00
May 09 12:13:43.096 CPU0: PCI: read request at pc=0x6029b710: bus=0,device=0,fun
ction=0,reg=0x00
May 09 12:13:43.096 CPU0: PCI: read request at pc=0x6029b4a0: bus=0,device=0,fun
ction=0,reg=0x08
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000000) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x10
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x10
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000000) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x90
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x90
May 09 12:13:43.096 CPU0: PCI: write request (data=0x10000000) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x14
May 09 12:13:43.096 CPU0: PCI: write request (data=0x10000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x14
May 09 12:13:43.096 CPU0: PCI: write request (data=0x10000000) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x94
May 09 12:13:43.096 CPU0: PCI: write request (data=0x10000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x94
May 09 12:13:43.096 CPU0: PCI: write request (data=0x14000000) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x20
May 09 12:13:43.096 CPU0: PCI: write request (data=0x14000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x20
May 09 12:13:43.096 CPU0: PCI: write request (data=0x14000000) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0xa0
May 09 12:13:43.096 CPU0: PCI: write request (data=0x14000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0xa0
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000146) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x04
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000146) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x04
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000146) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x84
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000146) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x84
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000007) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x0c
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000007) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x0c
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000007) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x8c
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000007) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x8c

May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000000) at pc=0x6029b60c:

bus=0,device=0,function=0,reg=0x10
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x10
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000000) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x90
May 09 12:13:43.096 CPU0: PCI: write request (data=0x00000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x90
May 09 12:13:43.096 CPU0: PCI: write request (data=0x20000000) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x14
May 09 12:13:43.096 CPU0: PCI: write request (data=0x20000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x14
May 09 12:13:43.096 CPU0: PCI: write request (data=0x20000000) at pc=0x6029b60c:
bus=0,device=0,function=0,reg=0x94
May 09 12:13:43.096 CPU0: PCI: write request (data=0x20000000) at pc=0x6029b610:
bus=0,device=0,function=0,reg=0x94
May 09 12:13:43.096 CPU0: PCI: write request (data=0xc0000000) at pc=0x6029b60c:
bus=0,device=0,function=1,reg=0x10
May 09 12:13:43.096 CPU0: PCI: write request (data=0xc0000000) for unknown devic
e at pc=0x6029b60c (bus=0,device=0,function=1,reg=0x10).
May 09 12:13:43.096 CPU0: PCI: write request (data=0xc0000000) at pc=0x6029b610:
bus=0,device=0,function=1,reg=0x10
May 09 12:13:43.096 CPU0: PCI: write request (data=0xc0000000) for unknown devic
e at pc=0x6029b610 (bus=0,device=0,function=1,reg=0x10).
May 09 12:13:43.096 CPU0: PCI: write request (data=0xc0000000) at pc=0x6029b60c:
bus=0,device=0,function=1,reg=0x90
May 09 12:13:43.096 CPU0: PCI: write request (data=0xc0000000) for unknown devic
e at pc=0x6029b60c (bus=0,device=0,function=1,reg=0x90).
May 09 12:13:43.096 CPU0: PCI: write request (data=0xc0000000) at pc=0x6029b610:
bus=0,device=0,function=1,reg=0x90
May 09 12:13:43.096 CPU0: PCI: write request (data=0xc0000000) for unknown devic
e at pc=0x6029b610 (bus=0,device=0,function=1,reg=0x90).
May 09 12:13:43.096 CPU0: PCI: write request (data=0xe0000000) at pc=0x6029b60c:
bus=0,device=0,function=1,reg=0x14
May 09 12:13:43.096 CPU0: PCI: write request (data=0xe0000000) for unknown devic
e at pc=0x6029b60c (bus=0,device=0,function=1,reg=0x14).
May 09 12:13:43.096 CPU0: PCI: write request (data=0xe0000000) at pc=0x6029b610:
bus=0,device=0,function=1,reg=0x14
May 09 12:13:43.096 CPU0: PCI: write request (data=0xe0000000) for unknown devic
e at pc=0x6029b610 (bus=0,device=0,function=1,reg=0x14).
May 09 12:13:43.096 CPU0: PCI: write request (data=0xe0000000) at pc=0x6029b60c:
bus=0,device=0,function=1,reg=0x94
May 09 12:13:43.096 CPU0: PCI: write request (data=0xe0000000) for unknown devic
e at pc=0x6029b60c (bus=0,device=0,function=1,reg=0x94).
May 09 12:13:43.096 CPU0: PCI: write request (data=0xe0000000) at pc=0x6029b610:
bus=0,device=0,function=1,reg=0x94
May 09 12:13:43.096 CPU0: PCI: write request (data=0xe0000000) for unknown devic
e at pc=0x6029b610 (bus=0,device=0,function=1,reg=0x94).
May 09 12:13:43.097 CPU0: IO_FPGA: write to unknown addr 0x32, value=0x40, pc=0x
602983dc (size=2)
May 09 12:13:43.097 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x602b1138 (s
ize=2)
May 09 12:13:43.097 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x602b1164 (s
ize=2)
May 09 12:13:43.097 CPU0: IO_FPGA: write to unknown addr 0x16, value=0x0, pc=0x6
02b1178 (size=2)
May 09 12:13:43.260 CPU0: MTS: read access to undefined address 0x3c080000 at p
c=0x602b11ac (size=1)
May 09 12:13:43.291 ROM: unhandled syscall 0x0000003e at pc=0x60aaa174 (a1=0x000
00000,a2=0x020ac7a0,a3=0x65955e68)

May 09 12:13:43.291 ROM: unhandled syscall 0x00000047 at pc=0x60aaa174 (a1=0x000

0c100,a2=0x020ac7a0,a3=0x65955e68)
May 09 12:14:04.177 CPU0: JIT: partial JIT flush (count=182)
May 09 12:14:04.228 CPU0: JIT: flushing data structures (compiled pages=224)
May 09 12:14:04.267 ROM: trying to read bootvar 'BOOT'
May 09 12:14:04.267 ROM: trying to read bootvar 'CONFIG_FILE'
May 09 12:14:04.267 ROM: trying to read bootvar 'BOOTLDR'
May 09 12:14:04.267 ROM: trying to read bootvar 'RSHELF'
May 09 12:14:04.267 ROM: trying to read bootvar 'DSHELF'
May 09 12:14:04.267 ROM: trying to read bootvar 'DSHELFINFO'
May 09 12:14:04.267 ROM: trying to read bootvar 'RESET_COUNTER'
May 09 12:14:04.267 ROM: trying to read bootvar 'CHRG_LOCRECSN'
May 09 12:14:04.267 ROM: trying to read bootvar 'CHRG_ID'
May 09 12:14:04.267 ROM: trying to read bootvar 'SLOTCACHE'
May 09 12:14:04.267 ROM: trying to read bootvar 'OVERTEMP'
May 09 12:14:04.267 ROM: trying to read bootvar 'DIAG'
May 09 12:14:04.267 ROM: trying to read bootvar 'WARM_REBOOT'
May 09 12:14:04.275 CPU0: JIT: partial JIT flush (count=169)
May 09 12:14:04.310 CPU0: JIT: flushing data structures (compiled pages=229)
May 09 12:14:04.467 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x6080d3ec (s
ize=2)
May 09 12:14:04.467 CPU0: MTS: read access to undefined address 0x3c080022 at p
c=0x6080cfd8 (size=1)
May 09 12:14:04.467 CPU0: MTS: read access to undefined address 0x3c080023 at p
c=0x6080d060 (size=1)
May 09 12:14:04.467 CPU0: MTS: write access to undefined address 0x3c080023 at p
c=0x6080d06c, value=0x00000000 (size=1)
May 09 12:14:04.467 CPU0: MTS: read access to undefined address 0x3c080023 at p
c=0x6080d078 (size=1)
May 09 12:14:04.467 CPU0: MTS: write access to undefined address 0x3c080023 at p
c=0x6080d084, value=0x00000080 (size=1)
May 09 12:14:04.467 CPU0: MTS: read access to undefined address 0x3c000002 at p
c=0x6080ee7c (size=1)
May 09 12:14:04.467 CPU0: MTS: write access to undefined address 0x3c000002 at p
c=0x6080ee84, value=0x00000080 (size=1)
May 09 12:14:04.467 CPU0: MTS: read access to undefined address 0x3c000002 at p
c=0x6080ee88 (size=1)
May 09 12:14:04.513 CPU0: MTS: read access to undefined address 0x3c000002 at p
c=0x6080eeb0 (size=1)
May 09 12:14:04.571 CPU0: MTS: read access to undefined address 0x3c000002 at p
c=0x6080eeb0 (size=1)
May 09 12:14:04.638 CPU0: MTS: read access to undefined address 0x3c000002 at p
c=0x6080eeb0 (size=1)
May 09 12:14:04.699 CPU0: MTS: read access to undefined address 0x3c000002 at p
c=0x6080eeb0 (size=1)
May 09 12:14:04.761 CPU0: MTS: read access to undefined address 0x3c000002 at p
c=0x6080eeb0 (size=1)
May 09 12:14:04.820 CPU0: MTS: read access to undefined address 0x3c000002 at p
c=0x6080eeb0 (size=1)
May 09 12:14:04.820 CPU0: MTS: write access to undefined address 0x3c080007 at p
c=0x6080d168, value=0x00000002 (size=1)
May 09 12:14:04.820 CPU0: MTS: write access to undefined address 0x3c080008 at p
c=0x6080d16c, value=0x00000002 (size=1)
May 09 12:14:04.820 CPU0: MTS: write access to undefined address 0x3c080009 at p
c=0x6080d170, value=0x00000002 (size=1)
May 09 12:14:04.820 CPU0: MTS: write access to undefined address 0x3c08000a at p
c=0x6080d174, value=0x00000002 (size=1)
May 09 12:14:04.820 CPU0: MTS: write access to undefined address 0x3c08000b at p
c=0x6080d178, value=0x00000002 (size=1)
May 09 12:14:04.820 CPU0: MTS: write access to undefined address 0x3c08000c at p

c=0x6080d17c, value=0x00000002 (size=1)

May 09 12:14:04.821 CPU0: MTS: read access to undefined address 0x3c080022 at p
c=0x6080dfe4 (size=1)
May 09 12:14:04.848 CPU0: JIT: partial JIT flush (count=182)
May 09 12:14:04.887 CPU0: JIT: flushing data structures (compiled pages=239)
May 09 12:14:05.194 CPU0: JIT: partial JIT flush (count=182)
May 09 12:14:05.311 CPU0: IO_FPGA: write to unknown addr 0x34, value=0x33, pc=0x
6028cff0 (size=2)
May 09 12:14:05.319 CPU0: JIT: flushing data structures (compiled pages=235)
May 09 12:14:05.374 CPU0: JIT: partial JIT flush (count=196)
May 09 12:14:05.416 CPU0: JIT: flushing data structures (compiled pages=235)
May 09 12:14:05.469 CPU0: JIT: partial JIT flush (count=198)
May 09 12:14:05.523 CPU0: JIT: flushing data structures (compiled pages=255)
May 09 12:14:05.598 CPU0: JIT: partial JIT flush (count=184)
May 09 12:14:05.640 CPU0: JIT: flushing data structures (compiled pages=251)
May 09 12:14:05.890 CPU0: JIT: partial JIT flush (count=161)
May 09 12:14:05.919 CPU0: JIT: flushing data structures (compiled pages=251)
May 09 12:14:05.969 CPU0: JIT: partial JIT flush (count=185)
May 09 12:14:06.008 CPU0: JIT: flushing data structures (compiled pages=247)
May 09 12:14:06.056 CPU0: JIT: partial JIT flush (count=193)
May 09 12:14:06.150 CPU0: JIT: flushing data structures (compiled pages=259)
May 09 12:14:06.199 CPU0: JIT: partial JIT flush (count=195)
May 09 12:14:06.247 CPU0: JIT: flushing data structures (compiled pages=260)
May 09 12:14:06.298 CPU0: JIT: partial JIT flush (count=179)
May 09 12:14:06.343 CPU0: JIT: flushing data structures (compiled pages=260)
May 09 12:14:06.414 CPU0: JIT: partial JIT flush (count=193)
May 09 12:14:06.481 CPU0: JIT: flushing data structures (compiled pages=259)
May 09 12:14:06.712 CPU0: JIT: partial JIT flush (count=121)
May 09 12:14:06.737 CPU0: JIT: flushing data structures (compiled pages=258)
May 09 12:14:06.849 CPU0: JIT: partial JIT flush (count=173)
May 09 12:14:07.173 CPU0: JIT: flushing data structures (compiled pages=255)
May 09 12:14:07.202 ROM: trying to read bootvar 'PMDEBUG'
May 09 12:14:07.215 ROM: trying to read bootvar 'MONDEBUG'
May 09 12:14:07.261 CPU0: JIT: partial JIT flush (count=194)
May 09 12:14:07.378 CPU0: JIT: flushing data structures (compiled pages=260)
May 09 12:14:07.700 CPU0: JIT: partial JIT flush (count=187)
May 09 12:14:07.837 CPU0: JIT: flushing data structures (compiled pages=264)
May 09 12:14:07.898 ROM: unhandled syscall 0x0000001a at pc=0x60aaa174 (a1=0x666
5c30c,a2=0x0000001c,a3=0x65458cd8)
May 09 12:14:07.898 ROM: unhandled syscall 0x00000009 at pc=0x60aaa174 (a1=0x666
5c30c,a2=0x0000001c,a3=0x65458cd8)
May 09 12:14:07.922 CPU0: JIT: partial JIT flush (count=182)
May 09 12:14:07.979 CPU0: JIT: flushing data structures (compiled pages=263)
May 09 12:14:08.036 CPU0: JIT: partial JIT flush (count=196)
May 09 12:14:08.073 CPU0: JIT: flushing data structures (compiled pages=264)
May 09 12:14:08.107 CPU0: JIT: partial JIT flush (count=204)
May 09 12:14:08.160 CPU0: JIT: flushing data structures (compiled pages=265)
May 09 12:14:08.233 CPU0: JIT: partial JIT flush (count=191)
May 09 12:14:08.262 CPU0: JIT: flushing data structures (compiled pages=249)
May 09 12:14:08.295 CPU0: JIT: partial JIT flush (count=205)
May 09 12:14:08.322 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x6080d3b0 (s
ize=2)
May 09 12:14:08.322 CPU0: IO_FPGA: write to unknown addr 0x16, value=0x1, pc=0x6
080d3b8 (size=2)
May 09 12:14:08.337 ROM: trying to read bootvar 'ROM_PERSISTENT_UTC'
May 09 12:14:08.353 CPU0: JIT: flushing data structures (compiled pages=267)
May 09 12:14:08.448 CPU0: JIT: partial JIT flush (count=187)
May 09 12:14:08.496 CPU0: JIT: flushing data structures (compiled pages=261)
May 09 12:14:08.555 CPU0: JIT: partial JIT flush (count=193)
May 09 12:14:08.610 CPU0: JIT: flushing data structures (compiled pages=258)

May
May
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May
May
May
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May
May
May
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May
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May
May
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May

09
09
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12:14:08.904
12:14:08.940
12:14:08.985
12:14:08.997
12:14:08.998
12:14:08.998
12:14:09.024
12:14:09.029
12:14:09.721
12:14:13.447
12:14:19.012
12:14:26.807
12:14:33.442
12:15:07.955
12:15:42.041
12:15:42.043
12:16:08.908
12:17:07.944
12:17:26.235
12:18:07.974
12:19:07.978
12:20:07.935
12:20:09.950
12:21:07.974
12:22:07.970
12:23:02.145
12:23:09.039

CPU0: JIT: partial JIT flush (count=183)

CPU0: JIT: flushing data structures (compiled pages=269)
CPU0: JIT: partial JIT flush (count=193)
ROM: trying to set bootvar 'BSI=0'
ROM: trying to read bootvar 'RET_2_RCALTS'
ROM: trying to set bootvar 'RET_2_RCALTS='
ROM: trying to read bootvar 'RANDOM_NUM'
CPU0: JIT: flushing data structures (compiled pages=268)
CPU0: JIT: partial JIT flush (count=184)
CPU0: JIT: flushing data structures (compiled pages=264)
CPU0: JIT: partial JIT flush (count=178)
CPU0: JIT: flushing data structures (compiled pages=265)
CPU0: JIT: partial JIT flush (count=176)
CPU0: JIT: flushing data structures (compiled pages=264)
ROM: trying to set bootvar 'RANDOM_NUM=2085411425'
CPU0: JIT: partial JIT flush (count=151)
CPU0: JIT: flushing data structures (compiled pages=264)
CPU0: JIT: partial JIT flush (count=125)
CPU0: JIT: flushing data structures (compiled pages=265)
CPU0: JIT: partial JIT flush (count=148)
CPU0: JIT: flushing data structures (compiled pages=265)
CPU0: JIT: partial JIT flush (count=127)
CPU0: JIT: flushing data structures (compiled pages=264)
CPU0: JIT: partial JIT flush (count=128)
CPU0: JIT: flushing data structures (compiled pages=265)
CPU0: JIT: partial JIT flush (count=131)
CPU0: JIT: flushing data structures (compiled pages=265)