Practical

Session V: FSK transceiver.

Laboratory of electronic communications.
5th Year. Telecommunication Engineering.

Ana Ortega Gil 100066940 Marcos del Bas Junquera 100072617

Practical Session V: FSK transceiver. 2012

Combined transmitter and receiver interconnection 5.3 diagram. transmitter and receiver interconnection diagram Combined

Figure 2 Interconnection of the transmitter and the receiver The goal of this practice is to implement an FSK transceiver using the DSP TMS320C6713

development boards. The binary source will be the function generator. The FSK is a The second part of the practical session requires two DSP boards interconnected frequency modulation scheme in which digital information is transmitted through (one for transmission, one for reception), as shown in Figure 2. The bit source (function discrete connected to the transmitter board and the FSK-modulated the 1, generator) isfrequency changes of the carrier wave. In this concrete case, to output is aka mark in the oscilloscope. The jack/jack cable is used for transmitting the FSK displayed frequency, corresponds a value of 14kHz and the space frequency or frequency assigned to receiver a value of receiver board output is connected to the symbols to thethe 0 hasboard. The 10kHz. According to these premises, our output is oscilloscope. ransmitter The FSK transmitter output is given fby+ y(t)*= cos(2 * " ( f 0 +f#fis*the , where f 0 is the output is given by y(t) = cos(2 * " ( 0 #f s[n])) , where 0 where iss[n])) 4kHz. given by: for symbol 0, s[n] is the symbol to beis the symbol to be transmitted at discrete-time instant frequency for symbol 0, s[n] transmitted at discrete-time instant the sampling period. the sampling period. t=nT, T is Description NOT CONNECT THE OUTPUTS OF THE TWO DSPs, AS CAUTION: DO of the Practical Work ! ! ! ! r frequencies must be set to f 0 =THIS WOULD f 0f1== f 0 + "f = 0 and f1 = 1. + "f = 14Khz for 1. 10Khz for 0 to The carrier frequencies must be set and SERIOUSLY 14Khz for f 0THEM 10Khz for DAMAGE
FSK TRANSMITTER.

5.4 5.4.1.1 Practical work .1.1 Carrier generation Carrier generation CARRIER GENERATION AND FSK MODULATION SUBSYSTEM. ! ! ! ! Designed coefficients: unstable IIR filter is FSKto generate the used wave (Figure 4). wave (Figure 4). used transmitter An unstable IIR filter is sine to generate the sine 5.4.1
fc=10 program The first part of this practice proposes to kHz _Aan fc=14 transmitter, whose FSK kHz _B rad 0.417 block diagram is shown in Figure 3. 0.417 K1 C 0.5156 0.9662 0.5156 0.9662

In order to implement both carriers, some modifications were introduced over the original code for ask modulation, namely:

Figure 4 Carrier generation through Figure 3 Block diagram of the FSK transmitter an unstable through Figure 4 Carrier generation IIR filteran unstable IIR filter

the system shown in Figure 4 shown in Figurey[n-1]!0 or y[n-2]!0, the or y[n-2]!0, the If the system is excited with 4 is excited with y[n-1]!0 n] is a sine wave. In your code, y[n] should be stored as sinx and y[n-1]

Practical Session V: FSK transceiver. 2012

Duplicated variables:
/* * EXTRA: Pressing DIP switch #3 changes LED #3 from off to on. */ int active_led = 0; //Coefficients for symbol 0 float K1_A=0.5176; float Sin_A=0; float C_A=0.9659; float Y2_A=0; //Coefficients for symbol 1 float K1_B=-0.5176; float Sin_B=0; float C_B=0.9659; float Y2_B=0;

Received signal processing :

void procRXInt(void) { Uint32 Channel=0; Int32 Output=0; float Acumulador =0; Int32 Symbol = 0; DSK6713_AIC23_read(hCodec,&Channel); Acumulador = 0.0; if ( ! flag ){ //Carrier at 10Khz Symbol = ( Channel & 0x8000 ) == 0; Acumulador = K1_A*Sin_A-Y2_A; Y2_A = Sin_A; Sin_A = Acumulador; //Carrier at 14Khz Acumulador = K1_B*Sin_B-Y2_B; Y2_B = Sin_B; Sin_B = Acumulador; Output = Symbol ? Sin_B * 16384 : Sin_A * 16384; //Output = Sin_B * 16384; } else { Output = Channel; } flag = !flag; DSK6713_AIC23_write(hCodec,Output); }

Practical Session V: FSK transceiver. 2012

Main initializations: /* Initialize the LED and DIP switch modules of the BSL */ DSK6713_LED_init(); DSK6713_DIP_init(); active_led=0; Sin_A = C_A; Sin_B = C_B; Once the code was built and the board programmed, we set up, using the signal generator, a squared input signal with amplitude of 1Vp and with multiple frequencies (700Hz, 1kHz, 2kHz) in order to completely characterized the behavior of the modulator. We noticed that below 700Hz or above 2kHz, the DSP was not able to correctly determine the transmitted symbol. At 1kHz, the output amplitude was 1.54Vpp. The following pictures illustrates the shapes of the signal at 1kHz:

Remark the changes of frequency tracking the input information. The presence of a switching ripple can be appreciated in all cases and it is due to the zero-cross frequency.
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Practical Session V: FSK transceiver. 2012

FSK RECEIVER IMPLEMENTATION RCVR BLOCK DIAGRAM.

The following sketch tries to identify the shape transformations applied to the

Figure 5 Block diagram of the FSK receiver

received signal block by block, before acquiring the information sent by the transmitter. Limiter 5.4.2.1

The FSK received signal is processed by the following elements:

The limiter transforms the input into a sequence of 1s and -1s (or zeros).

5.4.2.2 Differentiator
The differentiator neighbouring samples. extracts the frequency information by subtracting

5.4.2.3 Rectifier
The rectifier prepares the previously obtained samples before their subsequent filtering, by taking their absolute value. After the rectifier, the difference between the carrier frequencies will be given by more or less spacing between positive samples.

5.4.2.4 Filtering
The filter calculates the average of the last K (K= number of filter coefficients) samples of the rectified signal.
a.) Implement a rectangular filter (constant-coefficient filter), which simply

Regarding a he filter, we are asked to consider two frequencycases, between the two b.) Use t low-pass FIR filter whose cut-off different lies which provide two different sets of coefficients. On one hand, a constant-coefficient or carrier frequencies. This way, you will generate an output close to zero if the rectangular filter ifrequencyor computing the average filter coefficientsutput be generated upper s chosen f was transmitted. The fir of the rectifiers o may signal. with the MATLAB function fir1. The coefficients were computed by Matlab, running the command (rectwin(17)/17)*2^15. On the other hand, desiring an an output close to zero if the A program with the following structure should be implemented: upper frequency was transmitted, we design a LPF whose coefficients were also * FSK RECEIVER generated by Matlab and carrier-frequency dependant:fir1(16,f/24000,low); ans*2^15;round(ans).The cut-off frequency shall lie between the maximum bit

takes the average.

rate and the cross-zero **** **** Implement frequency.

// Limiter IMPLEMENTATION: CODE. Implement **** ****

// Read data from codec register and store in memory

#include "dsk6713.h" // "dsk6713_led.h" #include Differentiate **** Implement **** #include "dsk6713_dip.h" #include Rectifier // "dsk6713_aic23.h" #include <csl_irq.h> **** Implement **** /* // - Main code routine, initializes BSL and runs LED * main() Filter // stores result in first element of FIR buffer application weight and add all elements of FIR buffer // */ // shifts elements of FIR buffer /* **** Implement **** * EXTRA: Pressing DIP switch #3 changes LED #3 from off to on. */ // Store result in output int active_led=0; **** **** Implement
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Practical Session V: FSK transceiver. 2012

/* * Configuracion del AC23 * */ DSK6713_AIC23_Config config = { 0x0017, // 0 DSK6713_AIC23_LEFTINVOL Left line input channel volume 0x0017, // 1 DSK6713_AIC23_RIGHTINVOL Right line input channel volume 0x00d8, // 2 DSK6713_AIC23_LEFTHPVOL Left channel headphone volume 0x00d8, // 3 DSK6713_AIC23_RIGHTHPVOL Right channel headphone volume 0x0011, // 4 DSK6713_AIC23_ANAPATH Analog audio path control 0x0000, // 5 DSK6713_AIC23_DIGPATH Digital audio path control 0x0000, // 6 DSK6713_AIC23_POWERDOWN Power down control 0x0043, // 7 DSK6713_AIC23_DIGIF Digital audio interface format 0x0001, // 8 DSK6713_AIC23_SAMPLERATE Sample rate control 0x0001 // 9 DSK6713_AIC23_DIGACT Digital interface activation }; DSK6713_AIC23_CodecHandle hCodec; Int16 buffer0[] ={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; Int16 coefs_ch0[]={ 69, 170, 456, 1001, 1797, 2734, 3629, 4274, 4509, 4274, 3629, 2734, 1797, 1001, 456, 170, 69 }; int buffer_len = 17; int buffer0_pos=0; int buffer1_pos=0; int flag=0; Int32 sign = 8192; Int32 LastData = 0; void void void void { call */ DSK6713_init(); /* Initialize the LED and DIP switch modules of the BSL */ DSK6713_LED_init(); DSK6713_DIP_init(); init_hwi(); rotate_leds(); initIrq(); main() /* Initialize the board support library, must be first BSL

Practical Session V: FSK transceiver. 2012

active_led=0; buffer0_pos=0; buffer1_pos=0; IRQ_globalDisable(); // Disable global interrupts during setup //CODEC Initialization hCodec = DSK6713_AIC23_openCodec(0, &config); DSK6713_AIC23_setFreq(hCodec,DSK6713_AIC23_FREQ_48KHZ); initIrq(); IRQ_globalEnable(); // Disable global interrupts during setup } void rotate_leds() { int next_led=active_led; next_led=(active_led+1) % 4; DSK6713_LED_on(next_led); DSK6713_LED_off(active_led); active_led=next_led; } void initIrq() { /* Enable RXTX interrupts to the CPU */ IRQ_clear(IRQ_EVT_RINT1); // Clear any pending RX interrupts IRQ_enable(IRQ_EVT_RINT1); // Enable RX interrupt } void procRXInt(void) { Uint32 Channel=0; Int32 Output=0; Int32 Acumulador =0; Int32 Symbol = 0; Int32 limiter = 0; Int32 differentiator = 0; Int32 rectifier=0; Int16 acum; int c; DSK6713_AIC23_read(hCodec,&Channel); Acumulador = 0; if ( ! flag ){ LastData = Channel; //*****Limiter******* //We obtain the sign of the data and put it to +1 or -1 Symbol = ((Channel & 0x8000 ) == 0); limiter = (Symbol ? (2048) : (-2048)); //*****Differentiator****** //take from consecutive samples the values. differentiator = (limiter-sign); sign = limiter; //*****Rectifier****** //absolute value of the signal rectifier =(float)abs(differentiator); //*****Filtering******

Practical Session V: FSK transceiver. 2012

//Acumulador = Acumulador >> 17; buffer0[0]=rectifier; Acumulador = 0; for (c=buffer_len-1 ; c>0 ; c--){ Acumulador += buffer0[c]*coefs_ch0[c]; buffer0[c] = buffer0[c-1]; } Acumulador += buffer0[0]*coefs_ch0[c]; Acumulador = Acumulador >> 9; } else { Acumulador = LastData; } Output = Acumulador; flag = !flag; DSK6713_AIC23_write(hCodec,Output); }

Practical Session V: FSK transceiver. 2012

EXPERIMENTAL RESULTS. The testing function had the following characteristics:

Playing around with some desgin parameters we achieve noticeable improvements, namely :

Fsk rate fixed to 100bps produced a sharp slope in the signals.

Fsk rate fixed at 1kbps filter rising and falling delays resulted too slow.

Practical Session V: FSK transceiver. 2012

With the filter coefficients scaled by 32767 the ripple due to the zero crossing frequency was remarkably high. It arises the need to filter it with a low pass whose cut off frequency lies between the max bit rate (14Khz 10 KHz =4kHz 2kbps) and the zero-crossing frequency (rather freq1=2x10Khz or zero crossing freq2=14Khzx2). Therefore our initial choice was a cut off frequency equal to10Khz. It shall be normalized with respect to the 48KHz sampling frequency.

Higher values of coefficients combined with low level accumulator translated into a risk of overflow. This is the reason why we opted to divide Acumulador (12M) by a value higher than 128 (7) to avoid overflow. It was a matter of error and try. Noise was still present after dividing by 12.

Practical Session V: FSK transceiver. 2012

The selected cut off frequency (10khz) seemed too high. Nicer output signal was retrieved with 5khz and even better lowering the cut-off to 2.5khz. This was the case since the testing bit rate was the one from the function generator. Indeed, we achieved the filtering behaviour expected. And the bit rate could be increased to 1.5kbps and still behaves as desired. Because of the lack of time we could not tuned further.

At the hard decisor block and with the high pass filter in the output, if the threshold was set above 0, the signal got clearer.

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