OVM Methodology

March09

What is OVM??

Open Verification Methodology is combine effort from Mentor Graphics (AVM) and Cadence (URM).

Uses the best practices of AVM and URM.

Provides the structure and libraries of base class which user can use to create modular, reusable verification environment in which component talk through TLM.

Class Hierarchy in OVM Objects

OVM Features

Provides reusable components (base class libraries) Use TLM interface communication between different components Data Design : Infrastructure for class property abstracting and
simplifying the user code for setting, getting, and printing (text and gui) property variables

Stimulus Generation: Provide control for random stimulus generation.

OVM Features

Coverage Driven Verification Provide base classes for each functional aspect of verification environment. Provides inbuilt report properties for unified reporting and messages. Implements OOP Factory method.

OVM Verification Components (OVC)

OVC is encapsulated, ready-to-use, configurable verification environment

Following are the building blocks of OVM:

Data Item(ovm_transaction/ovm_sequence_item) Represents Inputs to DUT.

Can be randomized and constrained. Ovm_sequence_item inherits from ovm_transaction Adds a property other than inherited one Sequencers and Drivers use ovm_sequence_item

OVM Verification Components (OVC)

Driver (ovm_driver)

Drivers role is to drive the data items to the bus following interface protocol Gets transactions from sequencer. Derive pins at the DUT (using interface) and based on the transaction received.

Sequencer (ovm_sequencer)

Advanced stimulus generator, controls the data items that are provided to driver By default, is a simple stimulus generator that provide random data transaction to driver a sequencer captures important randomization requirements outof-the-box

OVM Verification Components (OVC)

Monitor (ovm_monitor)

Is a passive entity that samples the DUT signals. Can includes coverage information and protocol checkers. Creates a trancation and send it to other components (scoreboard, coverage collectors etc) Check status information and events

Agent (ovm_agent)

Encapsulate driver, monitor and sequencer. Has an active mode and passive mode (is_active). Passive agent only monitors DUT. Should be configurable so that they can be made active/passive

OVM Verification Components (OVC)

Environment (ovm_env)

Encapsulates a number of drivers, monitors, agents, scoreboards. Has properties to customize its components behavior (eg changing an agent from active to passive) Environments can be hierarchical and contain more env.

OVM Verification Components (OVC)

Typical Verification Environment using OVC

TLM

Defines Semantics/Behaviors for communicating transaction between components. Provides Transfer of Transactions thru standard interfaces

Ports: Defines the set of Methods (API) to be used for a particular connection . Export: Supplies the implementation of those methods. Imp: Provides implementations of the methods in tlm_if_base to Ports and exports if they require it.

TLM

TLM Components
ovm_port_base

ovm_*_export

ovm_*_port

ovm_*_imp

tlm_fifo

tlm_req_resp_channel

analysis_fifo

tlm_transport_channel

TLM

Uni-directional Interfaces

Put, get, peek, get_peek, analysis

Bi-directional Interfaces

Master, slave, transport

tlm_fifo, analysis_fifo tlm_req_resp_channel, tlm_transport_channel

Channels

TLM example

Producer

tlm_fifo

Consumer

class producer extends ovm_component; ovm_blocking_put_port #( int ) put_port; task run(); for( int i = 0; i < 10; i++ ) begin $display("about to put %d",i); put_port.put( i ); end endtask; endclass

class consumer extends ovm_component; ovm_blocking_get_port #( int ) get_port; task run(); for( int i = 0; i < 10; i++ ) begin $display(Just got %d",i); get_port.get( i ); end endtask; endclass

TLM example
class env; producer p = new; consumer c = new; tlm_fifo #( int ) f = new; function void connect; p.put_port = f.blocking_put_export; c.get_port = f.blocking_get_export; endfunction endclass

Structure of OVM Test-Bench

ovm_test

Individual test-cases inherit from this class. Each test-case instantiates environments and configures them. Top level TB instantiates interfaces that connect to DUT. Instantiate DUT Call run_test()

Test-Bench

+OVM_TESTNAME = (select which ovm_test class to instantiate and run Run_test() is a method from ovm_root that is automatically instantiated.