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    Additional Clock Source For Ccge

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    silver8700
    The document discusses clock source and distribution for an MSC commissioning guide. It explains that a central clock generator (CCG) is vital for synchronizing digital network operations and ensures a reliable, precise clock supply. The CCG has a master and slave configuration for redundancy. The commissioning procedure involves checking cable connections and diagnosing any defects. It also covers CCG parameters and configuration, including reference clock priority levels and clock types.

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    Additional Clock Source For Ccge

    Uploaded by

    silver8700
    42 views13 pages
    The document discusses clock source and distribution for an MSC commissioning guide. It explains that a central clock generator (CCG) is vital for synchronizing digital network operations and ensures a reliable, precise clock supply. The CCG has a master and slave configuration for redundancy. The commissioning procedure involves checking cable connections and diagnosing any defects. It also covers CCG parameters and configuration, including reference clock priority levels and clock types.

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    Additional Clock Source for Ccge

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    The document discusses clock source and distribution for an MSC commissioning guide. It explains that a central clock generator (CCG) is vital for synchronizing digital network operations and ensures a reliable, precise clock supply. The CCG has a master and slave configuration for redundancy. The commissioning procedure involves checking cable connections and diagnosing any defects. It also covers CCG parameters and configuration, including reference clock priority levels and clock types.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PPTX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as pptx, pdf, or txt
    42 views13 pages

    Additional Clock Source For Ccge

    Uploaded by

    silver8700
    The document discusses clock source and distribution for an MSC commissioning guide. It explains that a central clock generator (CCG) is vital for synchronizing digital network operations and ensures a reliable, precise clock supply. The CCG has a master and slave configuration for redundancy. The commissioning procedure involves checking cable connections and diagnosing any defects. It also covers CCG parameters and configuration, including reference clock priority levels and clock types.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PPTX, PDF, TXT or read online from Scribd
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    of 13

    CLOCK SOURCE AND DISTRIBUTION

    MSC COMMISIONING GUIDE


    BY SATRYA NUGROHO

    Introduction
    In order to switch and transmit digital information, the sequence of operations must be synchronous throughout the equipment involved. This requires a clock supply with a high level of reliability, precision and consistency for all the nodes in the digital network. In a D900 system this task is fulfilled by the central clock generator (CCG). In view of its vital role, the central clock generator is duplicated. One is always switched as active and is called the master, while the other one is standby and is called the slave. This ensures that in the event of a malfunction or failure affecting the master CCG, the master/slave roles can be switched over immediately and automatically and that the clock supply to the connected subsystems continues uninterrupted

    Central Clock Generator clock distribution

    hardware

    Commisioning procedure

    Commisioning procedure

    Commisioning procedure

    Commisioning procedure

    Commisioning procedure
    Make sure that all connection is correct If ccg module is UNA, we must chek the connection between ccg-iopmb Performing diagnose on IOPMB can find the defected cable

    Reference Clock Priority

    Input reference
    DISPCCGPAR:CCG=0,DATA0=12,DATA1=00,DATA2=00,DATA3=00;

    Output :
    CCG-PARAMETER : H'12128888

    MODCCGPAR:CCG=1,DATA0=12,DATA1=mn,DATA2=op, DATA3=qr;
    m = Priority/status for reference clock 1 n = Priority/status for reference clock 2 Data2 = op o = Priority/status for reference clock 3 p = Priority/status for reference clock 4 Data3= qr q = Priority/status for GPS receiver (module not existing up to now!) r = Priority/status for Rubidium reference clock (module not existing up to now!) Possible values for each half of byte m, n, o, p, q and /or = 0 no modification = 1 highest priority = 2...6 priority level = 7 lowest priority = 8 disabled Data1 = mn

    Check of CCGE with DISP CCG


    Reference Frequency 0 displays R1 and R3 of CCGE. Reference Frequency 1 displays R2 and R4 of CCGE.

    Clock type
    DISPCCGPAR:CCG=0,DATA0=15,DATA1=00,DATA2=00,DATA3=00;
    4493 OMT-00/SYSTEM#1 3080/02759 HF.ALLINONE-32112 DISPCCGPAR:CCG=0,DATA0=15,DATA1=00,DATA2=00,DATA3=00; EXEC'D MESSAGE FROM CCG-0 CCG-PARAMETER : H'15010000 END JOB 4493 MODCCGPAR:CCG=1,DATA0=15,DATA1=mm,DATA2=73,DATA3=B1; with: mm = clock type and AFR Mode = 01 G.812 Type I, AFR = 1 x 10 E-8 = 02 G.812 Type I, AFR = 2 x 10 E-7 = 03 G.812 Type I, AFR = 5 x 10 E-6 = 04 Stratum 3 E, AFR = 5 x 10 E-6 (ANSI standard) = 05 Stratum 3, AFR = 5 x 10 E-6 (ANSI standard)

    Output :

    TERIMA KASIH
    SALAM SENYUM

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