Flip-flop

Clock input
Master-Slave Flip-flop
Edge-triggerred Flip-flop
1
Clock input
Flip-flops are made from gated latches (latches with
control input).

The state of a flip-flop is switched by a momentary
change in control input known as clock.

A flip-flop may response to produce output based on 3
types of clock signal:
1)Positive level trigger
2)Positive edge trigger
3)Negative edge trigger.

2
3
Figure of Clock Signals
Positive level response allows changes in the output when the
input changes while the clock pulse stays at logic 1

Problem may occur when more than 1 changes happen at the
input signal and output will keep on changing following the
input signal as long as the trigger signal still stay in positive
level.

This cause confusion and therefore positive level triggering is
less preferred. On the other hand, edge triggering is more
commonly used.

For positive edge response/triggering, the output will change
according to the input only during the positive transition of
trigger signal.

For negative edge response/triggering, the output will
change according to the input only during the negative edge
of trigger signal.
4
Edge-triggered Flip-flop
There are 2 ways to construct an edge triggered flip-
flop:

Master-Slave configuration

Efficient arrangement of gated latch

5
Edge-triggered D flip-flop
D flip-flop is constructed with 2 D latches and an
inverter (Master-Slave)









6
When CLK (clock) is 1, master D latch is enabled
but slave D latch is disabled. Input (D) will be
transferred to Y. Y output will change whenever
input D changes at this condition.

When CLK changes to 0, slave D latch is enabled
but master D latch is disabled. Data at Y will be
transferred to Q.

As a result, this edge-triggered D flip-flop is actually
a negative edge-triggered D flip-flop. (change in the
output during transition from 1 to 0 )

7
Characteristic (next state) equation for D Flip-flop
Q(t+1) = Q* = D

Characteristic (truth, function) table,


8
Edge-triggered D flip-flop using 3 SR latches ,










9
Operation of the D Flip-flop
If D = 0, when CLK becomes 1, R 0, Q 0, flip-
flop is reset. If there are further changes in the
input, R remains as 0. (The flip-flop is locked out).
During D = 0 and CLK return to 0, R 1 but
output remain unchanged (Q = 0).
If D = 1 when CLK becomes 1, S 0, Q 1, flip-
flop is set. If there are further changes in the input,
S remains as 1. (The flip-flop is locked out).
During D = 1 and CLK return to 0, S 1 but
output remain unchanged (Q = 1).
As a result, this edge-triggered D flip-flop is actually
a positive edge-triggered D flip-flop.

10
Graphical symbol for edge D flip-flop.
11
The triangle symbol in
front of C designating
that the flip-flop
responds to edge
triggering
a) Positive edge-
triggered D flip-flop
b) Negative edge-
triggered D flip-flop
Inputs
Comments
1
CLK D
Outputs
1
Q Q
0 SET
0 0 1 RESET
Inputs
Comments
1
CLK D
Outputs
1
Q Q
0 SET
0 0 1 RESET
JK Flip-Flops
JK flip-flop is constructed by using the D flip-flop
and external logic gates.

12
There are 4 operations performed by the JK flip-
flop:
Set output to 1
Reset output to 0
Complement its previous output
Hold its previous o/p

The J input sets the flip-flop output to 1 and the K
input resets the output to 0.
When both J K inputs are 1, the output is the
complement of the previous output.

13
The expression of the circuit (next state equation),
Q* = D = JQ + KQ

The JK flip-flop characteristic table,


14
Inputs
Comments
1
1 1
1
CLK K J
Outputs
1
Q Q
Q
0
Q
0
Q
0
Q
0
0 SET
Toggle
0
0
0
0 0
1
RESET
No change
2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights
Reserved
Floyd, Digital Fundamentals, 10
th
ed
Determine the Q output for the J-K flip-flop,
given the inputs shown.
CLK
Q
K
J
CLK
K
J
Q
Q
Notice that the outputs change on the leading edge of the clock.
Set Toggle Set Latch
T Flip-Flops
The T (toggle) flip-flop is a complementing flip-flop
and can be obtained from a JK flip-flop when inputs J
and K are tied together.

The graphical symbol for T flip-flop ,

16
The expression of the T flip-flop,
Q* = D = TQ + TQ = T Q

The characteristic table,

17
Edge-triggered flip-flop timing matter
3 important timing matter need to be considered while using edge-
triggered flip-flop:

1. Setup time: Minimum time for which the D input must be
maintained at a constant value prior to the occurrence of the
clock transition.
2. Hold time: Minimum time for which the D input must not
change after the application of the positive transition of the
clock.
3. Propagation delay time: The interval time between the trigger
edge and the stabilization of the output to a new state.
Propagation delay of a gate is the average transition-delay time for
the signal to propagate from input to output when the binary
signal changes in value. Usually, propagation delay is measured in
nanoseconds (ns).

18
Direct (asynchronous) inputs
Direct inputs are useful for bringing all flip-flops in a
system to a known starting state prior the clocked
operation
Some flip-flops have asynchronous inputs that are
used to force the flip-flop to a particular state
independent of the clock.
The input that sets the flip-flop to 1 is called preset
or direct set.
The input that clears the flip-flop to 0 is called clear
or direct reset.
19
2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights
Reserved
Floyd, Digital Fundamentals, 10
th
ed
Two such inputs are normally labeled preset (PRE) and clear
(CLR). These inputs are usually active LOW. A J-K flip flop with
active LOW preset and CLR is shown.
CLK
K
J
Q
Q
PRE
CLR
2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights
Reserved
Floyd, Digital Fundamentals, 10
th
ed
Determine the Q output for the J-K flip-flop,
given the inputs shown.
CLK
K
J
Q
Q
PRE
CLR
Set Toggle
Reset
Toggle
Set
Set
Reset
Latch
CLK
K
J
Q
PRE
CLR
Sequential Logic Circuit Analysis
22
Introduction
The behavior of a synchronous sequential circuit is
determined from the inputs, the outputs and the
states of its flip-flop.
The outputs and the next state are both a function
of the inputs and the present state.
There are 3 methods to analyze a sequential circuit:
state equations, state table and state diagram.

23
State Equations
The behavior of the sequential circuit can be
expressed algebraically in Boolean expressions, which
include the necessary time sequence either directly or
indirectly.
A state equation or transition equation specifies the
next state as a function of the present state and
inputs.
The Boolean expressions for state equations can be
derived directly from the gates that from the
combinational circuit part of the sequential circuit.

24



Consider the example,
25
A* = Ax + Bx
B* = Ax
y = (A+B)x
State Equations:

A(t+1) = A(t)x(t) + B(t)x(t)
B(t+1) = A(t)x(t)
y (t) = (A(t)+B(t))x(t)
Note: Q
D
(t+1) = D(t)
Q
D
(t+1) = A(t+1)
A(t+1) = D(t)

State Table
The time sequence of inputs, outputs and flip-flop
states can be enumerated in a state table or
transition table.
There are 2 forms of state table. The difference is
the number of items in the table.
1
st
form: Table consists of present state, input, next
state and output.
2
nd
form: Table consists of present state, next state
and output.

26
By referring to the earlier example, the format of
the state table for 1
st
form as shown below;


27
A* = Ax + Bx
B* = Ax
y = (A+B)x
By referring to the earlier example, the format of
the state table for 2
nd
form as shown below;.








The input conditions are enumerated under the
next-state and output sections.
28
State Diagram
The information available in a state table can be
represented graphically in the form of a state
diagram.
Example of state diagram is shown below;

29
A state is represented by a circle and the transitions
between states are indicated by directed lines
connecting the circles
The binary number inside each circle identifies the
state of the flip-flops.
The directed lines are labeled with 2 binary numbers
separated by a slash.
The first number gives the input value during the
present state and the number after the slash gives
the output value during the present state with the
given input.

30


31
A* = Ax + Bx
B* = Ax
y = (A+B)x