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Shift Register Sequences
Shift Register Sequences
Shift Register Sequences
These circuits can also be built equivalently with XNOR states, with the dead state
being all 1s instead of all 0s.
Effects of Errors
If using a sequence of 2n-1 then there is a potential
lockup state
For XOR LFSRs, lock up state = all 0s.
For XNOR LFSRs, lock up state = all 1s.
The bit positions that affect the next state are called the taps.
( a [ n ] a [ n 4])
a [ n 4] = a [ n 3] a [ n ]
a [ n ] = a [ n + N 3] a [ n + N ]
Shift register runs backward in time
Equivalent to a shift register using taps 1 and 4 instead of taps 3 and 4
LFSR
So, how do we find the maximal length tap positions?
We look at the number of bits, .
Define = 2
LFSR
Take = 3, start state [1,0,1] with different tap positions. Left is [2,3] ( 3 + 2 + 1), right is
[1,3] ( 3 + + 1).
1 0 1
1 0 1
1 1 0
0 1 0
1 1 1
0 0 1
0 1 1
1 0 0
0 0 1
1 1 0
1 0 0
1 1 1
0 1 0
0 1 1