Software Defined Radio using

ZynQ.

Prepared By: Alok Mistry (13BEC161)

Samarth Patel (13BEC164)
Guided By:

Dr. N. P. Gajjar

Outline
Review I
Review II
System Generator with MATLAB
Designing DUC and DDC using Model Based Design

Review I
SDR Introduction
Architecture of ZynQ Zedboard
Xilinx Vivado
Accessing GPIOs on Zedboard
Working with UART
XADC Interfacing
Figure 1: ZedBoard

Review II
FMC Card Interfacing
Booting Ubuntu into Zedboard
System Generator in Simulink

Figure 2: Booting Ubuntu

System Generator with Matlab

MAC Unit
QPSK Generation
Filter Design
Figure 3: Hardware Implementation

Figure 4: Xilinx Vivado

FMC Card with ZedBoard

Dual 16 Bit 1200 MSPS DAC with
Transmitter
14 Bit 250 MSPS ADC with Receiver
Transmitting and Receiving QPSK Signal
with FMC Card.

Figure 5: FMC Card

Direct Up/Down Conversion using Model

based Design

Figure 6: Designing of QPSK System

Generating QPSK Tx and Rx Model with DUC and DDC

QPSK Generator
Generating QPSK
Signal from FPGA
Up sampling it to have
less filter order
requirement at Receiver

Figure 7: QPSK Generator

Pulse shaping Filters

Pulse shaping to reduce
bandwidth at Transmitter and
Receiver

Figure 8: Pulse Shaping Filters

DDC and DUC

At Transmitter Interpolation Filter
At Receiver Decimation Filter

Figure 9: System Generator Design of DDC and DUC

Future Work
Booting Ubuntu with QPSK Transmitter and Receiver Design
File Transfer

References
[1] L. H. Crockett, R. A. Elliot, M. A. Enderwitz and R. W. Stewart, The Zynq Book
[3] Behzad Razavi, Design Considerations for Direct Conversion IEEE
Transactions on circuits and systems. vol. 44. no. 6. JUNE 1997

Questions?

Thank You