Clockless Logic

or
How do I make hardware fast, powerefficient, less noisy, and easy-to-design?

Introduction
What is asynchronous design?
Why do we want to study it?
How is data represented in an asynchronous

system?
How is information exchanged?
2

Introduction: Clocked Digital

Design
Most current digital systems are synchronous:
Clock: a global signal that paces operation of all

components

clock

Benefit of clocking: enables discrete-time

representation
all components operate exactly once per clock
tick
component outputs need to be ready by next
clock tick
allows glitchy or incorrect outputs between clock ticks

Microelectronics Trends
Current and Future Trends: Significant
Challenges
Large-Scale Systems-on-a-Chip (SoC)

100 Million ~ 1 Billion transistors/chip

Very High Speeds

multiple GigaHertz clock rates

Explosive Growth in Consumer Electronics
demand for ever-increasing functionality
with very low power consumption (limited battery life)
Higher Portability/Modularity/Reusability
plug n play components, robust interfaces
4

Challenges to Clocked Design

Breakdown of Single-Clock Paradigm:
Chip will be partitioned into multiple timing domains

challenge: gluing together multiple timing domains

glue logic is susceptible to metastability (=incorrect values
transferred) and latency overheads

Increasing Difficulties with Clocked Design:

Clock distribution: requires significant designer effort
Performance bottleneck: a single slow component
Clock burns large fraction of chip power (~40-70%)
Fixed clock rate: poor match for
designing reusable components
interfacing with mixed-timing environments
5

What is Asynchronous Design?

Digital design with no centralized clock
Synchronization using local handshaking

clock

Synchronous System
(Centralized Control)

handshaking
interface

Asynchronous System
(Distributed Control)

Why Asynchronous Design? (1)

Higher Performance
May obtain average-case operation (not worst-case)
not limited by slowest component
Avoids overheads of multi-GHz clock distribution

Lower Power
No clock power expended
Inactive components consume negligible power
Better Electromagnetic Compatibility
Smooth radiation spectra: no clock spikes
Much less interference with sensitive receivers [e.g.,
Philips pagers, smartcards]

Greater Flexibility/Modularity
Naturally adapt to variable-speed environments
Supports reusable components
7

Why Asynchronous Design? (2)

The world already is mostly asynchronous!
Events at the level of (or in between) large-scale systems are
asynchronous
several seconds to several milliseconds
e.g., PC-printer communication, keyboard inputs, network comm.
Events at the board level (or between chips) are often

asynchronous

milliseconds to 100 nanoseconds

e.g., CPU-memory interface, interface with I/O subsystem (interrupts)
Events within a chip, at the level of functional units (e.g.,

adders, control logic) are currently synchronous

several nanoseconds to 100 picoseconds

Events at the level of a single logic gate are asynchronous

10 picoseconds
Events at the quantum level are asynchronous
picoseconds to femtoseconds

So, why bother with clocks at all?!

make everything asynchronous greater elegance and
robustness

Challenges of Asynchronous
Design
Hazards: potential glitches on wire
clock tick
clean signals
hazardous signals

no problem
problem
no
for clock
clocked
ed
for
systems
systems

communication must be hazard-free!

special design challenge = hazard-free synthesis

Testability Issues:
absence of clock means no single-stepping
Lack of Commercial CAD Tools:
chicken-and-egg problem

Asynchronous Design: Past &

Present
Async Design: In existence for 50 years, but
many recent technical advances:
Hazard-Free Circuit Design:
several practical techniques for controllers
[Stanford/Columbia]
Design for Testability:
several test solutions, e.g. Philips Research
Maturing Computer-Aided-Design (CAD) Tools:

software tools for automated design

[Philips,Columbia,Manchester]
Successful Fabricated Chips:
embedded processors, high-speed pipelines, consumer
electronics
10

Recent Commercial Interest

Several commercial asynchronous chips:
Philips: asynchronous 80c51 microcontrollers
used in commercial pagers [1998] and smartcards [2001]
Univ. of Manchester: async ARM processor [2000]
Motorola: async divider in PowerPC chip [2000]
HAL: async floating-point divider
in HAL-I and II processors [early 1990s]

Recent experimental chips:

IBM, Sun and Intel:

fast pipelines, arbiters, instruction-length decoder
IBM/Columbia/UNC: asynchronous digital FIR filter

Several recent startups:

Theseus Logic, Fulcrum, Self-Timed Solutions

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A 5-minute Homework Problem

Alice and Bob live on opposite sides of a wide river:
Alice

Bob
Alice is supposed to send a message (say, a Yes/No)
across to Bob around midnight. Both have flashlights,
but neither owns a watch. What should they do?
Suggest several strategies, and discuss pros and cons of
each.
12

Solution 1
Alice uses 2 lamps:
1 to indicate that she is ready with the message, and
1 for the message itself

Bob uses 1 lamp:

to indicate that he has received the message

go
t
it

Alice

ye
s/
no
re
ad
y

Bob
13

Solution 2
Alice uses 2 lamps:
Green lamp to indicate yes
Red lamp to indicate no

Bob uses 1 lamp:

to indicate that he has received the message

go
t
it

Alice
no

ye
s

Bob
14

Solution 3
What if Alice and Bob could keep time?
Alice uses 1 lamp for the message:
At 12 midnight: turns on lamp if message = yes
At 12:01: turns lamp off

Bob needs no lamps!

Takes down the message between 12 and 12:01

Pros: Fewer signals, lesser processing needed

Cons: Alice and Bob must keep their clocks closely
synchronized
If Bobs watch is off by a minute, incorrect communication

possible

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