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Address Translation
Address Translation
Address Translation
• Address assignment and translation is carried out at
different stage in life of a program
– By the programmer while writing the program
– By the compiler during program compilation
– By the loader at initial program-load time
– By run-time memory management HW and/or
software
• Static translation – program is first loaded for
execution
• dynamic translation – virtual space dynamically for
execution
Base Addressing
• Effective address, Base address,
Displacement
• Aeff= B+D
• Memory address table
• Limit address, Li – highest address
• Bi<=Ar<=Li
Block of m words with address B
Base Displacement Effective Address
Address D Aeff
B W0 0 B
W1 1 B+1
. . .
. . .
. . .
Wi i B+i
. . .
. . .
. . .
B1
B1
Block K1 Block K1
L1 L1
B’2
Block K2
L’2
B2 B3
Block K2 Block K3
L2 L3
Translation Look-aside
buffer
Structure of a dynamic address-
translation system
Translation look-
aside buffer TLB
containing (part of)
the memory map
Displacement
(offset) D
Real address AR
To memory system
Segments and page
• Page - Basic unit of memory info for swapping purpose
in a multilevel memory system.
• Page-frame – fixed regions of physical memory
• Segments – set of logically related, contiguous words
• Segment table – physical address assigned to the
segments
Burroughs B6500/7500
segmentation
• Each program has a segment called its
program reference table PRT, which
serves as it segment table.
• All segments associated with a program
are defined by special words called
segment descriptors in a the
corresponding PRT.
Segment descriptor of the
Burroughs B6500/7500
50 45 39 19
011
Presence bit P
• P – whether it is assigned to M1
• C – original copy of descriptor
pages
• page table
– Page address and displacement
• External fragmentation – unusable space between
occupied regions.
• Internal fragmentation – unusable space within
partially filled page frame
• Segments can be assigned over a non-contiguous
area in the memory by the use of paging.
Representative organization of a
Page Table
Page address Page Frame Presence bit P Change bit C Access rights
A 0000000 1 0 R, X
C D6C7F9 0 d R, W, X
E 0000024 1 1 R, W, X
F 0000016 1 0 R
Two-stage address translation
with segment and pages
Segment
table M
TLB
Page
frame
Segment Page
index SI Index PI
Virtual address Av
Displacement
(offset) D
Real address AR
To memory system
Effect of page size, SP
• Storage utilization and effective data-transfer rate.
• If SS >> SP, the last page assigned to a segment should
contain Sp/2 words.
• No. of page table is approx. SS/SP words. Memory-
space overhead with each segment
SP SS
S
2 SP
• Space utilization,
SS 2 SS SP
u 2
S S S S P 2 S S (1 S P )
• Optimum page size is obtained when S is minimized.
dS 1 S S
2 0
dS P 2 S P
S POPT 2 S S