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DLD Lecture 1
DLD Lecture 1
Design
(EC 201)
Textbook
Topics
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Sequential Logic/Circuits: Latches, FlipFlops, Triggering of Flip-Flops, Clocked
Sequential Circuits and their Analysis,
State Reduction and Assignment, Flip-Flop
Excitation Tables, Design Procedure,
Designing with D & JK Flip-Flops,
HDL/Verilog Representation for a
Sequential Circuits VHDL/Verilog
Boolean Algebra
&
Logic Gates
xS
x.y
x+y
x.(y+z) = (x.y)+(x.z)
x
Y+z
x.(y+z)
x.y
x.z
(x.y)+x.z
(a) x+0 = x
(b) x.1 = x
Postulate 5
(a) x+x = 1
(b) x.x = 0
Theorem 1
(a) x+x = x
(b) x.x = x
Theorem 2
(a) x+1 = 1
(b) x.0 = 0
Theorem3, involution
(x) = x
Postulate3, commutative
(b) xy = yx
Theorem4, associative
(a) x+(y+z)=(x+y)+z
Postulate4, distributive
(a) x(y+z)=xy+xz
Theorem5, DeMorgan
(a) (x+y) = xy
Theorem6, absorption
(a) x+xy = x
(b) x(x+y)=x
Theorems
1a.
1b.
x+x = x
x+x = (x+x).1
= (x+x)(x+x)
= x+xx
=x+0
=x
x.x = x (Remember Duality of 1a)
x.x = xx+0
= xx+xx
= x(x+x)
= x.1
=x
Theorems
2a. x+1 = 1
x+1 =1.(x+1)
= (x+x)(x+1)
= (x+x)
= x+x
=1
2b. X.0 = 0 (Remember Duality of
of 2a)
3.
(x) = x
Complement of x = x
Complement of x = (x) = x
6a x+xy = x
x+xy = x.1+xy
= x(1+y)
= x.1
=x
6b. x(x+y) = x (Remember Duality of 6a)
Can also be proved using truth table
method
xy
x+xy
x=x+xy
x
x+y
(x+y)
xy
Operator Precedence
1.( )
2.NOT
3.AND
4.OR
y
xy
xy
xy
xy
VENN DIAGRAM FOR TWO VARIABLES
z
x+(y+z)
xy+xz
VENN DIAGRAM ILLUSTRATION OF THE DISTRIBUTIVE LAW
F1
F2
F3
F4
z
x
y
F1
F2
y
z
(a) F1 = xyz
(b) F2 = x+yz
F3
(c) F3 = xyz+xyz+xy
x
y
F4
(c) F4 = xy+xz
1.
2.
3.
4.
5.
x+xy = (x+x)(x+y)
= 1.(x+y)=x+y
x(x+y) = xx+xy
= 0+xy=xy
xyz+xyz+xy
= xz(y+y)+xy
= xz+xy
xy+xz+yz
(Consensus Theorem)
=xy+xz+yz(x+x)
=xy+xz+xyz+xyz
=xy(1+z)+xz(1+y)
=xy+xz
(x+y)(x+z)(y+z)=(x+y)(x+z)
by duality from function 4
Complement of a Function
(A+B+C) = (A+X)
= AX
= A.(B+C)
= A.(BC)
= ABC
(A+B+C+D+..Z) = ABCD..Z
(ABCD.Z) = A+B+C+D+.+Z
Example using De Morgans Theorem (Method-1)
F1 = xyz+xyz
F1 = (xyz+xyz)
= (x+y+z)(x+y+z)
F2 = x(yz+yz)
F2= [x(yz+yz)]
= x+(y+z)(y+z)
F1 = xyz + xyz
Dual of F1 = (x+y+z)(x+y+z)
Complement F1 = (x+y+z)
(x+y+z)
F2 = x(yz+yz)
Dual of F2=x+[(y+z)(y+z]
Complement =F2= x+ (y+z)(y+z)
MAXTERMS
Term
Designation
Term
Designation
xyz
m0
x+y+z
M0
xyz
m1
x+y+z
M1
xyz
m2
x+y+z
M2
xyz
m3
x+y+z
M3
xyz
m4
x+y+z
M4
xyz
m5
x+y+z
M5
xyz
m6
x+y+z
M6
xyz
m7
x+y+z
M7
Function f1
Function f2
f1 = xyz+xyz+xyz
=m1 + m4 + m7
f2 = xyz+xyz+xyz+xyz = m3 + m5 + m6 + m7
f1 = xyz+xyz+xyz
f1 = xyz+xyz+xyz+xyz+xyz
f1 =(x+y+z)(x+y+z)(x+y+z)(x+y+z) (x+y+z)
= M0.M2.M3.M5.M6
= M0M2M3M5M6
f2 = xyz+xyz+xyz+xyz
f2 = xyz+xyz+xyz+xyz
f2 = (x+y+z)(x+y+z)(x+y+z)(x+y+z)
= M0 M1 M2 M4
Canonical Form
Boolean functions expressed as a sum of minterms or
product of maxterms are said to be in canonical form.
M3+m5+m6+m7 or
M0 M1 M2 M4
Example:
F = A+BC
F = A(B+B)+BC(A+A)
= AB+AB+ABC+ABC
= AB(C+C)+AB(C+C)+ABC+ABC
= ABC+ABC+ABC+ABC+ABC+ABC
= ABC+ABC+ABC+ABC+ABC
= m1+m4+m5+m6+m7
F(A,B,C)=(1,4,5,6,7)
ORing of term
Example: F = xy+xz
F = xy+xz
F = (xy+x)(xy+z)
distr.law (x+yz)=(x+y)(x+z)
= (x+x)(y+x)(x+z)(y+z)
= (x+y)(x+z)(y+z)
= (x+y+zz)(x+z+yy)(y+z+xx)
= (x+y+z)(x+y+z)(x+z+y)(x+z+y)(y+z+x)
(y+z+x)
= (x+y+z)(x+y+z)(x+y+z)(x+y+z)
= M0 M2 M4 M5
F(x,y,z) = (0,2,4,5)
F(A,B,C) = (1,4,5,6,7)
sum of minterms
F(A,B,C) = (0,2,3)
= m0+m2+m3
F(A,B,C) = (m0+m2+m3)
= m0.m2.m3
= M0 M2 M3
= (0,2,3)
Product of maxterms
Similarly
F(x,y,z) = (0,2,4,5)
F(x,y,z) = (1,3,6,7)
Standard Forms
Sum of Products (OR operations)
F1 = y+xy+xyz
(AND term/product term)
Product of Sums (AND operations)
F2=x(y+z)(x+y+z+w)
(OR term/sum term)
Non-standard form
F3=(AB+CD)(AB+CD)
Standard form of F3
F3=ABCD + ABCD
F0
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
F14
F15
Operator
symbols
F0 = 0
F1 = xy
F2 = xy
F3 = x
F4 = xy
F5 = y
F6 = xy +xy
F7= x +y
F8 = (x+y)
F9 = xy +xy
F10 = y
F11 = x +y
F12 = x
F13 = x + y
F14 = (xy)
F15 = 1
OPERATOR
SYMBOL
NAME
F0 =0
COMMENTS
NULL
BINARY CONSTANT 0
F1=xy
x.y
AND
F2=xy
x/y
inhibition
F3=x
F4=xy
F5=y
F6=xy+xy
F7=x+y
F8=(x+y)
F9=xy+xy
F10=y
F11=x+y
F12=x
F13=x+y
then y
F14=(xy)
transfer
inhibition
transfer
exclusive-OR
OR
NOR
y/x
x
y
x+y
x
y
x
y
x
x and y
x
y but not x
y
x or y but not both
x or y
not OR
*equivalence
complement
not y
implication
complement
implication
xy
xy
x
x but not y
NAND
x equals y
if y then x
not x
if x
not AND
Range
Typical
TTL
Vcc=5
2.4-5
3.5
ECL
VEE=-5.2 -0.95- -0.7 -0.8
CMOS VDD=3--10 VDD
VDD
Positive Logic:
Logic-1
Negative Logic
Logic-0
Range
Typical
0-0.4
0.2
-1.9-- -1.6 -1.8
0-0.5
0
Logic-0
Logic-1
TYPICAL CHARACTERISTICS OF IC
LOGIC FAMILIES
IC Logic
Family
Standard TTL
Shottky TTL
Low power
Shottky TTL
ECL
CMOS
Fan out
Power
Dissipation (mw)
Propagation
delay (ns)
10
10
10
22
10
3
0.4
0.4
20
25
50
2
25
0.1
10
2
25
0.4
0.2
3
GRAPHIC
SYMBOL
AND
X
Y
TRUTH
TABLE
F=XY
X Y
0 0
0 1
1 0
1 1
F
0
0
0
1
F=X+Y
X Y
0 0
0 1
1 0
1 1
F
0
1
1
1
OR
X
Y
ALGEBRIC
FUNCTION
NAME
GRAPHIC
SYMBOL
ALGEBRIC
FUNCTION
Inverter
X
F=X
X
0
1
F
1
0
F=X
X
0
1
F
0
1
Buffer
X
NAND
X
Y
TRUTH
TABLE
F=(XY)
X Y
0 0
0 1
1 0
1 1
F
1
1
1
0
NAME
NOR
Exclusive-OR
(XOR)
Exclusive-NOR
or
Equivalence
GRAPHIC
SYMBOL
X
Y
X
Y
TRUTH
TABLE
F=(X+Y)
X Y
0 0
0 1
1 0
1 1
F
1
0
0
0
X Y
0 0
0 1
1 0
1 1
F
0
1
1
0
X Y
0 0
0 1
1 0
1 1
F
1
0
0
1
F=XY+XY
=XY
X
Y
ALGEBRIC
FUNCTION
F=XY+XY
=X Y
(X+Y)
[Z+(X+Y)]
(X
Y) Z=(X+Y) Z
=XZ+YZ
(X ( Y Z)=X(Y+ Z)
=XY+XZ
[X+(Y+Z)]
Y
Z
(Y+Z)
X
Y
Z
(X+Y+Z)
X
Y
Z
(XYZ)
A
B
C
F=[(ABC). (DE)]=ABC+DE
D
E
TRUTH TABLE
X
Y
F=X Y Z
X
0
0
0
0
1
1
1
1
Y
0
0
1
1
0
0
1
1
Z
0
1
0
1
0
1
0
1
F
0
1
1
0
1
0
0
1
1
0
0
1
0
1
1
0
XOR
F=X Y Z
XNOR
(b) Three input gates
Odd
function
Even
function
VCC
13
12
11 10
GND
TTL gates
14 13
12
11 10
GND
VCC 2
16 15
13
12
11
10
10107 Triple
Exclusive OR/
NOR gates
1 2
VCC 1
VCC 2
16
15
14
13
12
8 VEE 2 (-5.2V)
11
10
10102 Quadruple
2-Input NOR gate
VCC 1
VEE (-5.2V)
(3-15 V)
VDD
14
13
12
NC
11
10
C MOS
GATES
NC
Vss (GND)
NC
NC
16 15
14
13
12
11
10
CMOS
GATES
1
VDD
8 Vss
(GND)
(3-15 V)
LOGIC
SIGNAL
LOGIC
SIGNAL
VALUE
VALUE
VALUE
VALUE
Positive Logic
L
Negative Logic
x
TTL
7400
GATE
H and L
X
L=0
x
y
x
y
H=0