8051

MEMORY & I/O

ADDRESSING

Memory Addressing

PROGRAM MEMORY ROM

ROM ( READ ONLYMEMORY )
8051 can address 4K bytes on
chip memory map range 0000
TO 0FFFh
IT can address 64 KB external
memory
map range 0000 TO FFFFh
Memory map of internal and
external program overlaps
The internal and external ROM
distinguished by PSEN signal
ROM less version of 8051 PSEN
used to access external memory

ROM - program

DATA MEMORY - RAM

EXTERNAL RAM
8051 supports 64KB external
data memory- range 0000
to FFFFh
Accessed by DPTR
8051 generates RD, WR
during external access .
CS can be derived from
address lines

ONCHIP (INTERNAL) RAM

RAM

INTERNAL RAM

Registers
1F

Bank 3
18
17

Bank 2
10
0F

Bank 1
08
07
06
05
04
03
02
01
00

R7
R6
R5
R4
R3
R2
R1
R0

Bank 0

Four Register Banks

Each bank has R0-R
Selectable by psw.2

Bit Addressable Memory

2F
2E
2D
2C
2B
2A
29
28
27
26
25
24
23
22
21
20

7F

78

20h 2Fh (16 locations X 8-bits

= 128 bits)
Bit addressing:
mov C, 1Ah
or
mov C, 23h.2

Special Function Registers

DATA registers
CONTROL registers
Timers
Serial ports
Interrupt system
Analog to Digital converter
Digital to Analog converter
Etc.

Addresses 80h FFh

Direct Addressing
used to access SPRs

I/O ADDRESSING

I/O INTERFACING
External i/o devices are interfaced
as memory mapped i/o devices
Devices treated as external
memory locations and consume
external memory address
The address of external program and
data memory may overlap