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    Basheer V.P
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    This document discusses encoders and decoders used in combinational logic design. It describes encoders as converting input code words into output code words, with fewer outputs than inputs. Decoders are the inverse, converting input code words into one-hot output code words. Binary encoders and decoders are examined, along with an example 8-to-3 binary encoder. Priority encoders are introduced to handle requests with priority, assigning priorities to inputs and encoding the highest priority input. The 74x148 8-input priority encoder chip is detailed with its truth table and internal circuit. Cascading priority encoders is presented as a method to create larger encoders.

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    Encoder

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    This document discusses encoders and decoders used in combinational logic design. It describes encoders as converting input code words into output code words, with fewer outputs than inputs. Decoders are the inverse, converting input code words into one-hot output code words. Binary encoders and decoders are examined, along with an example 8-to-3 binary encoder. Priority encoders are introduced to handle requests with priority, assigning priorities to inputs and encoding the highest priority input. The 74x148 8-input priority encoder chip is detailed with its truth table and internal circuit. Cascading priority encoders is presented as a method to create larger encoders.

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    94 views15 pages

    Encoder

    Uploaded by

    Basheer V.P
    This document discusses encoders and decoders used in combinational logic design. It describes encoders as converting input code words into output code words, with fewer outputs than inputs. Decoders are the inverse, converting input code words into one-hot output code words. Binary encoders and decoders are examined, along with an example 8-to-3 binary encoder. Priority encoders are introduced to handle requests with priority, assigning priorities to inputs and encoding the highest priority input. The 74x148 8-input priority encoder chip is detailed with its truth table and internal circuit. Cascading priority encoders is presented as a method to create larger encoders.

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    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
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    Download as ppt, pdf, or txt
    of 15

    ECE 2110: Introduction to Digital Systems

    Chapter 6
    Combinational Logic Design Practices

    Encoders
    74x138/139 decoders

    2
    Encoders

    Multiple-input/multiple-output device.

    Performs the inverse function of a Decoder.

    Outputs ( m ) are less than inputs ( n ).

    Converts input code words into output


    code words. output
    input code
    code ENCODER

    3
    Encoders vs. Decoders

    Decoder Encoder

    Binary decoders/encoders
    n-to-2^n 2^n-to-n encoder
    Input code : Binary Code Input code : 1-out-of-2^n.
    Output code :1-out-of-2^n. Output code : Binary Code
    4
    Binary Encoder Binary encoder

    I0
    I1
    I2 Y0
    I3 Y1
    2^n-to-n encoder : 2^n inputs and n outputs. I4 Y2
    Input code : 1-out-of-2^n. I5
    Output code : Binary Code I6
    Example : n=3, 8-to-3 encoder I7
    Inputs Outputs

    I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0
    1 0 0 0 0 0 0 0 0 0 0
    0 1 0 0 0 0 0 0 0 0 1
    0 0 1 0 0 0 0 0 0 1 0
    0 0 0 1 0 0 0 0 0 1 1
    0 0 0 0 1 0 0 0 1 0 0
    0 0 0 0 0 1 0 0 1 0 1
    0 0 0 0 0 0 1 0 1 1 0
    0 0 0 0 0 0 0 1 1 1 1

    5
    8-to-3 encoder Implementation

    I0
    Simplified implementation: Y2
    I1
    - From the truth table
    Y0 = I1 + I3 + I5 + I7 I2
    Y1 = I2 + I3 + I6 + I7
    Y2 = I4 + I5 + I6 + I7 I3 Y1
    Limitations : I4
    - I0 has no effect on the output
    - Only one input can be activated I5
    Application: I6 Y0
    Handling multiple devices requests
    I7
    But, no simultaneous requests
    Establishing priorities solve the problem of multiple requests

    6
    Need priority in most applications

    7
    Priority Encoder

    Assign priorities to the inputs


    When more than one input are asserted, the output generates
    the code of the input with the highest priority
    Priority Encoder : Priority encoder
    H7=I7 (Highest Priority) Priority Circuit Binary encoder
    H6=I6.I7
    H5=I5.I6.I7 I7 I7 H7 I7
    H4=I4.I5.I6.I7 I6 I6 H6 I6
    H3=I3.I4.I5.I6.I7
    H2=I2.I3.I4.I5.I6.I7 I5 I5 H5 I5 Y2 A2
    H1=I1. I2.I3.I4.I5.I6.I7 I4 I4 H4 I4 Y1 A1
    H0=I0.I1. I2.I3.I4.I5.I6.I7 I3 I3 H3 I3 Y0 A0
    IDLE= I0.I1. I2.I3.I4.I5.I6.I7 I2 I2 H2 I2
    - Encoder
    I1 I1 H1 I1
    A0=Y0 = H1 + H3 + H5 + H7
    A1=Y1 = H2 + H3 + H6 + H7 I0 I0 H0 I0
    IDLE
    A2=Y2 = H4 + H5 + H6 + H7 IDLE
    8
    8-input priority encoder

    I7 has the highest priority,I0


    least
    A2-A0 contain the number of
    the highest-priority asserted
    input if any.
    IDLE is asserted if no inputs
    are asserted.

    9
    74x148 8-input priority encoder

    10
    74x148 8-input priority encoder

    Active-low I/O
    Enable Input
    Got Something": Group Select
    Enable Output 11
    74x148 Truth Table

    12
    74x148
    circuit

    13
    Cascading priority
    encoders

    32-input
    priority encoder

    14
    Next

    Three state devices


    Multiplexers

    Reading Wakerly CH-6.6-6.7

    15

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