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AC Diode Characteristics

R3

Resistor network supplies DC bias set point


Capacitor provides AC signal input

Vout=IdiodeR3
ECE 663
AC small signal resistance

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Small signal AC conductance

g
1 dI

R dV dV

d
J s Ae qV / kT 1

q q
g I (V ) Idc (Vdc )
kT kT

Small Signal AC resistance

1 kT 1
R
g q Idc (V )

Resistance depends on DC set point voltage controlled resistor

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An equivalent circuit

rd Cd

Reactance:
1 1
Y g d i Cd i Cd rd, Cd vary with VDC !!!
Z rd

Let us work out Y for reverse bias first

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Reverse Bias Conductance

I = I0(e-qVBR/kT -1) -I0

I constant with reverse bias voltage gd 0


Reverse Bias (Depletion) Capacitance

AC voltage modifies depletion width


Depletion width changes small
Looks like adding charges to parallel plates
AC capacitance

K s 0 A
CJ
W

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RB capacitance C-V measurements

K s 0 A
CJ
W
1/ 2
2K
W s 0 Vbi VA
qNB
1/ 2
qNBK s 0
CJ
2
biV V A
1 2Vbi VA

CJ
2
qNB K s 0

Plot of 1/C2 vs V is a straight line (constant doping) and the


slope gives doping profile.
Y-intercept gives built-in voltage

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So reverse bias equivalent circuit

Rs

K s 0 A
CJ
W

Notice that for reverse bias, circuit parameters are frequency


independent, as if were in DC characteristics.

Why?

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Reverse bias p-n junction is a majority carrier device

Very few minority carriers have made it to the opposite side

Depletion width change requires flow of majority carriers


(n from n-side and p from p-side flow in and out)

Since majority carriers move very fast by drift, they can


follow the AC field instantly, so the response is quasi-static

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Just how fast are majority carriers?

Drifting charges, with fields in turn determined by charge

n/t = -(1/q)Jn/x + (gN - rN)

Jn = qnmnE + qDNn/x qnmnE snE

Ks0 E/x = q(p - n + ND+ - NA-) -qn

n/t = -n/t

t = Ks0/sn (Dielectric Relaxation Time)

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How fast is it?

t = Ks0rn

Ks = 11.9
0 = 8.854 x 10-12 F/m
rn (@ doping 1015/cm3) ~ 4 W-cm

t 5 ps !

As long as fields are not too fast ( < 10 GHz), charges


follow field quasi-statically
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Lets now go to forward bias

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Capacitance in Forward Bias

np ( x)

pn ( x')

Stored charge = excess minority carriers


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AC field varies minority carrier pile-
up (recall law of the junction)

p(xn) = (ni2/ND)[eq(V + vac)/kT 1]


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Also, minority carriers are slow and may
not follow AC field quasi-statically

Thus we expect circuit parameters


to be frequency-dependent !

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How fast are minority carriers?

t 1/NTsTvt (Minority carrier lifetime)

NT ~ 1012/cm3 (for NA ~ 1014/cm3)


sT ~ p(10-10m)3
vt = 3kT/m ~ 105m/s

t 300 ms

So for fast fields ( >> 1/t), expect carriers


to go out of phase, leading to
freq-dependent circuit parameters ECE 663
But how do we include such
phase lag effects?

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Back to MCDE

n/t = DN2n/x2 n/tn

Cant drop this at AC fields !!

jn
Back to MCDE

0 = DN2n/x2 n(1+jtn)/tn

tn tn/(1+jtn)
So in Shockley equation

I = qA(ni2/ND)DN (1+jtn) /tn


x [eq(V + vac)/kT 1]

idiff = G0(1+jtn)vac

idiff = (Gd + jCd)vac


Square root of (1+jtn)

1 + jt = Aejq
A = (1 + 2t2) Re(1+jt) = Gd
q = tan-1(t)
Im(1+jt) = jCd

Real(1+jt) = A1/2cos(q/2)

Im(1+jt) = A1/2sin(q/2)

cosq = 1/(1+ 2t2)


= 2cos2(q/2) - 1
= 1 2sin2(q/2)
Gd()/G0 ~

Cd()/C0 ~ 1/

1
t

For high frequency (t >> 1), minority carriers cant


follow fields, so capacitance goes down and the p-n
junction becomes leaky so its conductance goes up
In summary

Reverse bias is a depletion capacitance, zero


conductance

It looks like a DC capacitance, except its width


depends on voltage

Forward bias looks like a frequency dependent


diffusion capacitance and a diffusion
conductance to give an overall admittance

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