SR FLIP-FLOPS

Reporter: Ma. Soledad J. Escueta

SR FLIP-FLOPS
The SET-RESET flip
flop is designed
with the help of
two NOR gates and
also two NAND
gates
SR Latch
 CASE 1 CASE 2 CASE 3

S= 0 , R= 0 Q= , =
S= 0 , R= 1 Q= , = S= 1 , R= 0 Q= , =
S= 1 , R= 1 Q= , =
S= 1 , R= 1 Q= , = S= 1 , R= 1 Q= , =
S= 1 , R= 1 Q= , =
TRUTH TABLE

S R Q
0 0
0 Not used
1 1 0
1 0 0 1
1 memory
1
SR Flip-Flop
It will act as flip-
flop when we are
having clock.
SR Flip-Flop
 CLK S Q
K
0

1
Thank You