Junction Field Effect Transistors

Class 7
 Transistor Definition
• The transferred-resistance or transistor is a
multi-junction device that is capable of
• • Current gain
• • Voltage gain
• • Signal-power gain
Unipolar Field Effect Transistor
(FET)

• Based on invention in 1948 by Bardeen,

Brattain and Shockley
• Contains one type of carriers electrons or
holes (unipolar)
The Field Effect Transistor (FET)
and BJT
• The conventional bipolar transistor has two
type of current carriers of both polarities
(majority and minority) and FET has only
one type of current carriers, p or n (holes or
electrons)
• The BJT is current controlled and FET is
voltage controlled current between two
other terminals
• JFET junction is reverse-biased, the gate current is
practically zero, and a very high impedance at input
whereas the base current of the BJT is always some
value greater than zero, for example, in
• As
Field effect transistor is a unipolar-transistor, which acts as
a voltage-controlled current device and is a device in
which current at two electrodes is controlled by the
action of an electric field at another electrode.
• • Field effect transistor is a device in which the current is
controlled and transported by carriers of one polarity
(majority) only and an electric field near the one terminal
controls the current between other two.
 Introduction to FET
• FET: Field Effect Transistor
• There are two types
• MOSFET: metal-oxide-semiconductor FET
• JFET: Junction FET
• MOSFET is also called the insulated-gate FET or
IGFET.
• Quite small
• Simple manufacturing process
• Low power consumption
• Widely used in VLSI circuits(>800 million on a single IC chip)
 Junction Field Effect Transistor
• JFET is a unipolar-transistor, which acts as a
voltage controlled current device and is a
device in which current at two electrodes is
controlled by the action of an electric field at a
p-n junction.
• • Field effect transistor is a device in which
the current is controlled and transported by
carriers of one polarity (majority) only and an
electric field at the p-n junction region
controls the current between other two.
 Basic Structure of JFET
• In addition to the channel, a JFET contains
two ohmic contacts: the source and the
drain.
• The JFET will conduct current equally
well in either direction and the source and
drain leads are usually interchangeable
Junction Field Effect Transistor
 Junction Field Effect Transistor
• JFET consists of a piece of high-resistivity
semiconductor material (usually Si) which
constitutes a channel for the majority carrier flow
and a gate.
• Conducting semiconductor channel between
two ohmic contacts – source & drain The
magnitude of this current is controlled by a
voltage applied to a gate, which is a reverse-
biased. (Ohmic contacts means following Ohm’s
law [I  V current proportional to V under
constant physical condition.)
 N-channel JFET construction
• This transistor is made by forming a
channel of N-type material in a P-type
substrate.
• Three wires are then connected to the
device.
• One at each end of the channel.
• One connected to the substrate.
• In a sense, the device is a bit like a
PNjunction diode, except that there are two
wires connected to the N-type side.
 n-Junction FETs and p-JFETs
• JFET is a high-input resistance device,
while the BJT is comparatively low.
• If the channel is doped with a donor
impurity, ntype material is formed and the
channel current will consist of electrons.
• If the channel is doped with an acceptor
impurity, p-type material will be formed
and the channel
• current will consist of holes.
 n- JFET and p-JFET

• N-channel JFET have greater conductivity

than P-channel types, since electrons have
higher mobility than do holes; thus n-channel
JFETs are approximately twice as efficient
conductors compared to their p-channel
counterparts.
 Device structure of MOSFET (n-type)
Gate(G)
Source(S) Oxide Drain(D)
(SiO2)
Metal

n+ Channel area n+

p-type Semiconductor
Substrate (Body)
Body(B)

 For normal operation, it is needed to create a

conducting channel between Source and Drain
 Creating a channel for current flow
An n channel can be induced at
the top of the substrate beneath
the gate by applying a positive
voltage to the gate
The channel is an inversion
layer
The value of VGS at which a
sufficient number of mobile
electrons accumulate to form a
conducting channel is called the
threshold voltage (Vt)
Device structure of MOSFET (n-type)
L = 0.1 to 3 m
W = 0.2 to 100 m
Tox= 2 to 50 nm

Cross-section view
 Classification of FET
• According to the type of the channel, FETs can be
classified as
• MOSFET
•Enhancement type
 N channel
•Depletion type
•Enhancement type
 P channel
•Depletion type

• JFET
 P channel

 N channel
 Drain current under small voltage vDS
An NMOS transistor with vGS > Vt and with a small vDS
applied.
 The channel depth is uniform and the device acts as a
resistance.
The channel conductance is
proportional to effective voltage,
or excess gate voltage, (vGS – Vt) .
Drain current is proportional to
(vGS – Vt) and vDS.
Drain current under small voltage vDS
 Operation as vDS is increased
 The induced channel acquires a tapered shape.
 Channel resistance increases as vDS is increased.
 Drain current is controlled by both of the two voltages.

B
 Channel pinched off
• When VGD = Vt or VGS - VDS = Vt , the channel is
pinched off
• Inversion layer disappeared at the drain point
• Drain current does not disappeared!
 Drain current under pinch off
• Drain current is saturated and only controlled by the
vGS
 Drain current controlled by vGS

• vGS creates the channel.

• Increasing vGS will increase the conductance
of the channel.
• At saturation region only the vGS controls
the drain current.
• At subthreshold region, drain current has
the exponential relationship with vGS
 p channel device
• Two reasons for readers to be familiar
with p channel device
 Existence in discrete-circuit.
 More important is the
utilization of complementary
MOS or CMOS circuits.
 p channel device

• Structure of p channel device

• The substrate is n type and the inversion layer is p type.
• Carrier is hole.
• Threshold voltage is negative.
• All the voltages and currents are opposite to the ones of
n channel device.
• Physical operation is similar to that of n channel device.
 Complementary MOS or CMOS

 The PMOS transistor is formed in n well.

 Another arrangement is also possible in which an n-type body is used and
the n device is formed in a p well.
 CMOS is the most widely used of all the analog and digital IC circuits.
 Current-voltage characteristics

• Circuit symbol
• Output characteristic curves
• Channel length modulation
• Characteristics of p channel device
• Body effect
• Temperature effects and Breakdown Region
 Circuit symbol

(a) Circuit symbol for the n-channel enhancement-type MOSFET.

(b) Modified circuit symbol with an arrowhead on the source terminal to
distinguish it from the drain and to indicate device polarity (i.e., n channel).
(c) Simplified circuit symbol to be used when the source is connected to the
body or when the effect of the body on device operation is unimportant.
 Output characteristic curves of NMOS

(a) An n-channel enhancement-

type MOSFET with vGS and vDS
applied and with the normal
directions of current flow
indicated.
(b) The iD–vDS characteristics for a
device with k’n (W/L) = 1.0
mA/V2.
Output characteristic curves of NMOS
• Three distinct region
 Cutoff region
 Triode region
 Saturation region
• Characteristic equations
• Circuit model
 Cutoff region

• Biased voltage
vGS  Vt
• The transistor is turned off.
iD  0
• Operating in cutoff region as a switch.
 Triode region
• Biased voltage
vGS  Vt
vDS  vGS  Vt
• The channel depth changes from uniform to tapered
shape.
• Drain current is controlled not only by vDS but also
by vGS
W  1 2
iD  nC 0 x ( v
 GS  Vt ) v DS  v DS 
L 2  process transcon-
W ductance parameter
 nC 0 x (vGS  Vt )vDS
nC 0 x  k
L
 Triode region

• Assuming that the draint-source voltage is

sufficiently small, the MOS operates as a linear
resistance
v DS
rDS   1
W
iD vGS VGS nC 0 x (VGS  Vt )
L
 1
W
nC 0 x VOV
L
 Saturation region
• Biased voltage
vGS  Vt
vDS  vGS  Vt
• The channel is pinched off.
• Drain current is controlled only by vGS
W
iD   nC 0 x （vGS  Vt ) 2
1
2
L

• Drain current is independent of vDS and behaves as

an ideal current source.
 Channel length modulation
• Explanation for channel length modulation
 Pinched point moves to source terminal with the
voltage vDS increased.
 Effective channel length reduced
 Channel resistance decreased
 Drain current increases with the voltage vDS
increased.
• Current drain is modified by the channel
length modulation
W
iD  12 nC 0 x 1＋vDS )
（vGS  Vt ) 2（
L
 Channel length modulation

The MOSFET parameter VA depends on the process technology and, for a

given process, is proportional to the channel length L.
 Channel length modulation
• MOS transistors don’t behave an ideal current
source due to channel length modulation.
• The output resistance is finite.
1
 iD  1 VA
ro     

 DS 
v I D ID
vGS  const.

• The output resistance is inversely proportional to

the drain current.
Large-signal equivalent circuit model

Large-signal equivalent circuit model of the n-channel

MOSFET in saturation, incorporating the output resistance
ro. The output resistance models the linear dependence of iD
on vDS
Characteristics of p channel device

(a) Circuit symbol for the p-channel enhancement-type MOSFET.

(b) Modified symbol with an arrowhead on the source lead.
(c) Simplified circuit symbol for the case where the source is connected to the
body.
 Characteristics of p channel device

The MOSFET with voltages applied and the directions of

current flow indicated.
The relative levels of the terminal voltages of the
enhancement-type PMOS transistor for operation in the triode
region and in the saturation region.
 Characteristics of p channel device

Large-signal equivalent circuit model of the p-channel

MOSFET in saturation, incorporating the output resistance
ro. The output resistance models the linear dependence of iD
on vDS
 The body effect
• In discrete circuit usually there is no body effect due to
the connection between body and source terminal.
• In IC circuit the substrate is connected to the most
negative power supply for NMOS circuit in order to
maintain the pn junction reversed biased.
• The body effect---the body voltage can control iD
• Widen the depletion layer
• Reduce the channel depth
• Threshold voltage is increased
• Drain current is reduced
• The body effect can cause the performance degradation.