FPGA PLACEMENT USING

GENETIC ALGORITHM
Guided By: Team Members:
Dr.S.P.Joy Vasantha Rani M.Shobana(2014504610)
Asst. Professor(Sr.Gr.) W.Shalu(2014504609)
Department of Electronics Engineering
Madras Institute of Technology M.P.SatheeshKumar(2014504608)
Anna University
Chennai
 OBJECTIVE
• To place CLB’s in FPGA board to reduce time
delay and wirelength using GA and GASA
algorithm
• To implement the above algorithm in VPR and
compare the result with the existing algorithm
 LITERATURE REVIEW
• Yang Meng, A.E.A. Almaini,Wang Pengjun(2006). FPGA Placement
Optimization by Two-Step Unified Genetic Algorithm and Simulated
Annealing Algorithm. Journal of electronics(china) Vol.23 No.4 Pp. 632-
636 .
o GA is used to solve numerous combinational optimization problems
o GA takes too much CPU time in the late process but SA converges
faster than GA
o This paper utilizes the advantage of the global search ability of GA and
fast convergence of SA
• S. Nazeer Hussain and K. Hari Kishore(2016). Computational Optimization
of Placement and Routing using Genetic Algorithm. Indian Journal of
Science and Technology, Vol 9(47).
o This paper concentrates on solving the problems which occur in VLSI
floor planning
o It gives an overview of placement and routing problems in ICs.
o The searching for best solutions is carried out by Genetic Algorithm
(GA)
• Khushro Shahookar and Pinaki Mazumder(1990). A Genetic Approach to
Standard Cell Placement Using Meta-Genetic Parameter Optimization.
IEEE Transactions on Computer Aided Design Vol 9. No. 5 Pp 500-511
o This paper describes the implementation of the Genetic Algorithm for Standard-cell
Placement (GASP).
o The genetic algorithm applies transformations on the chromosomal(CLB) representation
of the physical layout
o Crossover, Mutation and Inversion operators are used to generate a new configuration

• Jie Cui, Xue Chen, Yongmei Lei, Weimin Xu(2010). Improving the
Efficiency of Scheduling and Placement in FPGA by Small-world Model
Based Genetic Algorithm.10th IEEE International Conference on Computer
and Information Technology(CIT)

o Genetic algorithm based on small-world model (GA-SW) is developed for solving the
scheduling and placement problem in FPGA
o A converging crossover operator is developed to prevent invalid solutions caused by
combinatorial coding
o The time complexity of GA-SW is O(n2), where n is the number of tasks
 INTRODUCTION
FPGA: (Field Programmable Gate Array)
• Pre-fabricated silicon devices that can be
electrically programmed to become almost any
kind of digital circuit
• FPGAs comprise of:
• Programmable logic blocks
• Programmable routing
• I/O blocks
FLOW CHART OF FPGA DESIGN:

System Specification

Architectural Design

Functional Design
and logic design
Partitioning
Circuit Design
Floor planning

Physical Design Placement

Physical Verification Routing

and Signoff

Fabrication

Packaging and
Testing

Chip
 PLACEMENT
• The portion of the physical design flow that
assigns exact locations for various circuit
components within the chip’s core area
• Types of placement:
o Global placement
o Detailed pacement
• Objective:
To optimize total wire length , timing, power,
congestion , runtime minimization
 VERILOG TO ROUTING(VTR)
• VTR provides open-source CAD tools for
FPGA architecture and CAD research.
• VTR enable the investigation of new FPGA
architectures and CAD algorithms, which are
not possible with closed-source tools.
• VTR include three core tools:
• ODIN II for Verilog Elaboration and front-end
hard-block synthesis
• ABC for logic synthesis
• VPR for physical synthesis and analysis
VPR (Versatile Place and Route)

• VPR can perform placement and either global

routing or combined global and detailed
routing.
• It takes two input files, a netlist describing the
circuit to be placed(blif file) and routed, and a
description of the FPGA architecture(xml file)
 WORKFLOW OF VPR
• Include the architectural file and circuit file in
VPR using,
./vpr architecture.xml circuit_name[.blif] [-options]
• Packing of netlist file take place followed by
placement
• First the CLB’s will be placed randomly and the
corresponding time delay and wire length will be
calculated
• Rlimit will be set and initial cost will be calculated
• Based on the algorithm used , the placement
takes place and the minimum required cost
will be calculated
• Further routing takes place
 SIMULATED ANNEALING
• SA is a generic probabilistic meta-heuristic for
the global optimization problem.
• Its goal is merely to find an acceptably good
solution in a fixed amount of time, rather than
the best possible solution.
 PSEUDOCODE
S = RandomPlacement ();
T = InitialTemperature ();
Rlimit = InitialRlimit ();
Criticality_Exponent = ComputeNewExponent();
ComputeDelayMatrix();
while (ExitCriterion () == False) {
TimingAnalyze();
Previous_Wiring_Cost =Wiring_Cost(S);
Previous_Timing_Cost = Timing_Cost(S);
while (InnerLoopCriterion () == False) {
Snew = GenerateViaMove (S, Rlimit);
∆Timing_Cost = Timing_Cost(Snew) - Timing_Cost(S);
∆Wiring_Cost =Wiring_Cost(Snew) -Wiring_Cost(S);
∆C = λ·(∆Timing_Cost/Prev_Timing_Cost) +
(1-λ)·(∆Wiring_Cost/Previous_Wiring_Cost);
if (∆C < 0) {
S = Snew
}
else {
r = random (0,1);
if (r < e-∆C/T) {
S = Snew;
}}}
T = UpdateTemp ();
Rlimit = UpdateRlimit ();
Criticality_Exponent = ComputeNewExponent();
}
 GENETIC ALGORITHM
• GA are commonly used to generate high-
quality solutions to optimization.
• It search problems by relying on bio-inspired
operators such as mutation, crossover and
inversion
• CROSSOVER:
Crossover is the main genetic operator. It
operates on two parent individuals(CLB) and
generates an offspring.
• MUTATION:
Mutation produces incremental random
changes in the offspring generated by the
crossover.
• INVERSION:
Inversion changes the effective length of a
schema without altering the fitness of the
individual, in order to increase the survival
probability of longer schema.
 PSEUDOCODE
for i = 1 to σ do {Initialize the population}
new_population[i] = create_random_placement()
end for
loop {For time –OR– For set number of generations}
Rlimit = update_rlimit()
{Evaluates the populations based on the cost function and orders a
list}
ranked_population = evaluate_population(newpopulation,γ,λ)
{Create the next generation}
current_spot = floor(ω·σ)
for i = 1 to floor(ω·σ) do
{Create the children from the best parents}
new_population[i] = ranked_population[i]
{Copy the parents to the next generation}
 for j = 1 to α·ω·σ do
new_population[current_spot] =
mutate_genome_x_times(ranked_population[i],local_swaps,global_swap
s,Rlimit) current_spot + +
end for
end for
for i = 1 to floor(β ·σ) do {Create random individuals}
new_population[current_spot] = create_random_placement()
end for
end loop
 GASA ALGORITHM
• Two stages of process, namely GA and SA.
• It begins with process of GA. In this stage, the
algorithm works on a population as GA
• Obtaining improvement becomes difficult in
the late phase of the process of GA due to slow
convergence.
• SA is able to obtain improvements faster than
the GA in the late phase of the process.
• Therefore after a certain number of
generations, SA will take over from GA to
optimize one individual of the entire
population at a low temperature instead of an
entire population to overcome slow
convergence of GA in the late phase of
process.
 PSEUDOCODE
MAX GENS: maximum number of generations NUM
GENES: number of genes
POP SIZE: population size
RANDOM: decimal between 0 and 1
Pnew: new placement
Pold: old placement
T: temperature
R: possible movement range
Pcrossover: prob. ofcrossover rate
Plocal: prob. oflocal improvement rate
Pmutation: prob. ofmutation rate
Preserve: the percent ofpopulation are reserved in the
population t the next generation
Begin
initialize-Population()
while (generation < MAX GENS) do
evaluate_population_fitness ();
reproducepopulation (Preserve);
for i = I to POP SIZE/2 do
crossover (Pcrossover);
end for
for j=I to NUM GENES do
mutate(Pmutation);
end for
for i = I to POP SIZE do
local_improvement(Plocal);
end for
elitism();
end while
select the_best one();
R= set_block_movement_range();
/* following algorithm is pseudo-code ofSA*/ while (Exit
criterion() == FALSE) do
while (inner criterion( == FALSE) do
Pnew= generate movement (R, Pold)
AC = C (Pnew) - C (Pold);
RANDOM = generate-number();
if(RANDOM < e exp (-AC/T))
Pold = Pnew;
end
end while
end algorithm
 RESULT USING VPR
Architecture file: k4_N4_90nm.xml
Circuit name: alu4.blif

BB estimate of min-dist (placement) wirelength: 11562

bb_cost recomputed from scratch: 119.423
timing_cost recomputed from scratch: 5.27088e-07
delay_cost recomputed from scratch: 2.65144e-06
BEFORE PLACEMENT AFTER PLACEMENT
 REFERENCES
• Yang Meng, A.E.A. Almaini,Wang Pengjun(2006). FPGA Placement Optimization
by Two-Step Unified Genetic Algorithm and Simulated Annealing Algorithm.
Journal of electronics(china) Vol.23 No.4 Pp. 632-636 .
• S. Nazeer Hussain and K. Hari Kishore(2016). Computational Optimization of
Placement and Routing using Genetic Algorithm. Indian Journal of Science and
Technology, Vol 9(47).
• Jie Cui, Xue Chen, Yongmei Lei, Weimin Xu(2010). Improving the Efficiency of
Scheduling and Placement in FPGA by Small-world Model Based Genetic
Algorithm.10th IEEE International Conference on Computer and Information
Technology(CIT)
• Khushro Shahookar and Pinaki Mazumder(1990). A Genetic Approach to Standard
Cell Placement Using Meta-Genetic Parameter Optimization. IEEE Transactions on
Computer Aided Design Vol 9. No. 5 Pp 500-511
• V. Betz, J. Rose. VPR: A new packing, placement and routing tool for FPGA
research. Proc. of the Seventh Field Programmable Logic Applications, London,
UK, 1997, 213−222.
• C. Cheng. RISA: Accurate and efficient placement routability modeling. Proc. of
the 1994 IEEE/ACM Intl. Conf. CAD, San Jose, California, USA, 1994, 690−695.
• S. Kirkpatrick, C. D. Gelatt, and M. P. Vecchi, “Optimization by Simulated
Annealing”, Science, No. 220, pp. 671-680, 1983.