Instruction Set

Dr Narayana Swamy R
ARITHMETIC INSTRUCTIONS
• ADD
• 8-bit addition between the accumulator (A) and a second operand.
• The result is always in the accumulator.
• The CY flag is set/reset appropriately.
Example 1

Show how the flag register is affected by the following instructions.

After the addition, register A (destination) contains 00 and the flags are as follows:

CY = 1 since there is a carry out from D7.

P = 0 because the number of 1s is zero (an even number).

AC = 1 since there is a carry from D3 to D4.

• ADDC
• 8-bit addition between the accumulator, a second operand and the previous
value of the CY flag.
• Useful for 16-bit addition in two steps.
• The CY flag is set/reset appropriately.
When adding two 16-bit data operands, we need to be concerned with the propagation of a carry from the lower byte to the higher byte.
The instruction ADDC (add with carry) is used on such occasions. For example, look at the addition of 3CE7H + 3B8DH, as shown below.

When the first byte is added (E7 + 8D = 74, CY = 1). The carry is propagated to the higher byte, which results in 3C + 3B + 1 = 78 (all in hex).
Example 6-3 shows the above steps in an 8051 program.

Example 2

Write a program to add two 16-bit numbers. The numbers are 3CE7H and 3B8DH. Place the sum in R7 and R6; R6 should have the lower byte.
• DA A
• Decimal adjust the accumulator.
• Format the accumulator into a proper 2 digit packed BCD number.
• Operates only on the accumulator.
• Works only after the ADD instruction.
• BCD stands for binary coded decimal.
• BCD is needed because in everyday life we use the digits 0 to 9 for numbers, not binary or hex
numbers.
• Binary representation of 0 to 9 is called BCD.

• In computer literature one encounters two terms for BCD numbers,

• Unpacked BCD, and
• Packed BCD.
• Unpacked BCD
• Unpacked BCD requires 1 byte of memory or an 8-bit register
to contain it.
• In unpacked BCD, the lower 4 bits of the number represent
the BCD number, and the rest of the bits are 0.
• For example,
0000 1001 unpacked BCD for 9
0000 0101 unpacked BCD for 5
Packed BCD

In packed BCD, a single byte has two BCD numbers in it, one in the lower 4 bits, and one in the upper 4 bits.

For example, “0101 1001″ is packed BCD for 59H.

It takes only 1 byte of memory to store the packed BCD operands. And so one reason to use packed BCD is that it is twice as efficient in storing data.
There is a problem with adding BCD numbers, which must be corrected. The problem is that after adding packed BCD numbers, the result is no longer
BCD. Look at the following.

Adding these two numbers gives 0011 111 IB (3FH), which is not BCD! A BCD number can only have digits from 0000 to 1001 (or 0 to 9).
In other words, adding two BCD numbers must give a BCD result. The result above should have been 17 + 28 = 45 (0100 0101).
To correct this problem, the programmer must add 6 (0110) to the low digit: 3F + 06 = 45H.

The same problem could have happened in the upper digit (for example, in 52H + 87H = D9H).
Again to solve this problem, 6 must be added to the upper digit (D9H + 60H = 139H) to ensure that the result is BCD (52 + 87 = 139).
This problem is so pervasive that most microprocessors such as the 8051 have an instruction to deal with it.
In the 8051 the instruction “DA A” is designed/to correct the BCD addition problem. This is discussed next.

DA instruction
The DA (decimal adjust for addition) instruction in the 8051 is provided to correct the aforementioned problem associated with BCD addition.
The mnemonic “DA” has as its only operand the accumulator “A”. The DA instruction will add 6 to the lower nibble or higher nibble if needed;
otherwise, it will leave the result alone. The following example will clarify these points.
• SUBB A, source
• Subtract with Borrow. (In the 8051we have only SUBB)
• Subtract an operand and the previous value of the borrow(carry) flag from
the accumulator.
A ← A - <operand> - CY.
• The result is always saved in the accumulator.
• The CY flag is set/reset appropriately.
• To make SUB out of SUBB, we have to make CY = 0 prior to the execution of the
instruction.
• Therefore, there are two cases for the SUBB instruction:
• with CY = 0, and
• with CY = 1.
First we examine the case where CY = 0 prior to the execution of SUBB. Notice that we
use the CY flag for the borrow.

SUBB (subtract with borrow) when CY=0

• In subtraction, the 8051 microprocessors (indeed, all modern CPUs) use the 2′s complement method.
Although every CPU contains adder circuitry, it would be too cumbersome (and take too many transistors)
to design separate subtracter circuitry. For this reason, the 8051 uses adder circuitry to perform the
subtraction command. Assuming that the 8051 is executing a simple subtract instruction and that CY = 0
prior to the execution of the instruction, one can summarize the steps of the hardware of the CPU in
executing the SUBB instruction for unsigned numbers, as follows.

• Take the 2′s complement of the subtrahend (source operand).

• Add it to the minuend (A).
• Invert the carry.
These three steps are performed for every SUBB instruction by the internal hardware of the 8051 CPU,
regardless of the source of the operands, provided that the addressing mode is supported.
After these three steps the result is obtained and the flags are set. Example 5 illustrates the three steps.

Example 5
If the C Y = 0 after the execution of SUBB, the result is positive; if C Y = 1, the result is negative and the destination
has the 2′s complement of the result.

Normally, the result is left in 2′s complement, but the CPL (complement) and INC instructions can be used to change it.
The CPL instruction performs the 1 ‘s complement of the operand; then the operand is incremented (INC) to get the
2′s complement. See Example 6.

Example 6
SUBB (subtract with borrow) when CY= 1

This instruction is used for multibyte numbers and will take care of the borrow of the lower operand.
If CY = 1 prior to executing the SUBB instruction, it also subtracts 1 from the result. See Example 6-7.

Example 6-7

Analyze the following program:

Solution:

After the SUBB, A = 62H – 96H = CCH and the carry flag is set high indicating there is a borrow.
Since CY = 1, when SUBB is executed the second time A = 27H – 12H -1 = 14H. Therefore, we have 2762H – 1296H = 14CCH.
Multiplication of unsigned numbers

The 8051 supports byte-by-byte multiplication only. The bytes are assumed to be unsigned data. The syntax is as follows:

In byte-by-byte multiplication, one of the operands must be in register A, and the second operand must be in register B.
After multiplication, the result is in the A and B registers; the lower byte is in A, and the upper byte is in B.
The following example multiplies 25H by 65H. The result is a 16-bit data that is held by the A and B registers.
Division of unsigned numbers

In the division of unsigned numbers, the 8051 supports byte over byte only. The syntax is as
follows.

When dividing a byte by a byte, the numerator must be in register A and the denominator must be
in B. After the DIV instruction is performed, the quotient is in A and the remainder is in B. See the
following example.

Notice the following points for instruction “DIV AB”.

• INC
• Increment the operand by one.
• The operand can be a register, a direct address, an
• indirect address, the data pointer.
• DEC
• Decrement the operand by one.
• The operand can be a register, a direct address, an
• indirect address.
Program Control Instructions
• Conditional Jump Instructions
Conditional Jumps
• jz, jnz : Conditional on A=0
• Checks to see if A is zero
• jz jumps if A is zero and jnz jumps is A not zero
• No arithmetic op need be performed (unlike 8086/8085)
• djnz : dec a byte and jump if not equal to zero
• djnz Rn, rel
• djnz direct, rel
• jnc : Conditional on carry CY flag
• jc rel
• jnc rel
• cjne : compare and jump if not equal
• cjne A, direct, rel
• cjne Rn, #data, rel
• cjne @Rn, #data, rel
Branching Instructions
• The 8051 provides four different types of unconditional jump
instructions:
• Short Jump – SJMP
• Uses an 8-bit signed offset relative to the 1st byte of the next instruction.
• Long Jump – LJMP
• Uses a 16-bit address.
• 3 byte instruction capable of referencing any location in the entire 64K of program
memory.
Branching Instructions
• Absolute Jump – AJMP
• Uses an 11-bit address.
• 2 byte instruction
 The upper 3-bits of the address combine with the 5-bit opcode to
form the 1st byte and the lower 8-bits of the address form the 2nd
byte.
• The 11-bit address is substituted for the lower 11-bits of the PC to
calculate the 16-bit address of the target.
 The location referenced must be within the 2K Byte memory page
containing the AJMP instruction.

• Indirect Jump – JMP

• JMP @A + DPTR
Branching Instructions
• The 8051 provides 2 forms for the CALL instruction:
• Absolute Call – ACALL
• Uses an 11-bit address similar to AJMP
• The subroutine must be within the same 2K page.
• Long Call – LCALL
• Uses a 16-bit address similar to LJMP
• The subroutine can be anywhere.

• Both forms push the 16-bit address of the next instruction on

the stack and update the stack pointer.
Branching Instructions
• The 8051 provides 2 forms for the return instruction:
• Return from subroutine – RET
• Pop the return address from the stack and continue
execution there.
• Return from ISV – RETI
• Pop the return address from the stack.
• Restore the interrupt logic to accept additional interrupts at
the same priority level as the one just processed.
• Continue execution at the address retrieved from the stack.
• The PSW is not automatically restored.
Branching Instructions
• The 8051 supports 5 different conditional jump instructions.
• ALL conditional jump instructions use an 8-bit signed offset.

• Jump on Zero – JZ / JNZ

• Jump if the A == 0 / A != 0
• The check is done at the time of the instruction
execution.

• Jump on Carry – JC / JNC

• Jump if the C flag is set / cleared.
Branching Instructions
• Jump on Bit – JB / JNB
• Jump if the specified bit is set / cleared.
• Any addressable bit can be specified.

• Jump if the Bit is set then Clear the bit – JBC

• Jump if the specified bit is set.
• Then clear the bit.
Branching Instructions
• Compare and Jump if Not Equal – CJNE
• Compare the magnitude of the two operands and jump if they are not equal.
• The values are considered to be unsigned.
• The Carry flag is set / cleared appropriately.

 CJNE A, direct, rel

 CJNE A, #data, rel
 CJNE Rn, #data, rel
 CJNE @Ri, #data, rel
Branching Instructions
• Decrement and Jump if Not Zero – DJNZ
• Decrement the first operand by 1 and jump to the location
identified by the second operand if the resulting value is
not zero.

 DJNZ Rn, rel

 DJNZ direct, rel

• No Operation
• NOP
Loop using djnz
• Add 3 to A ten times
mov A, #0 ; clear A
mov R2, #10 ; R2  10, can also say 0AH
AGAIN: add A, #03 ; add 3 to A
djnz R2, AGAIN ; repeat until R2==0
mov R5, A ; save the result in R5

• Loop within loop using djnz

mov R3, #100
loop1: mov R2, #10 ; trying for 1000 loop iterations
loop2: nop ; no operation
djnz R2, loop2 ; repeat loop2 until R2==0
djnz R3, loop1 ; repeat loop1 until R3==0
Program Control Instructions
• Unconditional Branch
• ajmp addr11 ; absolute jump
• ljmp addr16 ; long jump
• sjmp rel ; short jump to relative address
• jmp @A+DPTR ; jump indirect

• Subroutine Call
• acall addr11 ; absolute subroutine call
• lcall addr16 ; long subroutine call
• ret ; return from subroutine call
• reti ; return from ISV
Unconditional Jumps
• LJMP addr16
• Long jump.
• Jump to a 2byte target address
• 3 byte instruction

• SJMP rel
• Jump to a relative address from PC+127 to PC-128
• Jump to PC + 127 (00H – 7FH)
• Jump to PC – 128 (80H – FFH)
Target Address
• Target address can be,
• absolute: A complete physical address
• addr16: 16 bit address, anywhere in the 64k
• addr11: 11 bit address, anywhere within 2k page.
• rel: relative (forward or backward) -128 bytes to +127 bytes from
the current code location
• Target address calculation for relative jumps
• PC of next instruction + rel address
• For jump backwards, drop the carry
• PC = 15H, SJMP 0FEH
• Address is 15H + FEH = 13H
• Basically jump to next instruction minus two (current
instruction)
Call Instructions
• Subroutines:
• Reusable code snippets
• LCALL addr16
• Long call.
• 3 byte instruction (first byte is the opcode, second and third byte
are used for address of the target subroutine).
• Call any subroutine in entire 64k code space
• PC is stored on the stack
• ACALL addr11
• 2 byte instruction
• Call any subroutine within 2k of code space
• Other than this, same behavior as LCALL
• Saves code ROM for devices with less than 64K ROM
• RET
• Return from a subroutine call, Pops PC from stack
Data Transfer Instructions
• MOV
• 8-bit data transfer for internal RAM and the SFR.
• MOV A, Rn MOV A, direct
• MOV A, @Ri MOV A, #data
• MOV Rn, A MOV Rn, direct
• MOV Rn, #data MOV direct, A
• MOV direct, Rn MOV direct, direct
• MOV direct, @Ri MOV direct, #data
• MOV @Ri, A MOV @Ri, direct
• MOV @Ri, #data
Data Transfer Operations
• MOV
• 1-bit data transfer involving the CY flag
• MOV C, bit
• MOV bit, C

• MOV
• 16-bit data transfer involving the DPTR
• MOV DPTR, #data
Data Transfer Instructions
• MOVC
• Move Code Byte
• Load the accumulator with a byte from program memory.
• Must use indexed addressing

 MOVC A, @A+DPTR
 MOVC A, @A+PC
Data Transfer Instructions
• MOVX
• Data transfer between the accumulator and a byte from external data
memory.
• MOVX A, @Ri
• MOVX A, @DPTR
• MOVX @Ri, A
• MOVX @DPTR, A
Data Transfer Instructions
• PUSH / POP
• Push and Pop a data byte onto the stack.
• The data byte is identified by a direct address from the internal RAM
locations.

• PUSH DPL
• POP 40H
Data Transfer Instructions
• XCH
• Exchange accumulator and a byte variable
• XCH A, Rn
• XCH A, direct
• XCH A, @Ri

• XCHD
• Exchange lower digit of accumulator with the lower digit of the
memory location specified.
• XCHD A, @Ri
• The lower 4-bits of the accumulator are exchanged with the lower
4-bits of the internal memory location identified indirectly by the
index register.
• The upper 4-bits of each are not modified.
Logical Operations
• ANL / ORL
• Work on byte sized operands or the CY flag.
• ANL A, Rn
• ANL A, direct
• ANL A, @Ri
• ANL A, #data
• ANL direct, A
• ANL direct, #data
• ANL C, bit
• ANL C, /bit
Logical Operations
• XRL
• Works on bytes only.

• CPL / CLR
• Complement / Clear.
• Work on the accumulator or a bit.
• CLR P1.2
Logical Operations
• RL / RLC / RR / RRC
• Rotate the accumulator.
• RL and RR without the carry
• RLC and RRC rotate through the carry.

• SWAP A
• Swap the upper and lower nibbles of the accumulator.

• No compare instruction.
• Built into conditional branching instructions.
Boolean Operations
• This group of instructions is associated with the single-bit
operations of the 8051.
• This group allows manipulating the individual bits of bit
addressable registers and memory locations as well as the CY
flag.
• The P, OV, and AC flags cannot be directly altered.

• This group includes:

• Set, clear, and, or complement, move.
• Conditional jumps.
Boolean Operations
• CLR
• Clear a bit or the CY flag.
• CLR P1.1
• CLR C

• SETB
• Set a bit or the CY flag.
• SETB A.2
• SETB C

• CPL
• Complement a bit or the CY flag.
• CPL 40H ; Complement bit 40 of the bit
addressable memory
Boolean Operations
• ORL / ANL
• OR / AND a bit with the CY flag.
• ORL C, 20H ; OR bit 20 of bit addressable
; memory with the CY flag

• ANL C, /34H ; AND complement of bit 34 of bit

addressable memory with the CY flag.
• MOV
• Data transfer between a bit and the CY flag.
• MOV C, 3FH ; Copy the CY flag to bit 3F of the
bit addressable memory.
• MOV P1.2, C ; Copy the CY flag to bit 2 of P1.
Boolean Operations
• JC / JNC
• Jump to a relative address if CY is set / cleared.

• JB / JNB
• Jump to a relative address if a bit is set / cleared.
• JB ACC.2, <label>

• JBC
• Jump to a relative address if a bit is set and clear the bit.