MAC UNIT DESIGN

USING BARREL SHIFTER

 WHAT IS MAC?
• In computing especially in digital signal processing the multiply–accumulate
operation is a common step that computes the product of two numbers and
adds that product to an accumulator. The hardware unit that performs the
operation is known as a multiplier–accumulator (MAC, or MAC unit); the
operation itself is also often called a MAC or a MAC operation. The MAC
operation modifies an accumulator a as:

• When done with floating point numbers, it might be performed with

two rounding (typical in many DSPs), or with a single rounding. When
performed with a single rounding, it is called a fused multiply–add (FMA)
or fused multiply–accumulate (FMAC).
BLOCK DIAGRAM
 USING BARREL SHIFTER DESIGN OF
MULTIPLIER
• Using simple shift we can do multiplication by 2.
• Multiplication using shift Verilog code
 DESIGN OF ADDER
• Adder are two type:
• Half adder
• Full adder
FULL ADDER
HALF ADDER
 DESIGN OF ADDER
• CAN BE DESIGNED BY FOLLWING WAYS:
• RIPPLE CARRY ADDER
• LOOK AHEAD CARRY ADDER
RIPPLE CARRY ADDER
LOOK AHEAD CARRY ADDER
• module par_addsub(a,b,cin,sum,cout);
MAC UNIT VERILOG CODE
• input [7:0] a;

• input [7:0] b;

• input cin;

• output reg [7:0] sum;

• output reg cout;

• reg [8:0] c;

• integer i;

• always @ (a or b or cin)

• begin

• c[0]=cin;

• if (cin == 0) begin

• for ( i=0; i<8 ; i=i+1)

• begin

• sum[i]= a[i]^b[i]^c[i];

• c[i+1]= (a[i]&b[i])|(a[i]&c[i])|(b[i]&c[i]);

• end

• end

• else if (cin == 1) begin

• for ( i=0; i<8 ; i=i+1)

• begin
• sum[i]= a[i]^(~ b[i])^c[i];
MAC UNIT VERILOG CODE
• c[i+1]= (a[i]&(~b[i]))|(a[i]&c[i])|((~b[i])&c[i]);

• end

• end

• cout=c[8];

• end

• endmodule

• module mac(s,a,b,acc,cin,co);

• output reg[7:0] s;

• output reg co;

• reg [7:0] p;

• input [3:0]a,b;

• input [7:0]acc;

• input cin;

• wire [7:0] ss;

• wire coo;
SIMULATION
RTL SCMANTIC
 CONCLUSION
• Mac unit is an important part in drm processor.
• Mac unit can be designed by Barrel Shifter
•Thank You