Signal Expressions

•Multiply out:
F = ((X + Y) × Z) + (X × Y × Z)
= (X × Z) + (Y × Z) + (X × Y ×
Digital Systems Design 1
New circuit, same function
Sum of Products

Digital Systems Design 2

Product of Sums Form

Digital Systems Design 3

 Sum-of-products form

AND-OR

NAND-NAND

Digital Systems Design 4

 Product-of-sums form

OR-AND

NOR-NOR

Digital Systems Design 5

Shortcut: Symbol substitution

Digital Systems Design 6

Different circuit, same function

Digital Systems Design 7

 Combinational-Circuit Analysis
• Combinational circuits -- outputs depend only on
current inputs (not on history).
• Kinds of combinational analysis:
– exhaustive (truth table)
– algebraic (expressions)
– simulation / test bench
• Write functional description in HDL
• Define test conditions / test vectors
• Compare circuit output with functional description (or known-
good realization)
• Repeat for “random” test vectors

Digital Systems Design 8

 Combinational-Circuit Design

• Sometimes you can write an equation or equations

directly using “logic” (the kind in your brain).
• Example (alarm circuit):

• Corresponding circuit:

Digital Systems Design 9

 Alarm-circuit transformation
• Sum-of-products form
– Useful for programmable logic devices
• “Multiply out”:

Digital Systems Design 10

 row N3 N2 N1 N0 F
0 0 0 0 0 0
1 0 0 0 1 1
Brute-force design 2 0 0 1 0 1
3 0 0 1 1 1
4 0 1 0 0 0
• Truth table --> 5 0 1 0 1 1
canonical sum 6 0 1 1 0 0
(sum of minterms) 7 0 1 1 1 1
• Example: 8 1 0 0 0 0
9 1 0 0 1 0
prime-number & 1 detector
10 1 0 1 0 0
– 4-bit input, N3N2N1N0 11 1 0 1 1 1
F = SN3N2N1N0(1,2,3,5,7,11,13) 12 1 1 0 0 0
13 1 1 0 1 1
14 1 1 1 0 0
15 1 1 1 1 0
Digital Systems Design 11
Minterm list --> canonical sum

Recall T10

Digital Systems Design 12

 Algebraic simplification
• Theorem T10

• Reduce number of gates and gate inputs

Digital Systems Design 13

Resulting circuit

Digital Systems Design 14

 Circuit Optimization
• Goal: To obtain the simplest implementation
for a given function
• Optimization is a more formal approach to
simplification that is performed using a specific
procedure or algorithm
• Optimization requires a cost criterion to
measure the simplicity of a circuit
• Two distinct cost criteria we will use:
– Literal cost (L)
– Gate input cost (G) and cost with NOTs (GN)

Systems Design 15
 Literal Cost
• Literal – a variable or it complement
• Literal cost – the number of literal appearances in
a Boolean expression corresponding to the logic
circuit diagram
• Examples:
– F = BD + AB’C + AC’D’ L=8
– F = BD + AB’C + AB’D’ + ABC’ L =11
– F = (A + B)(A + D)(B + C +D’)(B’ + C’ + D) L =10
– Which solution is best?

Digital Systems Design 16

 Gate Input Cost
• Gate input costs - the number of inputs to the gates in the implementation
corresponding exactly to the given equation or equations. (G - inverters not
counted, GN - inverters counted)
• For SOP and POS equations, it can be found from the equation(s) by
finding the sum of:
– all literal appearances
– the number of terms excluding terms consisting only of a single literal,(G) and
– optionally, the number of distinct complemented single literals (GN).
• Example:
– F = BD + AB’C + AC’D’ G = 11, GN = 14
– F = BD + AB’C + AB’D’ + ABC’ G = 15 , GN = 19
– F = (A + B)(A + D)(B + C +D’)(B’ + C’ + D) G = 14 , GN = 17
– Which solution is best?

Digital Systems Design 17

 Cost Criteria (continued)
• Example 1: GN = G + 2 = 9
L=5
• F = A + B C + B’C’
G=L+2= 7
B
C
A F

 L (literal count) counts the AND inputs and the single

literal OR input.
 G (gate input count) adds the remaining OR gate inputs
 GN(gate input count with NOTs) adds the inverter inputs
Digital Systems Design 18
 Cost Criteria (continued)
A
• Example 2: B
• F = A B C + A’B’C’ C
• L = 6 G = 8 GN = 11 F
• F = (A + C’ )( B’ + C)( A’ + B)
• L = 6 G = 9 GN = 12
• Same function and same
literal cost A
• But first circuit has better B
gate input count and better C
gate input count with NOTs F
• Select it!

Digital Systems Design 19

 Boolean Function Optimization
• Minimizing the gate input (or literal) cost of a (a set of)
Boolean equation(s) reduces circuit cost.
• We choose gate input cost.
• Boolean Algebra and graphical techniques are tools to
minimize cost criteria values.
• Some important questions:
– When do we stop trying to reduce the cost?
– Do we know when we have a minimum cost?
• Treat optimum or near-optimum cost functions
for two-level (SOP and POS) circuits first.
• Introduce a graphical technique using Karnaugh maps (K-
maps, for short)

Digital Systems Design 20

 Karnaugh Maps (K-map)
• A K-map is a collection of squares
– Each square represents a minterm
– The collection of squares is a graphical representation of a
Boolean function
– Adjacent squares differ in the value of one variable
– Alternative algebraic expressions for the same function are
derived by recognizing patterns of squares
• The K-map can be viewed as
– A reorganized version of the truth table
– A topologically-warped Venn diagram as used to visualize sets in
algebra of sets

Digital Systems Design 21

 Some Uses of K-Maps

• Provide a means for:

– Finding optimum or near optimum
• SOP and POS standard forms, and
• two-level AND/OR and OR/AND circuit implementations
for functions with small numbers of variables
– Visualizing concepts related to manipulating
Boolean expressions, and
– Demonstrating concepts used by computer-aided
design programs to simplify large circuits

Digital Systems Design 22

 Two Variable Maps
• A 2-variable Karnaugh Map: y=0 y=1
– Note that minterm m0 and
minterm m1 are “adjacent” m0 = m1 =
x=0
and differ in the value of the xy xy
variable y x = 1 m2 = m3 =
– Similarly, minterm m0 and xy xy
minterm m2 differ in the x variable.
– Also, m1 and m3 differ in the x variable as well.
– Finally, m2 and m3 differ in the value of the variable y

Digital Systems Design 23

 K-Map and Truth Tables
• The K-Map is just a different form of the truth table.
• Example – Two variable function:
– We choose a,b,c and d from the set {0,1} to implement a
particular function, F(x,y).
Function Table
Input Function K-Map
Values Value
(x,y) F(x,y) y=0 y=1
00 a
01 b
x=0 a b
10 c x=1 c d
11 d
Digital Systems Design 24
 K-Map Function Representation

F=x y=0 y=1

• Example: F(x,y) = x x=0 0 0

x=1 1 1

• For function F(x,y), the two adjacent cells containing 1’s

can be combined using the Minimization Theorem:
F( x , y ) = x y + x y = x

Digital Systems Design 25

 K-Map Function Representation

G = x+y y = 0 y = 1

• Example: G(x,y) = x + y x=0 0 1

x=1 1 1

• For G(x,y), two pairs of adjacent cells containing 1’s can be

combined using the Minimization Theorem:

G( x , y ) = (x y + x y )+ (xy + x y )= x + y
Duplicate xy
Digital Systems Design 26