Professional Documents
Culture Documents
Ultralow-Voltage High-Speed Flash ADC Design
Ultralow-Voltage High-Speed Flash ADC Design
ANALOG TO DIGITAL
converter(Flash ADC)
UJJAYINI DEBNATH
03102072017
M.tech, VLSI design
Introduction
• analog-to-digital converters (ADCs) are required for
many applications, such as disk drive front-ends,
high-speed backplanes, ultra wideband receivers,
and millimeter-wave receivers
• Conventionally, the highly digital flash architecture
is the most suitable candidate for high-speed
applications “because of its low latency”
FLASH ADC
10. Satyabrata Nanda, Avipsa S. Panda. “Design of Conventional Three-stage CMOS comparator in 90nm CMOS
Technology and comparative analysis with its counterparts”, International Conference on Smart Sensor and
Systems (IC-SSS), 2015.
11. Iffa Sharauddin and L.Lee, “Modified SR Latch in Dynamic comparator for Ultra-low Power SAR ADC”, IEEE
International Circuits and Systems Symposium (ICSYS), 2015.
12. Sudakar S. Chauhan, S. Manabala, S.C. Bose and R. Chandel, “A New Approach to Design Low- Power
CMOS Flash A/D Converter”, International Journal of VLSI Design &Communication Systems (VLSICS) Vol. 2,
No. 2, June 2011.
13. Hadi Aghabeigi, Mchdi Jafaripanah, “High Speed Low-power Voltage Comparator in 0.18 um CMOS Process
for Flash ADCs”, 4th International Conference of Knowledge-Based Engineering and Innovation (KBEI-2017).
14. Felix Lang, Thomas Alpert , Damir Ferenci, Markus Grozing, Menfred Berroth, “A 6 Bit 25 GS/s Flash
Intepolating ADC in 90 nm CMOS Technology”, Institute of Electrical and Optical Communication Engineering
15. "Integrated Analog-to-Digital and Digital-to-Analog Converters", R. van de Plassche, ADCs, Kluwer Academic
Publishers, 1994.
16. "A Precise Four-Quadrant Multiplier with Subnanosecond Response", Barrie Gilbert, IEEE Journal of Solid-
State Circuits, Vol. 3, No. 4 (1968), pp. 365–373