Register Transfer and Micro-

operations

C.Ravindra Murthy

December 7, 2021 C.Ravindra Murthy 1

Micro-operation
 An elementary operation performed during one clock pulse,
on the information stored in one or more registers
 R  f(R, R)
f: shift, count, clear, load, add, …

1 Clock
Registers (R) ALU (f) Cycle

December 7, 2021 C.Ravindra Murthy 2

Register Transfer Language
 Definition of organization of a computer
 Set of registers and their functions
 Micro-operation set
 Set of allowable micro-operations provided by the organization
of the computer
 Control signals that initiate the sequence of micro-
operations
 For any function of the computer, a sequence of
micro-operations is used to describe it

December 7, 2021 C.Ravindra Murthy 3

Register Transfer Language
 A symbolic language
 A convenient tool for describing the internal
organization of digital computers
 Can also be used to facilitate the design
process of digital systems

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Register Transfer
 Designation of a register
 A register
 Portion of a register
 A bit of a register
 Common ways of drawing the block diagram of a register

Register Showing individual bits

R1 7 6 5 4 3 2 1 0

15 0 15 8 7 0
R2 PC (H) PC (L)

Numbering of bits Sub fields

December 7, 2021 C.Ravindra Murthy 5

Register Transfer
 Representation of a transfer (Parallel)
 R2  R1
 A simultaneous transfer of all bits from the source to
the destination register, during one clock pulse
 Representation of a controlled (conditional)
transfer
 P: R2  R1
 A binary condition(p=1) which determines when the
transfer is to occur
if (P=1) then (R2  R1)
December 7, 2021 C.Ravindra Murthy 6
Hardware Implementation of
Controlled Transfer
 Implementation of controlled transfer P: R2  R1
Control P Load Clock
R2
circuit
n

Block Diagram
R1

Timing Diagram

Clock

Load
Transfer occurs here

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 Basic Symbols for Register
Transfer
Symbols & Description Meaning
numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)

Arrow  Denotes transfer of information R2  R1

Colon : Denotes termination of control function P:

Comma , Separates two micro-operations A B, B  A

Capital Letters Denotes a register MAR, R2

December 7, 2021 C.Ravindra Murthy 8

Bus and Memory Transfer
 Bus is a path (of a group of wires) over which information is transferred, from any of several
sources to any of several destinations.
 From register to a bus: BUS  R

Register A Register B Register C Register D

Bus Lines

December 7, 2021 C.Ravindra Murthy 9

 Bus and Memory Transfer
Register A Register B Register C Register D
1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

B1 C1 D1 B2 C2 D2 B3 C3 D3 B4 C4 D4

0 4x1 0 4x1 0 4x1 0 4x1

MUX MUX MUX MUX
X

Y
Select
4 Line Bus

December 7, 2021 C.Ravindra Murthy 10

Transfer from Bus to a
Destination Register
Bus Lines

Load
Reg. R0 Reg. R1 Reg. R2 Reg. R3

z D0 D1 D2 D3
Select E Enable
w 2 x 4 Decoder

Three State Bus Buffers

Normal Input A Output Y = A if C =1

Normal Input C High Impedance if C = 0

December 7, 2021 C.Ravindra Murthy 11

Bus Lines with Three State
Buffers
Bus Line for Bit 0
A0

B0

C0

D0

S0 0
Select
1
S1
2
Enable 3

December 7, 2021 C.Ravindra Murthy 12

Memory Transfers
Read
AR Memory
unit Write

DR

Memory read micro-op: DR  M ( DR  M[AR] )

Memory write micro-op: M  DR ( M[AR]  DR )

December 7, 2021 C.Ravindra Murthy 13

Summary of Register Transfer
Micro-operations
AB Transfer content of register B into register A
AR  DR(AD) Transfer content of AD portion of reg. DR into reg. AR
A  constant Transfer binary content to reg. A
ABUS  R1, Transfer content of R1 into bus A and, at the same time,
R2  ABUS transfer content of bus A into reg. R2
AR Address Register
DR Data Register
M[R] Memory word specified by reg. R
M Equivalent to M[R]
DR  M Memory read operation: transfers the content of memory word
specified by AR into DR
M  DR Memory write operation: transfers the content of DR into
memory word specified by AR
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Arithmetic Micro-operations

R3  R1 + R2 Contents of R1 + R2 transferred to R3
R3  R1 – R2 Contents of R1 – R2 transferred to R3
R2  R2’ Complement the content of R2
R2  R2’ + 1 2’s complement the content of R2 (negate)
R3  R1 + R2’ +1 Subtraction
R1  R1 + 1 Increment
R1  R1 – 1 Decrement

December 7, 2021 C.Ravindra Murthy 15

Types Micro-operations
 Four types of Micro-operations
 Register Transfer Micro-operations
 Arithmetic Micro-operations
 Logic Micro-operations
 Shift Micro-operations

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 Binary Adder
B3 A3 B2 A2 B1 A1 B0 A0

C4 C3 C2 C1
FA FA FA FA C0

Binary Adder
S3 S2 S1 S0

B3 B2 B1 B0
M

A3 A2 A1 A0

C4 C3 C2 C1
FA FA FA FA C0

Adder-Subtractor
S3 S2 S1 S0
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Binary Increment
A3 A2 A1 A0 1

x y x y x y x y
HA HA HA HA
C S C S C S C S

C3 S3 S2 S1 S0

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 Arithmetic Circuit Cin
S0
S1 C0
A0 X0
S0 D0
S1
FA
B3 0 4x1
Y0
S1 S0 Cin Y Micro- 1 MUX
operation 2
3 C1
0 0 0 B Add A1 X1
D1
0 0 1 B Add with Carry
S0 FA
S1
B3 0 4x1
Y1
0 1 0 B’ Subtract with 1 MUX
borrow 2
3 C2
0 1 1 B’ Subtract A2 X2 D2
S0 FA
1 0 0 0 Transfer A S1
B3 0 4x1
1 0 1 0 Increment A Y2
1 MUX
2
1 1 0 1 Decrement A 3
A3 X3 C3 D3
1 1 1 1 Transfer A
S0 FA
S1
B3 0 4x1
Y3
1 MUX Cout
2
0 3

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