Lecture 4

Digital Logic Design

Outline
 TTL Circuits
 Boolean Algebra
 Karnaugh Map
Integrated Circuits
Levels of Integration
 SSI  <12 gates
 MSI  12 -100 gates
 LSI  >100 gates

Example: ?????
Technologies and Families
 Bipolar
◦ Bipolar transistors on a chip
◦ Faster
◦ Suitable for SSI & MSI
 MOS
◦ Suitable for LSI
◦ Small Size
Bipolar Family
MOS Family
TTL Devices
Propagation Delay Time
Power Dissipation
 A standard TTL gate  10mW
Standard TTL Devices
Other TTL devices
 5400 series
◦ Supply Range: 4.5-5.5V
◦ -55 to 125⁰C
◦ High cost
 High Speed TTL
◦ 74H00,74H01,74H02
◦ 22mW, 6ns
 Low-Power TTL
◦ 74L01, 74L02
◦ 1mW, 35ns
Reading Assignment
 Schottky TTL
Floating Inputs
Worst Case Input Voltages
 VIL  0 to 0.8V
 VIH  2 to 5V
Worst Case Output Voltages
 VoL  0 to 0.4V
 VoH  2.4 to 5V
Compatibility
Noise Margin
 0.4V
Sinking Current
 A TTL Device can sink current when low
output.
 Negative Sign Convention current is
out of the device.
Sourcing Current
 A TTL Device can source current when
high output.
 Positive Sign Convention current is into
of the device.
TTL Loading
 Fanout =10
Boolean Algebra
Boolean Expression
Sum of Products
Sum of Products
Example- 1
 Derive the equation and circuit for output
Y.
Example- 2
 Derive the equation
and circuit for output Y.
Algebraic Simplification
Algebraic Simplification
Algebraic Simplification
Algebraic Simplification
Karnaugh Map
 Example -1: 2-input Variable
Karnaugh Map
 Example - 2: 3-input Variable
Karnaugh Map
 Example -3: 4-input Variable
Karnaugh Maps - Allowance
Karnaugh Maps - Allowance
Karnaugh Maps - Allowance
Karnaugh Maps - Allowance
Summary of Karnaugh Maps
Example:
Don’t Care Conditions
Don’t Care Condition - Example