Under the guidence of Mr.

NAVEEN (Assistence profeesor)

BY: P.NEERAJA
148R1D5711
M.Tech 1st Year
VLSI SD
 AIM
 current embedded processors often include a
large register file (RF) to increase performance.
However, a larger RF aggravates the static
power issues associated with technology
shrinking.Therefore, approaches to improve
static power consumption of large RFs are in
high demand
 ADVANTAGES
 Saving the leakage power by shutting 0ff the
idle block.
 Good understanding and careful design.
 cost of the power gating technique interms of
power area.
APPLICATIONS
 CONCLUSION
 Controlling leakage is crucial for future
scaling
 Power gating and voltage islands are
effective techniques to minimize leakage and
active power
 Special consideration to clock distribution
must be given in high performance designs to
minimize clock power
.