The Connection: Truth Tables to

Functions
a b c F Condition that a is 0, b is 0, c is 1.
0 0 0 0
0 0 1 1 
abc
0 1 0 1 
abc
0 1 1 
1 abc
Function F is true if any of
1 0 0 0 these and-terms are true!
1 0 1 1 
abc
1 1 0 
1 abc OR
1 1 1 0



F
(
a
b

c
)
(
a
b

c
)
(
a
b

c
)
(
a
b

c
)

(
a
bc
)
Sum-of-Products form
Minterm Shorthand
a b c F A minterm has one literal for each
0 0 0 0  =
abc input variable, either in its normal
or complemented form.
0 0 1 1  m
abc =0
0 1 0 1  m
abc =1 Note: Binary ordering
0 1 1 1  m
abc =2
1 0 0 0  m
abc =3
1 0 1 1  m
abc =4
1 1 0 1  m
abc =5
A canonical sum-of-products form of an
expression consists only of minterms OR’d
1 1 1 0  m
abc =6 together
m7

F(
a
bc
)(a
b
ca
)(
b
c
)
(
a
b
c
)(
a
bc
)

F m1+ m
2+ m
3+ m
5+ m6
F
=
m
(1
,
2,
3,
5,
6)
Minterms of Different Sizes
Two variables: Four variables:
a b minterm a b c d minterm
0 0 a’b’ = m0 0 0 0 0 a’b’c’d’ = m0
0 0 0 1 a’b’c’d = m1
0 1 a’b = m1 0 0 1 0 a’b’c d’ = m2
1 0 a b’ = m2 0 0 1 1 a’b’c d = m3
1 1 a b = m3 0 1 0 0 a’b c’d’ = m4
0 1 0 1 a’b c’d = m5
Three variables: 0 1 1 0 a’b c d’ = m6
a b c minterm 0 1 1 1 a’b c d = m7
0 0 0 a’b’c’ = m0 1 0 0 0 a b’c’d’ = m8
0 0 1 a’b’c = m1 1 0 0 1 a b’c’d = m9
0 1 0 a’b c’ = m2 1 0 1 0 a b’c d’ = m10
0 1 1 a’b c = m3 1 0 1 1 a b’c d = m11
1 0 0 a b’c’ = m4 1 1 0 0 a b c’d’ = m12
1 0 1 a b’c = m5 1 1 0 1 a b c’d = m13
1 1 0 a b c’ = m6 1 1 1 0 a b c d’ = m14
1 1 1 a b c = m7 1 1 1 1 a b c d = m15
Sum-of-Products Minimization
F in canonical sum-of-products form (minterm form):



F
(
a
b

c
)
(
a
b

c
)
(
a
b

c
)
(
a
b

c
)

(
a
bc
)

Use algebraic manipulation to make a simpler sum-of-products form

Use commutativity to reorder to group similar terms Duplicate term - OK


F
(
a

b
c
)
(
a
b

c
)
(
a
b
c
)
(
a
b

c
)
(
a
b
c
)
(
a
b
c
)


F
(
aa
)(
bc
)(
c
c 
)(
ab
)
(
a
a 
)(
bc
)
Use distributivity
Use x’+x = 1 identity
to factor out

F(
bc
)(
ab
)(
bc
) common terms
We will find a better method (K-maps) later…
Product-of-Sums from a Truth Table
A B C F F
0 0 0 0 1
0 0 1 0 1 Find an expression
0 1 0 0 1 for F’ (the complement)
0 1 1 1 0
1 0 0 1 0
1 0 1 1 0
1 1 0 1 0
1 1 1 1 0


FAB
CA
BC
ABC

FAB
CA
BC
ABC Complement both sides…


FA
B
C
AB
C
AB
C Use DeMorgan’s Law

F(
A
B
C
)(
A
B
C
)(
A
B)to
C re-express as
product-of sums
Maxterms
A B C F F
0 0 0 0 1
0 0 1 0 1
0 1 0 0 1 

F
(
A
B
C
)
(
A
B

C
)
(
A
B
C
)
0 1 1 1 0
1 0 0 1 0
1 0 1 1 0
0 Maxterms
1 1 0 1
1 1 1 1 0

 To find a Product-of-Sums form for a truth table

 Make one maxterm for each row in which the function is
zero
 For each maxterm, each variable appears once
 In its complemented form if it is one in the row

 In its regular form if it is zero in the row

 Maxterm Shorthand
Product of Sums
A B C Maxterms
0 0 0 A + B + C = M0
0 0 1 A + B + C = M1
0 1 0 A + B + C = M2
0 1 1 A + B + C = M3
1 0 0 A + B + C = M4
1 0 1 A + B + C = M5
1 1 0 A + B + C = M6
1 1 1 A + B + C = M7

F in canonical maxterm form:


F(
ABC
)(A
BC
)
(A
BC
)

FM
0 M
1M 2

FM(0
,1
,2)
Boolean operations and gates

 Theorem: Any operation than can be

represented by a truth table can be
represented in Boolean algebra
 All truth tables can be made out of only and,
or, and not functions
NAND/NOR expressions
Any expression can be made of and ANDs, ORs and NOTs

We can make ANDs and ORs from NANDs and NORs and NOTs

Thus, we can make any expression out of NANDs, NORs, and NOTs

We can make NOTs out of a single NAND gate

X X

So, we can make any expression out of just NANDs and NORs

note: NANDs and NORs are easy to build with switches

NAND-only circuits
Using DeMorgan’s Law

NORs can be made with NANDs!

We can make any Boolean expression out of only NAND Gates

NANDs can be made out of NORs!

We can make any Boolean expression out of only NOR Gates

Sum-of-Products Circuits with
Introduce Double Inverters
NANDs

DeMorgan’s
Law Sum-of-Products
works well with NANDs
Product-of-Sums Circuits with
Introduce Double Inverters
NORs

DeMorgan’s
Law
Product-of-Sums
works well with NORs
 Converting General Circuits to
Introduce Double Inverters
NANDs to make NANDs:
A
B



D
C
 Add inverters as needed to
B
 maintain correct polarity


A
C Represent inverters with


D NANDs
B
D

Seven-Segment Example
A seven-segment display is used to display numbers

a
abcdef acdfg
f b
g
e c bc acdefg
d

abdeg abc

abcdg abcdefg

bcfg abcdfg
Seven Segment Truth Table
Inputs: Four binary inputs, interpreted as a four-bit binary number
Outputs: Seven outputs, for each of the seven segments
number A B C D a b c d e f g
0 0 0 0 0 1 1 1 1 1 1 0 segment a = A’B’C’D’ +
1 0 0 0 1 0 1 1 0 0 0 0 A’B’CD’ + A’B’CD + A’BC’D +
2 0 0 1 0 1 1 0 1 1 0 1 A’BCD’ + A’BCD + AB’C’D’ +
AB’C’D (canonical SOP)
3 0 0 1 1 1 1 1 1 0 0 1
4 0 1 0 0 0 1 1 0 0 1 1
5 0 1 0 1 1 0 1 1 0 1 1
6 0 1 1 0 1 0 1 1 1 1 1 segment a = A’C + A’BD +
AB’C’ + B’C’D’ (minimal
7 0 1 1 1 1 1 1 0 0 0 0
SOP)
8 1 0 0 0 1 1 1 1 1 1 1
9 1 0 0 1 1 1 1 1 0 1 1 segment a = (A+B+C+D’)
10 1 0 1 0 x x x x x x x (A+B’+C+D) (canonical
11 1 0 1 1 x x x x x x x and minimal POS)
12 1 1 0 0 x x x x x x x
13 1 1 0 1 x x x x x x x
14 1 1 1 0 x x x x x x x Invalid inputs, assume zero
15 1 1 1 1 x x x x x x x
Circuits for Segment a
segment a = A’C + A’BD + AB’C’ + B’C’D’ (minimal SOP)

A
B
D C
a
B A
C
D
A B C D
segment a = (A+B+C+D’) (A+B’+C+D)
(canonical and minimal POS)