CSE341 Lecture Notes Fall 2009

Arithmetic for Computers

In this topic we will discuss how

Remember two's complement

Basic arithmetic is performed on signed
numbers Ex: write -38 in 32 bits

Addition, Write 38 = 0010 0110

Subtraction,
Invert bits = 1101 1001
Multiplication
Add 1 = 0000 0001
Division
-----------------------------
-38 1101 1010
---------------------------------
 How real numbers are represented? Invert bits = 0010 0101
Add 1 = 0000 0001

And how is the architecture for arithmetic. ----------------------------------
38 0010 0110

The most negative number is an exception.

Lets write -128

-128 1000 0000

---------------------------------
Invert bits = 0111 1111
Add 1 = 0000 0001
----------------------------------
-128 1000 0000

We should find 128 but we found -128 again.

Because we don't have enough bits to write
128 1
in an 8 bit signed representation
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers

Intuition :Negative numbers have 1 in the most significant

digit. Unlike parity bit representation, in two's complement
the most significant bit has a weight in the magnitude of
the number.
If hex representation you have F in the beginning
0xFFFF = -1
Binary addition and subtraction
A nice thing about the two's complement is that
subtraction can be done easily using addition.
Ex: find 69+12?
Ex: find 12-69 do subtraction via
addition -69+(12)
1111 1111 1111 1111 1111 1111 0011
0000 0000 0000 0000 0000 0000 0000 1100 (12)
1111 1111 1111 1111 1111 1111 1011 1011 (-69)
+-------------------------------------------
1111 1111 1111 1111 1111 1111 1100 0111 (-57)
Why it works? Because to calculate -3 we can
subtract 3 from 0.
we can can calculate 0-3 with borrowing

Lets go to 8 bits
1
11111 111 Borrow
1 Carry Row
0 = 0000 0000
3 = 0000 0011
0000 0000 0000 0000 0000 0000 0100 0101 (69)
--------------
1111 1101
0000 0000 0000 0000 0000 0000 0000 1100 (12)
+----------------------------------------
Lets calculate -10
11111 110 Borrow
0000 0000 0000 0000 0000 0000 0101 0001 (81)
0 = 0000 0000
10= 0000 1010
---------------
Ex: find 69-12 do subtraction via addition 69+(-12) -10= 1111 0110

1111 1111 1111 1111 1111 1111 11 1 You can do the same with decimals
0000 0000 0000 0000 0000 0000 0100 0101 (69) -349
0 = 0000 0000
1111 1111 1111 1111 1111 1111 1111 0100 (-12) 349= 0000 0349
+------------------------------------------- -------------------
9999 9651
0000 0000 0000 0000 0000 0000 0011 1001 (57) 2
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers

Overflow : If we cannot represent the result with the

available hardware, overflow occurs. Some operations like the ones on addresses of
memory use unsigned numbers and simply ignore the
In addition: overflow can occur if signs are the same overflow.

Never happens if signs are different because with different Overflow is ignored in unsigned numbers!
signs the result is always less than both operands.
Solution to understand overflow is to have a signal or
In subtraction: Overflow can occur if signs are different. exception. (or interrupt)

Never happens if signs are the same. Think of subtraction
as addition of negated subtracted
x-y = x+ (-y).
How do we detect it?
 If you add two positive numbers and the result is negative
A carry out occurred into the sign bit
Add (add), add immediate (addi), and subtract
(sub) cause exceptions on overflow

Add unsigned (addu), add immediate unsigned
(addiu)m and subtract unsigned (subu) do NOT
cause exceptions on overflow
C compiler simply dont care about overflow.
Everything will be generated using addu, addiu, subu

Overflow occurs in subtraction when we subtract a MIPS detects overflow with an exception.


negative number from a positive number, or a positive

number from a negative number and get a positive result. Generates an unscheduled procedure call.


Means a borrow occurred from sign bit.

The address that causes overflow is saved to EPC
exception program counter.
Operation Operand A Operand B Result
overflow 
There is an instruction move from system control
A+B >=0 >=0 <0 mfc0 is used to copy EPC into a general purpose
register so you can jr to go back.
A+B <0 <0 >=0
A-B >=0 <0
3
A-B <0 >=0
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers
How can we detect overflow ourselves without
causing trap, exception? SUMMARY

Use a sequence of instructions. Suppose you want to 

Finite physical size of the word size (e.g. 32 bit) can
t1 + t2 signed cause conditions where we can represent results.

addu $t0, $t1, $t2 #$t0 = sum but don' trap It is easy to detect overflow for unsigned numbers but
usually ignored in address arithmetic
xor $t3, $t1, $t2 # t3 = 1 if $t1
and $t2 different Two's complement overflow detection is done by
slt $t3, $t3, $zero # if t3 is exceptions. EPC etc.
negative signs differ
bne $t3, $zero, No_oflw # if positive go to Arithmetic on bytes and halfwords for lbu, lhu is done
no_oflw again with add, sub, mult, div, then use AND to mask
bits
xor $t3, $t0, $t1 # signs with sum
match?11
slt $t4, $t3, $zero # t3 is negative ,
Modern computers have some multimedia support
dont match, t4 = 1 because it is important to have saturated sums,
Bne $t4, $zero, Overflow # sum is subtracts in parallel .
different than ops
E.g. SIMD single instruction multiple data. MMX


For unsigned we can use


With 64 bit adder, they perform 8 x 8 bit additions, 4x
addu $t0, $t1, $t2 # $t0 = sum 16 bit additions, or 2x32 bit additions
nor $t3, $t1, $zero # $t3 = NOT $t1
This allows parallel arithmetic.


# 2'comp -1 : 2^32-$t1-1
The resulting values are saturated for multimedia


Sltu $t3, $t3, $t2 # (2^32-$t1-1) >

$t2 E.g.
250 +10 = 255;
# 2^32-1 > $t2+$t1 2-10 = 0;

Bne $t3, $zero, Overflow 4

 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers
Multiplication

Lets remember decimal multiplication So multiplication can be done with

1000 ten x 1001 ten shift and add
1000 multplicand
1001 multiplier
x------------
1000
0000
0000
1000
+----------------------------------------
1001000 ten product

Shift and add

1. place copy of the multiplicant if multiplier is 1

2. place 0 if the multiplicant is 0

The number of digits of product is larger.

Ignore the sign bits: n-bit multiplicand x m-

multiplier results in n+m bits long.

Overflow is a greater problem.

Figure 3.5.@ Patterson &Hennessy Ed.4 Computer organization

5
CSE341 Lecture Notes Fall 2009
Arithmetic for Computers

6
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers
0110 =6

FIGURE 3.6 Refined version of the

multiplication hardware) Copyright ©
2009 Elsevier, Inc. All rights reserved. @
Patterson &Hennessy Ed.4 Computer
organization

0000 0101 =5
Keep Multiplicand fix, Move the product
add 0110 0101 instead. Save 64-bit alu and 64 bit
multiplicands registers.
0011 0010
add 0011 0010 Do it in parallel.

0001 1001 Add and shift together.

add 0111 1001 just use the lower 32 bits of the product
register for multiplier.
0011 1100
add 0011 1100 7
0001 1110 = 30
 Equivalent C Code for multiplication

c=0;
for(i=1;i<n;i=i+1)
{
if(b&0x01!=0)
c=c+a;
b=b>>1;
a=a<<1;
}

Another Method: Multiplying by constant compiler may

decompose into adds and shifts.

8*7 = shift left three times, then subtract 8

Sometimes you can do addition Binary multiplication

is the same as repeated binary addition;
add the multiplicand to itself the multiplier number of
times

8x3 = 8+8+8

8
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers
Signed Multiplication

2nd way, remember sign extension
 Two ways 1 way
st

Signed numbers can be infinitely sign-
Negate the negative number using the two's extended
complement.
Find the product and then find the negative. Positive numbers prefixed by an infinite
number of 0s

If two negatives, dont negate the result
Sign-extend a and b to 2n digits for

If one negative negate the result multiplication. Must loop 2n times as a
result But can still exit early when b==0
Ex: if there is no overflow just multiply
1101 = -3 Ex: extend sign bits
0010 = 2 1111 1000 = -8
X---------------------- 1111 1001 = -7
0000 X----------------------
1101 1111111 1000
+---------------------- 00000 000
11010 =? -6 000000 00
1111100 0
Or 11111000
0011 = 3 take 2'comp(-3)
2'comp 11111000
0010 = 2 11111000
X---------------------- +----------------------
0000 ...0011 1000= 56
0011
+----------------------
00110 = 6
11010 =-6 Take 2'comp
9
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers
MIPS multiplication
Can test HI value to see if product
Multiply (mult and multu) produces a 64 bit overflows 32 bits
double precision product
mult $t2, $t1
mult $s0, $s1# hi||lo = $s0 * $s1 Mfhi $t0
Beq $t0,$zero,no overflow
Multu unsigned.
no overflow:
Low-order word of the product is left in mflo $s1
processor register lo
and the high-order word is left in register hi mult $t2, $t1
Mfhi $t0
Instructions mfhi rd and mflo rd are mflo $t4
provided to move the product to (user sra $t4, $t4,31
accessible) registers in the register file Beq $t0, $t4,no overflow
#do your overflow handling
mfhi $s0 moves the result in hi to $s0. no overflow:
mflo dst
Mflo $t0 moves the result in low to $t0.
mul rd, rs, rt
Is pseudo instruction does
R-type ,mult [hi|lo] = R[rs]*R[rt]
Mul $s2, $S0, $S1
000000 10000 10001 00000 00000 01 1000
Mult $s0,$s1 # multiply s0,s1
6 bits 5bits 5bits 5bits 5bits 6bits Mflo $s2 # put the lower
32 bits of the result to $s2

There is no unsigned! Mul

pseudo
10
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers

Division dividend = quotient x divisor

+ remainder
1001010 | 1000
|_________
1000 1000 Signed division
-------------- 
Divide using absolute values
0001010 
Adjust sign of quotient and remainder as
Set sign of the quotient using the signs
0001000
------------ Of the dividend and divisor
0000010 How to set sign of the remainder

Division by zero is a problem

 +7/ 2: Quotient = +3, Remainder +1


Long division approach remainder = dividend-(quotientxdivisior)
If divisor ≤ dividend bits
Subtract dividend = divident-divisor -7/2: Quotient = -3, remainder = -1
1 bit in quotient,
Shift divident right It is not Quotient:-4+ Remainder:1 because
Else absolute value of the quotient should not change
0 bit in quotient, bring down next with respect to sign of the divisors,
dividend bit
To understand if divisor<= dividend, subtract

and check the sign. Overflow possibility: the high-order k bits of z

must be strictly less than d; this overflow check
Do the subtract, and if remainder goes < 0, also detects the divide-by-zero condition.
add divisor back
11
 Initially divisor
in left half

Initially dividend

12
CSE341 Lecture Notes Fall 2009
Arithmetic for Computers

13
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers

Initially divisor Dividend a and divisor b

in left half Quotient d = a/b
Remainder a = a%b

Equivalent c code

d=0;
b=b<<n;
for(i=0;i<n;i++)
{
b=b>>1;
d=d<<1;
if(a>=b)
{
a=a-b;
d=d+1;
Initially dividend }
}

14
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers

0010 =2

0000 0110 =6
0000 1100
sub 1110 1100
0000 1100
Similar to multiplication, 0001 1000
use the same sub 1111 1100
hardware 0001 1000
0011 0000
sub 0001 0001
Can’t use parallel 0010 0010
hardware as in multiplier,sub 0000 0011
because
Conditional subtraction 15
 CSE341 Lecture Notes Fall 2009
Arithmetic for Computers

MIPS Division

Use HI/LO registers for result

HI: 32-bit remainder
LO: 32-bit quotient

Instructions
div rs, rt
divu rs, rt

No overflow or divide-by-0
checking

Software must perform checks

if required

Use mfhi, mflo to access

result

16
 CSE341 Lecture Notes Fall 2009
Floating Point
Floating point
Why have a standard?
We need to support fractions / non-integral numbers: Simplifies exchange of data
reals. Simplifies arithmetic operations
Increases accuracy by not wasting digits
3.14151926
0.000000000000...000166 or 1.66x10^-27 Decimal point-> binary point
5,155,760000 or 5.15576x10^9

The last two are scientific notation. Representation

Fixed word size: tradeoff in sizeof
A number in scientific notation which does not have fraction <----> exponent
any leading zeros is called normalized number.
Take a bit from fraction → exponent
Instead of 0.1 x10^-9 write 1.0x10-10 the precision is reduced
Or instead 0.345 write 3,45 x10-2 Take a bit from exponent → fraction
Instead of 31.55 x10^2 write 3.155 x10^3 The range is reduced

These numbers are called floating point because the Fraction ← → Exponent
place of the point is not fixed.
Precision ← → Range
Normalized: non-zero single digit, helps standardizing
the representation. How you would do it in 32 bits
We can show binary numbers as well in scientific 1 bit for sign
notation X bits for exponent
Y bits for fraction
1.01001 x 21011 → exponential
|->fraction
+/- Exponent Fraction 17

Representation cont...
MIPS floating point number
s Exponent
31 3 23
0 double:2.0 x 10-308, single:2.0 x10-38
CSE341 Lecture Notes Fall 2009
Floating Point
Double precision takes 2 words!
11-bits exponent
Fraction
52 bit fraction: Greater precision!
22 0
double:2.0 x 10308, single:2.0 x1038

1 bit sign, negative if 1 These are beyond MIPS, every computer

8 bits exponent, includes the sign uses them
23 bits fraction(significant), fraction is unsigned Of IEEE 754 floating point standard

(-1)s x F x 2E To pack more.

Use implicit leading bit of 1 so
Overflow and Underflow
Fraction 23 bits in single, 52 bits in double
To big numbers need bigger exponents can
Significand 24 bits in single, 53 in double
cause overflow
0 has no leading 1, so exponent 0 ensures no
To small numbers need larger significands cause
1 leading is added. .
underflow.
00...000002 represents 0
Double precision is partial solution The rest uses

(-1)s x (1+ F) x 2E
s Exponent 11bits Fraction 20+32 = 52 bits
0<Fraction<1
31 3
0
20 19 0
1<Significant< 2

31 Fraction 0
18
 CSE341 Lecture Notes Fall 2009
Floating Point
Encoding ordered for the sorting
Encode IEEE uses a bias For a<>b check
1. sign
(-1)s x (1+ F) x 2Power-Bias 2. exponent
Decode 3. fraction
(-1)s x (1+ (s1x2-1)+(s2x2-2)+...+(s20x2-20) x
2Exponent-Bias Can use integer ops.

IEEE 754 floating standard uses special However negative exponent looks bigger than
sequences for unusual events. positive will cause a problem.
0, infinity, not a number NaN 0/0 To make everything ordered
IEEE uses a bias

Single Prec Double Prec Object (-1)s x (1+ F) x 2Exponent-Bias

exponent fraction exponent fraction
Bias 127 for single precision
0 0 0 0 0 An exponent of -1 is shown with
-1+127 = 0111 11102
0 nonzero 0 Nonzer +-Denorm object +1+127 = 1000 00002
1-254 anything 1-2046 anything +-Floating point Bias for double is 1023
number
255 0 2047 0 +-infinity
The range of single normalized number then:
smallest
255 Nonzero 2047 nonzero NaN +-1.0000 0000 0000 0000 0000 0002 x2-126
largest
+-1.1111 1111 1111 1111 1111 1112 x2+127
norm denorm denorm norm
Denorm: no If the exponent is all 0s, 19
but the fraction is non-zero which does not have an assumed
leading 1 before the binary point.
0
Example: Show IEEE 754 binary for -0.7510 Example:Inverse example. What is the IEEE
> -3/4 = -3/22 754 number represented in this binary form

>0.12 = 0.5, 1 1000 0001 0100 0000... 0000 000

S Exp Frac
0.112 = 0.75,
0.1112 = 0.875, Sign is 1, negative, exponent has 129 so it is
0.111 12 = 0.875 +0.125/2 129-127 =22=4, and fraction contains
0.111 112 = 0.875 +0.125/4 0.01 = 2-2 = 0.25
0.1111 11112 = 0.99
(-1)s x(1+F)x 2(Exponent-Bias) = -1 x 1.25 x 4
= -5.0
Normalized scientific notation
Example:
> -0.112 = -1.12 2-1 1 0111 1110 000 0000... 0000 000
S Exp Frac
> Recall (-1)s x (1+ F) x 2Exponent-Bias
= ? S = 1, Exp 126-127 = -1, Frac =0
> s = -1
Exp-bias = -1-> Exp = -1+127 = 126 (-1)1 x(1+0)x 2(126-127) = -1 x 1 x 0.5 = -0.5
F = 0.1 (hidden 1)
0.112 = (-1)1x(1+.1000...2)x2126-127

1 0111 1110 1000 0000... 0000 000

S Exp Frac

Above is 0.75 in binary

Double precision is same

Difference is Exp = -1+1023 = 1022
Exp(11 bits, reads 011 1111 1110) 20
Frac(53 bits, reads 1000....)
 norm denorm denorm norm

Example : Show 3 = 00000...11 0

1.1x 21

0 1000 0000 1000 0000 0000 0000 0000 000

Or Decimal equivalent of bits after binary point
SHORTCUT 0.5, 0.25, 0.125, 0.625, 0.03125, 0.015625...
To do a decimal → binary fraction. Continuously
multiply the number with 2. If first decimal digit
changes write 1 otherwise 0 in the binary fraction.
If you write 1, erase the decimal digit. Stop if you
have a complete 0 in fraction or when you are
tired. Be careful that
s0111 1111 represents exponent 0 in the
normalized numbers
Ex: 3.14 ---->
3 = 0011. Ex: Write 1.5 in IEEE 754
0,14 x 2 = 0.28 ---> 0011.0 0 0111 1111 10000000000000000000000
0.28 x 2 = 0.56 ---> 0011.00 E = 127-127 =0
0.56 x 2 = 1.12 ---> 0011.001
0.12 x 2 = 0.24 ---> 0011.0010 However
0.24 x 2 = 0.48 ---> 0011.00100 s0000 0000 is special 0 as in Table before
0.48 x 2 = 0.96 ---> 0011.001000
0.96 x 2 = 1.92 ---> 0011.0010001 To show Either 0
0.92 x 2 = 1.84 ---> 0011.00100011 0 0000 0000 00000000000000000000000 = 0
0.84 x 2 = 1.68 ---> 0011.001000111
…
Or Denorm numbers
Never reaches exact 0 fraction.
0 1000 0000 1001 0001 1110 1 01110 00011

Ex : Show 0.1 decimal in IEEE 754 binary floating

point?
Try yourself 21
0 0111 1011 1001 1001 1001 1001 1001 101
Create an 8-bit Floating Point Representation Exp exp E 2E
the sign bit is in the most significant bit.
0 0000 -6 1/64 (denorms)
the next four bits are the exponent, with 1 0001 -6 1/64
2 0010 -5 1/32
a bias of 7.
3 0011 -4 1/16
the last three bits are fraction 4 0100 -3 1/8
5 0101 -2 1/4
What are the range of values you can represent?
6 0110 -1 1/2
Assume only normalized numbers are used. 7 0111 0 1
Spare 0 and infinity
8 1000 +1 2
9 1001 +2 4
10 1010 +3 8
11 1011 +4 16
12 1100 +5 32
7 6 3 2 0
13 1101 +6 64
s exp frac 14 1110 +7 128
15 1111 n/a (inf, NaN)

22
 CSE341 Lecture Notes Fall 2009
Floating Point

FP Addition In decimal If rounded number 11.9995 x102 = becomes 12.0

after rounding, then renorm 1.2x103
Consider a 4-digit decimal example, store
only 4 decimal digits &Just two digits for the
exp. Overflow and underflow depends on the precision of
the exponent. Pattern 000000 111111 is reserved
9.999 × 101 Single precision : max exp 127, minimum -126.
1.610 × 10–1
+-----------------------------------

1. Align decimal points Binary IEEE754

Shift number with smaller exponent (unnorm) Step 0: Restore the hidden bit in F1 and in F2
9.999 × 101
0.016 × 101 (actually 0.0161 but 4 dig limit) Step 1: Align fractions by right shifting F2 by E1 - E2
+-------------------------- positions (assuming E1  E2) keeping track of
2. Add significants (three of) the bits shifted out in G R and S
9.999 × 101
0.016 × 101 Step 2: Add the resulting F2 to F1 to form F3
+-------------------------
10.015 × 101 Step 3: Normalize F3 (so it is in the form 1.XXXXX
3. Normalize result & check for …)
over/underflow in the exponent. Shift left or If F1 and F2 have the same sign  F3 [1,4)  1 bit
right. Here to right right shift F3 and increment E3 (check for overflow)
1.0015 × 102 If F1 and F2 have different signs  F3 may require
Should check exponent whenever it changes many left shifts each time decrementing E3 (check
for underflow)
4. Round and renormalize if necessary
1.002 × 102 Step 4: Round F3 and possibly normalize F3 again
23
Step 5: Rehide the most significant bit of F3 before
storing the result
 Now consider a 4-digit binary example (0.5 + –0.4375)
0.5 = ½
-0.4375 = -7/16 = -7/24
-= 0.01112

1.0002 × 2–1 + –1.1102 × 2–2

1. Align binary points
Shift number with smaller exponent
1.0002 × 2–1
–0.1112 × 2–1
2. Add significands
1.0002 × 2–1
–0.1112 × 2–1
= 0.0012 × 2–1
3. Normalize result & check for over/underflow
1.0002 × 2–4, with no over/underflow , 1<(-4+127)<254
4. Round and renormalize if necessary
1.0002 × 2–4 (not necessary 4 bits) = 0.0625

!If doing in IEEE 754 (or registers) , first restore hidden

bits, last hide hidden bits in the result!

FIGURE 3.15 Floating-point addition. The normal path is to execute steps 3 and 4 once, but if rounding causes the
sum to be unnormalized, we must repeat step 3. Copyright © 2009 Elsevier, Inc. All rights reserved.

24
FIGURE 3.16 Block diagram of an arithmetic unit dedicated to floating-point addition. The steps of Figure 3.15
correspond to each block, from top to bottom. First, the exponent of one operand is subtracted from the other using the
small ALU to determine which is larger and by how much. This difference controls the three multiplexors; from left to
right, they select the larger exponent, the significand of the smaller number, and the significand of the larger number.
The smaller significand is shifted right, and then the significands are added together using the big ALU. The
normalization step then shifts the sum left or right and increments or decrements the exponent. Rounding then creates
the final result, which may require normalizing again to produce the final result. Copyright © 2009 Elsevier, Inc. All rights
reserved.

SKIP THIS 25
 Example : multiply X and Y
Example: Add 8 bit floating points
sign exponent fraction
Variable sign exponent X 0 1001 010
fraction Y 0 0111 110
X 0
1001 110 X is 1.010 x 22 ,
Y 0 Y is 1.110 X 20
0111 000

1. In normalized scientific notation,

X is 1.110 x 22, and Y is 1.000 x 20 Pro s exponent

fraction
2. Align exponents X*Y 0 1010 000
X is 1.110 x 22, and Y is 0.010 x 22

3. Add Be careful FP multiplication is not

X= 1.1102 --> associative
Y= 0.0102 ax(bxc) != (axb)xc
----------- nor distributes over addition
Z= 10.002 22 ax(b+c) != (axb)+(axc)
4.Normalize
Z = 1.0002 x23 Because of the rounding!
5. Convert back Exp = 0011+0111 = 1010
Variable sign exponent
fraction
27
Z 0 1010
000
Binary (Round to zero Algorithm) Binary (Round-Half-Up Algorithm)
Add +0.5 and round to zero/

IEEE 754: four rounding modes

1.Round Up Always toward+ (
2.Round Down Always toward 0 (throw the fraction)
3.Towards Zero Round down if positive, up if negative
4. Round to Even Rounds to nearest even value: in a tie,
5. Pick the closest ‘even’ number: e.g.1.5
Rounds to 2.0, but 4.5 rounds to 4.0

MIPS and Java uses round to even by default! SKIP THIS!

28
 CSE341 Lecture Notes Fall 2009 - Floating Point MIPS

In the past, floating point operations were
performed using a separate chip 'coprocessor 1'
FPA (Floating Point Accelerator).
Now merged.
You can store values in ordinary registers
(since 32 bits, at least for single but for
arithmetic should use only fp registers)
Arithmetic: All R-Types but different See
Reference chart.
opcode+format+ft+fs+fd+funct
FP addition
single: add.s, double: add.d
add.s $f2,$f4,$f6 #f2 =
f4+f6
Decim opcode/format/funct 17/16/6/4/2/0
Hex:: opcode/format/funct 11/10/6/4/2/0

FP subtract


MIPS has 32 single precision (32 bit) fp Single: sub.s, double: sub.d
registers: $f0 – $f31
FP multiplication
Single: mul.s, double: mul.d
$f0 is not special (it can hold any bit pattern, mul.d $f2,$f4,$f6
not just zero). ??? #[f2|f3]=[f4|f5]x[f6|f7]
FP division
Because 0.0 is same with 0 $zero
Single: div.s, double: div.d
mul.s $f2,$f4,$f6
Single precision floating point load, store, #[f2|f3]=[f4|f5]x[f6|f7]
arithmetic use $f0-$f31.
(No Hı|Lo) in Mul and Div result is in fd directly

For double: use registers in pairs. 16 pairs

$f0, $f2, $f4,,, $f30
Specify only the even number:odd number
added automatically. 29
Load Store Comparison

compare if equal
Load: c.eq.s – c.eq.d
Lwc1 $f1,100($a2)
#load one word f1 = address
a2+100
Not equal
c.neq.s – c.neq.d
lwc1 $f1,12($sp)
# load 4 bytes (1 word) to f1

Less than
c.lt.s – c.lt.d
ldc1 $f2, 0($sp)
# load 8 bytes (2 words)to f2&f3 Greater than
c.gt.s – c.gt.d
Ex: REMEMBER
Branch
lwc1 $f4,8($a0) #loads a word
--- same effect Comparison sets a single bit condition
lw $t4,8($a0) #loads the same word : branch uses that bit only to branch

$f4=$t4 BUT Branch if true bc1t,

c.eq.s $f4,$f6
!!You can use only $f4 for fp arithmetic! Bc1t Equal
#if(f4==f6)
STORE # Go to Equal

swc1 $f1,100($a2) False if true bc1f

# write 1 word to memory c.lt.s $f4,$f6
Bc1f G2
sdc1 $f4,100($a2) #if !(f4<f6)
# write double words f4&f6 to # Go to G2
memory 30
Example: write mips code for x*y in single There are some pseudo instructions
precision
Assume $sp+16 , $sp+12 and $sp+4 has l.s fd,addr # load register fd from addr
word addresses of x, y, z

lwc1 $f4, 16($sp) #load x into f4 s.s fd,addr # store register fd to addr
lwc1 $f6, 12($sp) # load into
mul.s $f2,$f4,$f6 # f2 = f4+f6
swc1 $f2, 4($sp) #store f2 to z li.s fd,val # load register $fd with val

Double example: Write MIPS code for

li.s $f1,1.0 # $f1 = 1.0
Z = 2x/y in double precision, check if y is 0 li.s $f10,1.0e-5 # $f10 = 0.00001
before and jump to YISZERO

lwc1 $f4, 24($sp) #load x into f4-$f5

lwc1 $f6, 16($sp) # load y into f6-f7
c.eq.d $zero, $f6
Bc1t YISZERO
add.d $f8, $f4,$f4 # x+x
div.d $f2, $f8, $f6 # f2 = f4/f8
swd1 $f2, 8($sp) #store 2 words f2 to z
YISZERO:

31