FIR filters

ELG6163
Miodrag Bolic

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 Outline
• FIR filters
– Structures
– Polyphase FIR filters
– Parallel polyphase FIR
– Decimated FIR
• Implementations of FIR filters

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 Sequential application specific
processor
• A processor tuned only for a particular
application
• Can be used for low-power
implementations
• Word lengths can be adjusted to the current
problem.
• Example: FIR filter

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 Direct form FIR filter

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Copied from [Wanhammer99]
 Transposed FIR

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Copied from [Wanhammer99]
 Assignment
• Design an N-tap transposed linear-phase FIR
filter as a sequential application specific
processor. Use only one multiplier and show
how processing time can be decreased twice.
Hint: design a transposed FIR filter structure
as in the previous slide but allow for
generating the sums in reversed order PS N-1,
PSN-2, …, PS1, y(n).

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Copied from [Wanhammer99]
 General purpose processor
architecture
• FIR example
• We will study RISC architectures
• Single-cycle processor
– Implementation of add and load instructions
• Pipelined implementation
– Why do all instructions have the same number
of cycles

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 Example: Digital Filtering

• The basic FIR Filter equation is

y[n]   h[k ].x[n  k ]
Where h[k] is an array of constants

y[n]=0;
For (n=0; n<N;n++) Only Multiply and
In C language Accumulate
{ (MAC) is needed!
For (k = 0;k<N;k++)
//inner loop
8 y[n] = y[n] + h[k]*x[n-k];}
Copied from Rony Ferzli: http://www.fulton.asu.edu/~karam/eee498/
 MAC using General Purpose Processor (GPP)
R0 11
12
3 11 R2
X 24  44
R1 1 9
2 Clr A ;Clear Accumulator A
Clr B ; Clear Accumulator B
3
Loop Mov *R0, Y0 ; Move data from memory location 1 to register Y0
Mov *R1,X0 ; Move data from memory location 2 to register X0
Mpy X0,Y0, ;X0*Y0 ->A
A
Add A,B ;A + B -> B
Inc R0 ;R0 + 1 -> R0

Copied from Rony

Inc R1 ;R1 + 1 -> R1
Ferzli:
http://www.fulton.as
Dec N ;Dec N (initially equals to 3)
u.edu/~karam/eee49
8/ 9 Tst N ;Test for the value
 MAC using DSP
• Harvard Architecture allows multiple
memory reads
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12
3 11 R2
X 24  44

1 9
2
3 Clr A ;Clear Accumulator A
Rep N ; Rep N times the next instruction
MAC *(R0)+, *(R1)+, A ; Fetch the two memory locations pointed by R0 and R1, multiply
them together and add the result to A, the final result is stored back
in A
Mov A, *R2 ; Move result to memory

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Copied from Rony Ferzli: http://www.fulton.asu.edu/~karam/eee498/
 11
Copied from [DSPPrimer-Slides]