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Chapter 2
Chapter 2
The digital-to-analog converter, known as the D/A converter (read as D-to-A converter)
or the DAC, is a major interface circuit that forms the bridge between the analog and
digital worlds. DACs are the core of many circuits and instruments, including digital
voltmeters, plotters, oscilloscope displays, and many computer-controlled devices.
What is a DAC?
A DAC is an electronic component that converts digital logic levels into an analog
voltage. The output of a DAC is just the sum of all the input bits weighted in a particular
manner:
The output current is controlled by eight
binary inputs and reference current written as
where
wi is a weighting factor, wi = 2i,
bi is the bit value (1 or 0),
i is the index of the bit number.
Circuit description
4 bits latched in a register control four switches to
provide 16 different switch setting.
The op-amp is connected as a summing amplifier.
If two switches are closed (bit 1is logic 1 and bit 3 is logic 1) we have
𝐸 𝑅𝐸𝐹 𝐸 𝑅𝐸𝐹
𝑉𝑜𝑢𝑡 = +
2 8
DAC Fabrication Consideration
• The realistic value of R that can be fabricated as part of integrated circuit is 5 kΩ.
The current entering through a branch at any node divides in half of two
branches leaving the node as it exists on its way toward the end of the ladder.
Each produces the same result in the output. The design requires almost
twice as many resistors as a straightforward network (2n+1), but they are of
small value(5 kΩ or 10 kΩ).
Example
Actual DAC Case study: AD558
Analogue-to-digital (A/D) conversion
Overview of
sampling, quantisation and encoding.
1. Statistical representation of random signals
A recording of a section of a random signal obtained during an
observation period TO.
The sampling interval ΔT = TO /N must satisfy the Nyquist sampling theorem, where
sampling frequency fS = 1/(ΔT )
Nyquist sampling theorem
If fS > 2fMAX, then the additional frequency components can easily be filtered out with an
ideal low-pass filter of bandwidth 0 to fMAX and the original signal reconstituted
If fs = 2fMAX, it is just possible to filter out the sampling components and reconstitute
the signal.
If fs < 2fMAX, the sampling components occupy the same frequency range as the original
signal and it is impossible to filter them out and reconstitute the signal.
Aliasing.
Here each decade of the decimal number is separately coded into binary. Since 23 = 8 and
24 = 16, four binary digits DCBA are required to encode the 10 numbers 0 to 9 in each
decade.
Example :
What is the decimal number of 8:4:2:1 b.c.d.
Application of BCD
The input signal to character displays (is normally in b.c.d. form; since the signal is
already separated into decades the conversion into seven segment or 7 × 5 dot matrix
code is easier than with pure binary.
Example
ADC essential
Vref
Vin
ADC Data
Control
Signal
• It is a ratioing operation.
𝐹𝑆𝐷
𝑄=𝐿𝑆𝐵= 𝑛
2
1. LSB
=0.625mV
2. Threshold
Threshold =±0.625mV
3. The range of quantized levels
a- offset error, b) gain error, c) integral linearity error, d) differential linearity error
Conversion Time
Understanding conversion time.
After a start command is received by ADC, it requires a finite time, called tc, before
the converter can provide valid output data.
For n bit converter the conversion time is defined as
Example 3: a 8 bit ADC having a conversion time of 10S is being used to convert
a sinusoidal signal given in the following form
𝑉
𝑖= 𝐴𝑠𝑖𝑛 ( 2 𝜋 𝑓𝑡 )
Calculate the maximum value of frequency the can be converted by the ADC
Step1 . Calculate the maximum rate of change of analog signal
𝑑𝑉 𝑖
=2 𝜋 𝑓 𝐴 𝑐𝑜𝑠(2 𝜋 𝑓𝑡 )
𝑑𝑡
𝜋𝑓
The maximum rate of change ¿2 𝐴
𝜋 𝑓𝐴 ≤ 2𝐴
2 8 −6 fmax=12.4Hz
2 ∙ 10 ∙10
Answer:
this value can be increased using S/H device between input signal and ADC
Aperture error
We have seen that the conversion of an analog signal to a digital output takes time:
the conversion time, which in the case of a successive approximation ADC, is fixed.
Now, if the analog input signal is changing during the conversion time, then the
converted output will be in error. This is known as aperture error.
For example, for an 8-bit ADC, the smallest increment δ of input signal registered by a
single bit will be: δ = 1/28 = 0.0039 fraction of full scale of signal
During conversion time, the signal changes. For there to be no error in the digitised
output, this change must be less than the smallest increment registered by a single bit: i.e.
the product (δ)(Α).
What does it mean?
The ADC08xx series of ICs are 8-bit analog to digital converters which use the successive
approximation technique.
The conversion time is given by the clock frequency. It takes approximately 64 clock
cycles to perform one 8-bit conversion.
Thus, to obtain a sampling rate of say 10 000 samples per second, the clock frequency
needs to be set to:
Sample-and-hold
To avoid aperture error, the conversion time and the desired performance characteristics of
the ADC circuit must be taken into consideration. For example, given a conversion time of
say 100 μsec, what is the maximum frequency of sine wave that can be sampled by the 8-bit
ADC0804 without aperture error?
We need a circuit that will take a sample of the input voltage at a particular instant, and
hold it until the ADC has processed the conversion - a sample and- hold circuit
When logic input is high, output follows any changes in the analog input. When
logic input goes low, the analog input signal is captured and passed through
to the output. Output remains fixed at this value while logic input is held low.
The time taken for the sample-and-hold circuit to sample the signal and hold
it must be shorter than the conversion time (otherwise we wouldn’t need to
use the circuit!). The above circuit has a conversion time of about 10 μsec
ADC techniques
a. Flash analogue-to-digital converter
Operation principle
In any n-digit binary ADC there are Q quantisation voltage levels V0 to VQ−1, where Q =
2n. In a flash ADC there are Q − 1 comparators in parallel and Q − 1 corresponding voltage
levels V1 to VQ−1. There is no need to provide the V0 voltage level. In each comparator q,
the input sample value yi is compared with the corresponding voltage level Vq. If yi is less
than or equal to Vq , the output is zero corresponding
to 0. If yi is greater than Vq , the output is non-zero corresponding to a 1
Thus if yi lies between Vq and Vq+1, i.e. Vq < yi ≤ Vq+1, the output of the lowest
q comparators 1 to q will all be 1 and the output of the remaining comparators
q + 1 to Q − 1 will all be 0. Thus the comparators provide a Q − 1 digit parallel input
code to a priority encoder which generates an n-digit binary parallel output code
corresponding to the value of q. The main advantage of the flash converter is the
short conversion time; the main disadvantage is that the large number of comparators
required to give acceptable resolution mean that it is relatively expensive.
b. Single-Slope ADC Architecture
or
-de-integrate time
-integrate time
Operation principle
Here, an unknown input voltage is integrated and the value is compared against a
known reference value. The time it takes for the integrator to trip the comparator is
proportional to the unknown voltage (VINT/VIN).
In this case, the known reference voltage must be stable and accurate to guarantee
the accuracy of the measurement.
Drawback
the accuracy is also dependent on the tolerances of the integrator’s R and C
values.
c. Dual-Slope ADC Architecture
Successive approximation converters (SAC) can be used for sample rates up to over 10 6
samples/s; even 16-bit types can be used up to over 105 samples/s. For the fastest
applications up to 109 samples/s, such as video digitisation, flash converters are used. SAC
converters can be linked to microcontrollers using two-way serial communication over a pair
of wires. Here the successive approximation logic is provided by the microcontroller; the SAC
consists only of a DAC and a comparator. The microcontroller sends out clock pulses to
operate the DAC switches and receives the digital code in serial form.
In this method, the input voltage is compared to half the full scale voltage
and then lower values in succession. The steps are: