a)Define FET. Explain the construction of N-channel JFET in brief.

b) For an N-channel JFET IDSS=8.7mA; VP= -3V ; VGS= -1V.Find the values of
i)ID ii)gmo iii)gm

2. a)A temperature sensor has a measurement range of -10 to 150oC. The output
range is -1.5 to+5mv.It has a resolution of 0.1oC.
i) Determine the number of bits in ADC?
ii) What is the reading of the ADC when the output of the sensor is +5
mv?
b)Derive the relation of Vout for binary weighted DAC.Convert binary input of
1101 intoanalog output (Vout) using binary weighted DAC.Assume Vref=+5V.

3. a) Derive the relation of voltage gain and feedback resistance for inverting op-
amp with figure.
b) An op-amp has feedback resistor Rf=12kohm and the resistances on the
input sides are RS1=12 kohm, RS2 =2 kohm and RS3=3 kohm.The corresponding
inputs are Vi1=+9V, Vi2= -3V and Vi3= -1V.If non-inverting terminal is
grounded.Calculate the output voltage.
Note: depletion layer width is inversely proportional to channel width
 Example
 A temperature sensor has a measurement range of -10 to 140C. The output range
is -2.5 to +5mv. It has a resolution of 0.5C.
1. Determine the # of bits in ADC?
2. What is the reading of the ADC when the output of the sensor is
-1.0 mv?
 Solution:
1. Span = 140 – (-10) = 150 C (or) 5 – (-2.5mv) = 7.5mv
2. Dynamic Range = 150 C / 0.5C = 300
DR = 300 = 2n  n = log2 (300) = 8.22  9 bits

3. Step Size = Span /2n = 7.5mv/(29) = 0.01464

4. Digital Number = (Analog Number – Offset)/Step Size
= (-1.0mv – (-2.5mv))/0.01464
= (102)10 = (001100110)2

ENG3640 Fall 2012 4

 Binary Weighted Resistor
Voltages V1 through Vn are either Vref
Vref
if corresponding bit is high or ground V1 R
if corresponding bit is low
V2 2R I Rf
V1 is most significant bit
V3 4R
- Vout
Vn is least significant bit
+
Vn 2n-1R

MSB

LSB
 V1 V2 V3 Vn 
Vout   IRf   Rf      n -1 
 R 2R 4R 2 R
 Binary Weighted Resistor

If Rf=R/2
 V1 V2 V3 Vn 
Vout   IRf       n 
2 4 8 2 
For example, a 4-Bit converter yields

 1 1 1 1
Vout  Vref  b3  b2  b1  b0 
 2 4 8 16 
Where b3 corresponds to Bit-3, b2 to Bit-2, etc.
We said above that there are two very important rules to remember about Inverting
Amplifiers or any operational amplifier for that matter and these are.
1.  No Current Flows into the Input Terminals
2.  The Differential Input Voltage is Zero as V1 = V2 = 0 (Virtual Earth)

Then by using these two rules we can derive the equation for calculating the closed-loop
gain of an inverting amplifier, using first principles.
Current ( i ) flows through the resistor network as shown

The negative sign

in the equation is
due to the
feedback being
negative in value.