EECE 311: Electronic Circuits

Part 5
Simple CMOS Op-Amp
MOSFET Differential Amplifier

When Q1 and Q2 are matched and as long as vI1 = vI2:

vO1 = vO2 = VDD – RD I/2 fixed, pure DC
(no dependence of output on vI1 and/or vI2 as long as vI1 = vI2)
BJT Differential Amplifier
Differential Amplifiers
 MOS Differential Pair
 Common-mode input at two gates (vI1 = vI2 = vCM)

I 1 'W
 kn  VGS  Vt 
2

2 2 L
I
VOV 
 
kn' W
L
I
vD  VDD  RD
2
 vCM  vCM
independent of vCM
 Input Common Mode Range (ICMR)

Range
Rangeof of
common-mode input
v for which
CM
and Q vCM
Q voltage
1
areforSAT
2
which MOSFETs are SAT

vDS ³ vGS - Vt Û vGD £Vt

æ I ö
vCM - çVDD - RD ÷£Vt
è 2 ø
I
vCM =Vt +VDD - RD
max
2
let VCS be the minimum voltage accross the current source
vCM min  VSS  VCS  Vt  VOV  VGS  Vt  VOV 

vS
Differential Amplifiers
 MOS Differential Pair
 Show that the differential pair amplifies differential signals

vid vid
vI1 =vG1 =VDC + vI 2 =vG 2 =VDC -
2 2

vI1 - v I 2 =vid
 Small-Signal Analysis
use T-model, neglect ro and assume ideal current source

Note:
vg1 = vid /2
vg2 = –vid /2

What is the signal voltage

here?
 Small-Signal Analysis (use T-model and neglect ro and Rss)

vid
vgs1 
2
v
vgs 2  id
2
v 
vo1  vd 1   g m  id  RD
 2 
v 
vo 2  vd 2   g m  id  RD
 2 
ID I /2 I
gm   
VOV / 2 VOV / 2 VOV

differential output: vd 2  vd 1  g m vid RD

Ad (differential ouput )  g m RD
1
Ad (single-ended ouput )   g m RD
2
 Small-Signal Analysis (considering ro and Rss)
considering the output resistance
of the current source (Rss):

→ no difference since vs = 0 for

differential inputs – Rss appears
between ground and ground

considering ro:
→ simply replace RD by RD// ro
(for the same reason)

(
Ad (differential ouput ) =±g m ro //RD )
1
(
Ad (single-ended ouput) =± g m ro //RD
2
)
Half-circuit concept

Since vs = 0 when inputs are applied differentially

vo1
  g m RL'
 vid 
 2 
 

vo1 1
  g m  ro / / RD 
vid 2

MOSFET biased at I/2 What kind of circuit is the half circuit?

Common-Mode Gain & CMRR

Use the half-circuit concept

What kind of circuit is the half circuit?

 vo1 g m RD
=-
vcm 1+ 2g m RSS
vo2 g m RD
=-
vcm 1+ 2g m RSS

 Differential Output  Single-Ended Output

vo 2  vo1
Acm  0 vo g m RD
vicm Acm = =-
vicm 1+ 2g m RSS
 CMRR  
1
Ad (
g m RD 1+ 2g m RSS) 1
Þ CMRR = =2 = + g m RSS
Acm g m RD 2
MOSFET Differential Amplifier
 CMOS implementation

What is the voltage gain?

How do we generate
VBIAS1 and VBIAS2?
MOSFET Differential Amplifier
 CMOS Cascode implementation

What is the voltage gain?

 BJT Differential Pair

18
 BJT Differential Pair

19
  BJT Differential Pair Small Signal Analysis

Small-signal equivalent circuit

using T-model

v 1 vid vid
ie1    ib1 
re 2re 2    1 re

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 Differential Input Resistance
vid
Rid   2    1 re  2r
ib1
with Re :
vid
Rid   2    1  re  Re 
ib1

 Differential Voltage Gain

vid
vc1   g m v 1RC   g m RC
2
vc1 1
  g m RC
vid 2 vc1  vc 2
Ad    g m RC
vc 2 1 vid
 g m RC
vid 2
with Re : Even with a non-ideal current source (with finite
 RC output REE), the emitter signal voltage will still
Ad  be zero because of symmetry and nothing will
Re  re
change in the previous analysis.

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 Common-Mode Gain
Half-circuit:
vc1 v  RC R
 c2    C
vicm vicm 2 REE  re 2 REE

Acm  0
(differential output)
CMRR  

RC
Acm  
2 REE
(single-ended output)
1
 g m RC
CMRR  2  g m REE
RC

2 REE

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Bipolar Differential Amplifier
 NPN-PNP implementation

What is the voltage gain?

How is the current source

implemented?
 The MOS Differential Amplifier with Active Load

Current Mirror
Could use Wilson Current Source

Differential Pair
Could be cascoded to increase output
resistances in parallel with the active loads

Current Sink
Could be cascoded to increase R ss

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 Differential Input: Small-Signal Analysis

 Determining Ro and Gm

Finding Gm by short-circuiting the output

to ground:
i
Gm  o
vid
 Gm  g m  g m1  g m 2

Ro  ro 2 / / ro 4

 Avo  Gm Ro  g m  ro 2 / / ro 4 

Twice the gain obtained from previous differential amplifier (with single-ended
output) due to current mirror action
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 Common Mode Gain of MOS Differential Amplifier with Active Load

vo 1 ro4
Acm º =-
vicm 2RSS 1+ g m3ro3
1
Acm @ -
2g m3 RSS

(
Þ CMRR =g m1 (ro2 / /ro4 ) 2g m3 RSS )

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 BJT Active-Loaded Differential Amplifier

Gm  g m ( g m1  g m 2 )
Ro  ro 2 / / ro 4  roN / / roP
Avo  Gm Ro
 g m  roN / / roP 

ro 4
Acm  
3 REE
1
 CMRR   3 g m REE
2

 Similar results to the MOSFET circuit

27
 Frequency Response of the MOS Differential Amplifier

 Differential Gain

Half-circuit is a CS amplifier
due to virtual ground

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 Frequency Response of the Resistively Loaded MOS Amplifier
 Common-Mode Gain

neglecting ro and the capacitors

at input and output:

vo1   RD  g m vgs 
1/ g m
vgs  vicm 
1/ g m  Z SS

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 vo1 1/ g m RD gm RD
   RD g m  
vicm 1/ g m  Z SS 1/ g m  Z SS 1  g m Z SS
CSS 1 2 RSS
where Z SS  2 RSS //  
2 1 2 RSS  s CSS 2 1  sRSS CSS
 g m RD  g m RD  1  sRSS CSS 
 Acm  
2 RSS 1  2 g m RSS  sRSS CSS
1  gm
1  sRSS CSS
1
z  zero at a very low frequency
 g m RD  1  s /  z  RSS CSS
 Acm 
 1  2 g m RSS   1  s /  p  p 
1  2 g m RSS
pole >> zero
RSS CSS

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 We try to make ωz higher so that the high
frequencies we are interested in would lie
in the domain where Acm is minimum and
not increasing (i.e. CMRR very large).
 We do that by changing the size of the
MOSFETs.

31
 Multistage Amplifiers
 Simple CMOS Op-Amp
Current Mirror Active-Loaded CS amplifier

Active-Loaded Differential Amplifier

32
  Input Stage: Differential Amplifier with
Active Load
A1   g m1  ro 2 // ro 4 

 Second Stage: Common-Source

Amplifier
A2   g m 6  ro 6 // ro 7 
vo
Þ
vid
(
=Ad =g m1g m6 ro2 / /ro4 ro6 / /ro7)( )
 Common-mode Gain
1 ro4
A1 =-
2ro5 1+ g m3ro3
 Second Stage: Common-Source Amplifier

A2   g m 6  ro 6 // ro 7  æ 2r ö
Þ CMRR =çç o5 ÷÷
è ro4 ø
(
(1+ g m3ro3 )g m1 ro2 / /ro4 )
vo g m6 æ ro4 ö
Þ
vicm
=Acm = çç ÷ ÷
1+ g m3ro3 è2ro5 ø
ro6 / /ro7 ( )
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 Frequency Response of the two-stage CMOS Op-Amp
 Differential input
 Approximation: signal voltage at gates of Q is zero
3,4

Gm1 =gm1
R1 =ro2 / /ro4
Gm2 =gm6
R2 =ro6 / /ro7

node equation at D 2 :

Gm1Vid 
Vi 2
 sC1Vi 2  sCC  Vi 2  Vo   0 K  1  s 
R1 Vo  z 
 
node equation at D 6 : Vid  s  s 
 1  1 
Vo   p1 
  p 2 
Gm 2Vi 2   sC2Vo  sCC  Vo  Vi 2   0
R2
( )(
K = low-frequency gain = g m1g m6 ro2 / /ro4 ro6 / /ro7 )
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CC is chosen in such a way to stabilize the circuit
1
w p1 @ dominant pole
R1CC Gm2 R2
Gm2
w p2 @
C2
Gm2
wz @
CC

t  K  H   Gm1 R1Gm 2 R2   p1
Gm1
 t 
CC
t should be < p 2 ,  z for stability

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