PRESENTATION TOPIC: 8086/8088 HARDWARE

SPECIFICATIONS
SUBMITTED TO: TANJIA CHOWDHURY
SUBMITTED BY: A M JABRUD BILLAH
ID: 666-48-09

DATE:11/6/2020

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 Intel 8086
■ It was the first 16 - bit
microprocessor
■ It is available as 40- pin dual-
inline- package(DIP)
■ it’s available in three versions:
• 8086 (5mhz)
• 8086-2 (8mhz)
• 8086-1 (10 mhz)

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Pin Diagram of intel 8086

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AD0 – AD15 - pin 16-12,32 (Bi- directional):
 These lines are multiplexed bi directional
address/data bus
 AD0 – AD7 carry lower order byte of data
AD8 – AD15 carry higher order byte of data

A19/S6, A18/S5,A17/S4,A16/S3 – pin 35-38

(unidirectional) :
• These lines are multiplexed unidirectional address
and status bus

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■  
BHE/S7 – pin 34 (output):
■ BHE stands for bus high enable
■ Bhe signal is used to indicate the transfer of data
over higher order data bus (D8-D15)

(READ) – pin 32 (output):

■ It is a read signal used for read operation
READY – pin22 (input):
■ This is an acknowledgement signal from
slower I/O devices or memory

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■  
RESET – pin 21 (input):
■ It is a system reset and active high signal

INTR – PIN 18 (INPUT):

■ It is an interrupt request signal

NMI – pin 17 (input):

■ It is a non-muskable interrupt signal
- pin 23 (input):
■ It is used to test the status of math co-
processor 8087
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CLK- pin 19 (input):
■ This clock input provides the basic timing for
processor operation

VCC and VSS – pin 40 and 20 (input):

■ VCC is power supply signal
■ VSS is ground signal

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  Maximum and minimum mode(MN/)
pin 33 (input)

■  Pin 24-31 issue two different sets of signsls

■

■ One set of signals is issued when cpu operates in

minimum mode
■ Other set of signals is issued when cpu operates
in maximum mode
PIN description for minimum mode:

in 24 (output):
■ This is an interrupt acknowledge signal

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■  
ALE – pin 25 (output):
This is an address letch enable signal
- pin 26 (output):
This is a data enable signal
DT/ - pin 27 (output):
This is a data transmit/receive signal
M/ - pin 28 (output):
This signal is issued by the microprocessor to
distinguish memory access from I/O access

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■  
- pin 29 (output):
It is a write signal
HLDA- pin 30 (output):
It is a hold acknowledge signal

HOLD – pin 31 (input):

When dma controller needs to use
address/data bus , it sends a request to
cpu thorugh this pin

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Pin description for maximum mode:
QS1 and QS0 – pin 24 and 25 (output):
■ These pins provide the status of instruction
queue

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S2, S1, S0 – pin 26,27,28 (output):
• These status signals indicates the operation
being done by the microprocessor

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■  
pin 29 (output):
This signal indicates that other processors should not
ask cpu to relinquish the system bus

RQ/GT1 and RQ/GT0 – pin 30 and 31 (bi-

directional):
■ These are request/grant pins
■ Other processors request the cpu through
these lines to release the system bus

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The Pin-Out:
■ the 8086 is a 16-bit
microprocessor with a
16-bit data bus andthe
8088 is a 16-bit
microprocessor with an
8-bit data bus.
■ (As the pin-outs
show,the 8086 haspin
connections AD0–
AD15, and the 8088 has
pin connections AD0–
AD7.)
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DC Characteristics:
It is impossible to connect anything to the pins of the microprocessor
without knowing the input current requirement for an input pin and the
output current drive capability for an output pin.

Input Characteristics: The input characteristics of these

microprocessors are compatible with all the standard logic components
available today

Output Characteristics:The logic 1 voltage level of the

8086/8088 is compatible with that of most standard logic
families, but the logic 0 level is not.
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■  
Basic bus operation
■ The three buses of the 8086 and 8088—address, data, and control—function exactly the same way as
those of any other microprocessor.
■ If data are written to the memory the microprocessor outputs the memory address on the address bus,
outputs the data to be written into memory on the data bus, and issues a write ( ) to memory and IO/= 0
for the 8088 and = 1 for the 8086.

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■If  data are read from the memory the microprocessor
■ outputs the memory address on the address bus,
■ issues a read memory signal ( ),
■ and accepts the data via the data bus.

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Timing in General

■ The 8086/8088 microprocessors use the memory and I/O in

periods called bus cycles.
■ Each bus cycle equals four system-clocking periods (T states).
■ Newer microprocessors divide the bus cycle into as few as two
clocking periods.
■ If the clock is operated at 5 MHz one 8086/8088 bus cycle is
complete in 800 ns.

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THANK YOU

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