Chapter 4

Oxidation

Girija 1
Use of Silicon Oxide & Comments
1. Component in devices (Gate, Insulation etc)
2. Device isolation
3. Mask
4. Pad oxide
5. Topography smoothness
6. Passivation
7. Easily patterned Pad oxide
8. It can be grown or deposited
9. Interface of the silicon and oxide is stable, reproducible and less stress

Diffusion
mask

Girija 2
 Basic requirement of Oxide properties/qualities

1. Higher density (lower etch rate)

2. Higher breakdown

3. Good composition

4. Good step coverage All are process Dependent

5. Less pin holes

6. Less stress at interface

Girija 3
 Silicon dioxide

2.27 Ǻ
1.60 Ǻ
Si
o
o o

• It is also called fused silica

• Changes its structural form below ~ 1700 0 C
• Triangular polyhedron
• Silicon to oxygen inter-nuclear is1.6 Å
• Oxygen to oxygen is 2.27 Å
• Silicon atoms resides in the center of polyhedron
Girija 4
 Structure of Silicon dioxide
O2 atoms are bonded
Bridging oxygen Bridging oxygen atoms to 2 Si atoms of two
deferent polyhedron.
Silicon atoms
Dry oxidation (Most
Hydroxyl group cohesive and less
damage prone)
When, the oxygen atoms of a polyhedron are bonded with the
two silicon atoms of different neighboring polyhedrons, the
silicon dioxide is called “bridge oxide”.
Nonbridging oxygen
Oxygen atom
Non bridging oxygen

Silicon atom
Network modifier

If the oxygen atoms are bonded with one silicon atom of the neighboring polyhedron, then
Girija oxide”
the silicon dioxide network is called “nonbridged 5
Structure of Silicon dioxide
Hydroxyl group
Oxygen atoms

Silicon atoms

Hydroxyl group
Bridging oxygen

Oxygen – silicon bond to hydroxyl (OH). Non bridging oxygen

This weakens the oxide bond and makes porous.
Silicon

Network modifier Oxygen atoms are bonded to one silicon

atom called unabridged oxide sites (Wet
Oxygen oxidation)
Silicon

Network former

Interstitial impurities in the oxide is called network modifier (e.g.. Na 2 O)

Girija 6
RCA silicon wafer cleaning procedure (A derivative)
 

1. Removal of grease and oil

Ultrasonic in isopropyl alcohol 5 min.
Repeated second time and Rinsed in DI, 6-8 times
 2. Remove native oxide
Dipped in HF (hydro fluoric acid) 30 sec.
Rinse din DI, 6-8 times
3. Removal of heavy metals:
Dipped in H2SO4+H2O2 (1:1) mixture 15 min.
Rinsed in DI, 6-8 times
4. Removal of cations and complex metals
Dipped in HCl+H2O2+ H2O (1:1:5) 15 min
Rinsed in DI, 6-8 times
5. Removal of heavy metals:
Dipped in HF(hydro fluoric acid): 30 sec.
Rinsed in DI, 6-8 times
 6. Grow native oxide:
Dipped in H2SO4+H2O2 (1:1) mixture: 15 min.
Rinsed in DI, 6-8 times
 7. Repeated if needed: From 1to 6 steps
 8. Dry wafer Girija 7
Oxidation process and oxidation system
Mainly two types of oxidation processes are used in IC fabrication

Dry oxidation Si + O2 = SiO2

Wet oxidation Si + H2O = SiO2 + 2H2
Water vapour (Through Bubbler)
Pyrogenic (H2 gas + O2 gas)
Laminated & Filtered air

Pipes for water cooling

Heating elements
Quartz tubes

Valves
End cap
Wafers
Quartz boat
Bubbler with Boat supports Exhaust
N2 O2 Quartz tube
heater
supports
Gases
Girija 8
 Field oxidation process
Expected SiO2 thickness: 1 micron. Process: Dry – Wet – Dry Oxidation.
Equipment setting: Chilled water on.
Pass N2 lit/ min through furnace.
Set furnace temperature at 1150°C.
Set bubbler temperature at 95 °C.
Wafer loading: Load wafer in boat.
Keep boat at furnace mouth 3 min.
Keep boat in furnace centre for 12 min.
Close N2 gas.
Dry oxidation: Flow of O2, 1 lit/min for 10 min.
Wet oxidation: Flow of O2 through bubbler 1 lit/min for 100 min.
Dry oxidation: Flow of O2 – 1 lit/min for 10 min.
Wafer Annealing: Close O2 and flow N2 1 lit/min, keep wafer for 30 min.
Wafer loading: Withdraw boat from centre to mouth in 5 min.
Keep boat for 5min.
Take
Girija out boat from furnace. 9
 Gate oxidation process

Chlorine based oxidation to remove sodium ions etc

Gases can be used;
 HCl: Corrosive
TCE (Trichloroethylene); Less corrosive
TCA (Trichloroethane): Toxic and less corrosive

Na + HCl = 2NaCl + H2

One of these gases is added in small quantity while dry oxidation

Oxidation process is same as dry field oxidation process steps

Girija 10
Consumption of Si while oxidation
• Volume of 1 mol of Si = Molecular wt./ Density

= 28.09 g/mol / 2.33 g/cm3 = 12.06 cm3/ mol

• Volume of 1 mol of SiO2= Molecular wt. / Density

= 60.08 g/cm3 / 2.21 cm3 / mol = 27.18cm3/ mol

• 1 mol of Si is converted to 1 mol of SiO2 SiO2

0.54
= Vol. of 1 mol of Si / Vol. Of 1 mol of SiO2
Si surface
• For equal area of SiO2 and Si are same, then prior oxidation
Si wafer
= Thickness of Si / Thickness of SiO2 0.46

= 12.06 / 27.18 or = 0.44 (thickness of SiO2)

This means SiO2 of 1000 A0 consumes 44 0 A0 of Si

Therefore, silicon dioxide comes out of original silicon wafer surface

Girija 11
 Gas dox Oxide
Kinetics of oxidation
C*

Silicon
Deal and Grove model:
F1 Cs

• At high Temperature C0
Cg
– Si + O2 = SiO2
C i F3
– Si + H2O = SiO2 + 2H2
• Oxidant must transported from bulk gas or vapour at oxide/gas interface =F1
• Assumption: Oxidant to reach Si interface
• Oxidant must diffused across the oxide layer = F2
• Oxidant must reach at interface Si / SiO2 = F3
Wafer
End Cap
At steady state F 1 =F 2 = F 3
Considering the oxidant conc. at different regions: Water
Cg : Oxidant conc. of the gas in bulk vapor
Cs: Oxidant conc. at gas – Si interface or O2
C*: Oxidant conc. inside bulk oxide
Ci: Oxidant conc. at oxide – silicon interface quartz tube
Heating
Elements

Girija 12
• F1 = hg (Cg – Cs ) (1)
Where hg is gas phase mass transport coefficient

• Henry’s law: Oxidant conc. in solid α to Partial Pressure Pg at the bulk

oxidant
•  C* = H. Pg where H= Henry’s constant. (2)
• If we apply same law at interface, then
Co = H. Ps, where Ps = partial pressure at the surface (3)

• Ideal gas law:

Conc. of O2 at bulk = partial pressure / kT, hence,
Cg = Pg/ kT (at bulk oxidant) (4)
Cs = Ps/ kT (at oxidant – oxide interface) (5)
 
Now
F1= hg (Cg – Cs) = (hg /kTH) (C* - Co)= h (C* - Co) (6)
From eq. 1- 5
where, h = hg / kTH (gas phase mass transfer coeff. inGas
solid)
dox

Silicon
Oxide
Cs C*
F1 C0
Girija 13
F3
Cg Ci
• For F2 follows Fick’s law F2 = D ( C0 – Ci / dox) (7)
• Where, D is diffusion coeff. & dox is oxide thickness and
• F3 = Ks Ci
Where Ks is the rate constant of surface reaction at the Si

• At equilibrium
F1 = F3, hence h(C*- Co) = Ks.Ci (8)
C0 = C* - (Ks Ci / h) (9)

If h (where h= hg / kTH is very high) then

*
Ci  C
1   k s h    k s d ox D 
(10)

C0  C*
1  K s d ox D 
1   k s h    k s d ox D (11)

Girija 14
Limiting cases
Case 1: If D is very small, Called diffusion controlled case.
Then, Ci → 0 and Co → C*
This means the oxidation rate depends upon the flux of oxidant (O2) which
reaches at Si / SiO2

* C0 
1  K s d ox D  C*
Ci  C 1   k s h    k s d ox D
1   k s h    k s d ox D 

dox

No depletion of
Cg C* oxidant in the oxide,
silicon C* is constant.

gas

oxide
Girija 15
Case 2: If D is very large, Called reaction controlled case.

Ci  C
*
C0 
1  K s d ox D  C*
1   k s h    k s d ox D  1   k s h    k s d ox D
C*
Ci = C0 = ---------------------------- (12)
1 + (Ks / h)+ Ksdox/D
This is because C* is unlimited. That means oxidation rate depends on reaction rate
constant Ks.

dox
Cg Depletion of oxidant in
the oxide, C* is not
C* constant.
gas silicon

oxide

Girija 16
Oxide growth rate:
 N1 = no. of oxidant molecules incorporated into unit volume of oxide layer
SiO2 is 2.2 x 1022 molecules / cm3
Hence, O2 needs, N1 = 2.2 x 1022 molecules / cm3
whereas,
H2O needs N1 = 2(2.2 x 1022 ) molecules / cm3 

Hence oxide growth rate –

d.dox F3 Ks C*
--------- = -------- = ----------------------------------- (13)
dt N1 N1 [ 1+ (Ks / h) + (Ks dox / D)]

Let us take dox is already present over silicon, then

N1∫di d0[ 1+ (Ks / h) + (Ks dox / D)]dx.

Let us take dox = di , at t = 0, then we get  

dox 2 + A dox = B (t1 + τ)1called
 mixed
*
2DClinear d i2  Adrelationship
parabolic
i B C* C*k s
A  2D  Ks  ,B  ,  ,  
Where  h  N1 B A N1 1  1  N1
 ks h
Girija
17
 d ox ( t  )
1st case  1 1
A A 2
when t >> A2/ 4B and t >> τ  from eq. (14), then 2 4B
(dox)2 = Bt
Then oxidation follows parabolic law and B is parabolic rate constant
B
2nd case (t + τ ) << A2/ 4B, then d ox  ( t  )
A
B/A is called linear rate constants and it is reaction control depends on Ks.

102 dox= B(t + τ) / A

dox2= B(t + τ)
dox/ A2

dox2 + A do= B(t + τ)

10

0.1 1 10 102 103 104

(t + τ)/ (A2/ 4B)
1

10-1 Girija 18
 1.0
2.0
0.9
1.8
0.8 1200⁰C
Oxide thickness (μ)

1.6

Oxide thickness (μ)

0.7 1.4
0.6 1.2 1100⁰C
0.5 1200⁰
C 1.0
0.4 1100⁰ 0.8
C 1000⁰C
0.3 1000⁰ 0.6
0.2 0.4
C 900⁰C
0.1 900⁰C
0.2
800⁰C 800⁰C
0 0
1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10
Time (hours) Time (hours)
Typical rate dry oxidation for (100) silicon Typical rate wet oxidation for (100) silicon
based on Deal- Groove model based on Deal- Groove model

Girija 19
Comments on Deal and Grove’s Model
1. Fits well temperature between 700 º C to 1300 º C
2. Fits well pressure range between 0.2 to 1 atm.
3. Fits well from 300 Å to 20000 Å thickness.
4. Explains crystal orientation dependent oxidation.
5. Activation energy (Ea) almost matches for dry and wet oxidation. Ea for dry oxidation
is 1.24 eV, compare to O2 diffusion to silica is 1.18 eV and wet oxidation is 0.71 eV
compare to H2O diffusion in silica is 0.79 eV

6. Well matches with Si –Si bond breaking ~ 1.83 eV / molecule

7. Model confirms with experimentally found that B/A is exponential function of Ea.

8. Constant B is temperature dependant, as

B = 2DC* / N1, Where, D = D0 exp(-Ea / kT),

9. Experimental values matches with C* for H2O = 3 x 1019 and O2 = 5 x 1016 cm3

Note: The assumption of Henry law is valid for molecular diffusion in silicon
dioxide (solid) layer. Girija 20
 Failure of Deal and Grove’s Model with
experiments

1 Initial phase of oxidation:

(Initial phase does not fit with the model. Initial growth rate is very fast to
predicted model, dry di= 200 Å and for wet di = 0 can be taken.)

2. High pressure: oxidation

3. Mixed ambient (HCl+ O2, etc.)

4. Shaped surface (2D or 3D surfaces).

5. Doped silicon dependent oxidation rate.

6 Oxidation dependent dopant diffusion

Girija 21
 Segregation

Redistribution in Si/SiO2 interface is called “Segregation Coefficient” and denoted by

k or m.

Equilibrium concentration of dopant in Si

K= -----------------------------------------------------------------------------

Equilibrium concentration of dopant in SiO2

Girija 22
 Oxide charges (Charge/ cm2)

1. Interface Traps or Interface Charge (Qit) / Surface State (Nss) / Fast

Surface State (NFS or NST)

• Reason: Disruption of lattice periodicity and composition (Si & SiO2 at

interface)
• Location: Very close to Interface SiO2
• Charges: Positive, Negative or Neutral Si
• Orientation: Si crystal orientation dependent

• Creates energy states that trap electrons or holes and these Traps are mostly
near Ev or Ec edges in the forbidden gap.

Remedy:
After annealing in N2 or H2 at ~ 450 0C charges are reduced.
For (111) ~ 10 11 /cm2 and (100) ~ 10 10 /cm2

Girija 23
 2. Fixed charge (Qf)
Reasons: Incomplete oxidation results dangling bonds and incomplete
Si - Si or Si-O2 bonds.
Location ~ 30 Å above interface. SiO2
Remedy: After annealing (111) ~ 5 × 10 /cm
10 2 +++
Si
Orientation: Orientation dependent
Charges: Always positive.

3. Oxide trapped charges (Qot)

Reasons: High energetic bombardment particles
Orientation: Orientation independent SiO2 +++
Location: Inside the oxide
Charges: Always positive Si
Remedy: Reduction or almost charges reduces after annealing in N2 or H2 at 450
ºC.
4. Mobile ionic charges (Qm)
Location: All over the oxide and proportional to oxide thickeners
Reason: Na or other alkaline ions.
Orientation: Orientation independent SiO2 Na+
Remedy: Including Chlorine while oxidation.
Charges: Always positive Si
Girija 24
 • Thickness
• Uniformity
• Dielectric constant
Oxide Measurements
• Refractive index
• Dielectric strength
• Density defects

Oxide Thickness Measurement techniques

A. Physical (mechanical) measurement (mostly destructive)
B. Optical measurements (a few of them are destructive)
C. Electrical measurements (mostly non destructive)

Girija 25
A. Physical measurements
1. Electron Microscopes (SEM and TEM etc.)
• TEM requires sample preparation
• Not suitable on a manufacturing line

2.    Stylus type:

– Stylus moves on the topology
– Resolution increased by mechanical or electrical amplification
– Resolution up to 10 nm
– Atomic Force Microscope (AFM) and other derivative instruments (resolution up to
atomic size)

Stylus vertical SiO2

movement Si
SiO2 thickness

Distance

Girija 26
B. Optical Measurements
A. Interference Method

φ n
x0 n1
Substrate n2

2n1xocosβ Sin-1 [n0 sinθ]

λ = --------------- β = -------------------
m n1
where m = 1,2,3..for maxima and m= 1/2, 3/2, 5/2..for minima

Girija 27
B- Ellipsometer method
• Elliptical polarized light falls on the dielectric film, reflected light comes
out as a linear polarized light.
• Angle of linear polarization depends on thickness of the film and
refractive index
• Resolution up to 1 nm in the film thickness
• Refractive can be measured very accurately
• Unfortunately measurement parameters and calculations are complicated.,
hence it is done by computer.
Sample
Iri
An

s
aly

θ
ze
r

Iri
Iri
De

s
te
ct o
r

r
pla λ/4

ize
te
2 nd

lar
Po

pla λ/4

r
as e
te
1 st

eL
-N
He
Girija 28
MOS capacitor fabrication techniques
The MOS structure is realized by depositing the circular metal dots of around
1mm diameter (or small) on the gate oxide grown onto the wafer
1.Shadow metal deposition technique I
A circular perforated hole of ~1mm metal sheet is kept over the gate
oxidized wafer and then metal is deposited through the holes on the wafer. I
2. Lithography technique
Gate oxidized wafer is metalized and then circular dots are made by
the lithography and metal etching techniques.
Lithography technique process steps

Silicon wafer Lithography

Oxidation Metal etching

Metal deposition Back side metal deposition

Si SiO2 Metal PR

Girija 29
Electrical Measurement

C-V measurement technique

AC signal of 1 MHz around 50 mV is superimposed on the variable DC voltage and
fed to one of the metal dots. When, the back side of the wafer is connected to the
ground, a MOS capacitor is formed across the gate oxide.

Case 1. No AC signal is applied (N-type)

In this case if positive DC gate voltage free electrons will be attracted towards the
gate oxide to compensate the gate electric field under the gate and an
accumulation take place called “accumulation capacitor” i.e. Co .
If the positive DC gate voltage is varying with slow sweep rate towards the
negative voltage, then accumulation will diminish and depletion layer will start
forming
 Further voltage increasing and the depletion layer will keep on increasing with the
gate voltage till the depletion capacitance “Cs” is peg to fixed depletion width and a
minimum capacitance will be “(Co+ Cs)Min”. This condition is called “threshold
voltage” .
Beyond this gate voltage, an inversion stage will reach. At this condition, the gate
voltage is balanced by the inversion layer. Hence, the MOS capacitance will come
back to original accumulation capacitance Co.
Girija 30
To measure four types of charges are present in the oxide and the oxide/silicon
interface two C-V measurement techniques are used
1.high frequency C-V
An AC signal is superimposed on the DC in the range of 100 Hz to 1 MHz.
2. low frequency C-V
A low AC frequency in between 10 Hz to 100 Hz is added on the DC
voltage.
No oxide charges present (Ideal condition)
Output Gate Voltage (VG) Co
Depletion
X-
axis Accumulation Cs
DC
Capacitance Co
bias o Inversion
meter
[±] Capacitance (C)
Input C Cs, min
Al o

SiO2 - +
 Si (p-type) 
Al V 0 Y-axis V
Metal shield

Girija 31
CV technique 1. High frequency measurements (100 Hz to 1 MHz)
2. Low frequency measurements (10 Hz to 100 Hz )
MOS Capacitor structure for oxide charge measurements
Typical CV setup and C-V plot for oxide charges measurement

No oxide charges present (Ideal condition)

Output Gate Voltage (VG) Co
Depletion
X-
axis Accumulation Cs
DC
Capacitance Co
bias o Inversion
meter
[±] Capacitance (C)
Input C Cs, min
Al o

SiO2 - +
 Si (p-type) 
Al V 0 Y-axis V
Metal shield

Girija 32
Case 2. In presence of oxide charges

• Lateral shift of CV curve due to Qf and φms, called flat band VFB (voltage is
required to bring band to be flat)
• If Qm and Qot trapped charges are similar effect as Qf (lateral shift)
• Shift depends on the charge magnitude & position.
• Mostly charges are in forbidden gap.
• This leads to move Fermi level from EC to EV depending upon the position and
magnitude of Qit
• Highly slop of CV curve at Cmax lower one, show the position of Qit at near Ec,
middle and near EV. C
A Cox
P-type silicon in
presence of oxide Ideal HF
charges B
C
HF +q Qf /Cox+ Φ MS
C min
V
0
DC Gate voltage

Girija 33
Mobile charges
CV HF Bias Temperature Stress Measurement for mobile charges

C
CV at room temperature
Shift due to
Apply Bias DC Mobile
Heat MOS up to 200 º C Charges
depend on Ideal C-V
Mobile Na+ and K+ move toward numbers of
interface due to field mobile
charges
Take another CV
Change in lateral shift shows
+V
the charge of Na+ and K+ DC Gate voltage 0
P-type substrate

Girija 34
 Low CV Measurement Curve

Ideal LF Cox

Ideal HF

Deep depletion

Vth 0

Vth DC Gate voltage

Girija 35
Typical low frequency C-V of N-type silicon

Capacitance

Accumulation

Inversion
Depletion

VG

0 VT

Girija 36
 Typical Colour Chart of SiO2 and Si3N4

Colour Silicon dioxide (Å) Silicon Nitride (Å)

Silver 270 200
Brown 530 400
Yellow-brown 730 550
Deep blue 1000 770
Blue 1200 930
Very pale blue 1500 1100
Yellow 2000 1500
Red 2500 1900
Blue 3100 2300
Orange-yellow 4000 3000
Red 4400 3300
Girija 37
Other silicon oxidation techniques
1.Anodization and
2.Plasma techniques.
Details of silicon oxidation by plasma technique are discussed in chapter 11.
Anodization technique
Oxide has a number of pin holes, bad oxide/silicon interface, less dense, no batch
process and it is not IC compatible process.
Anodic oxidation is room temperature and oxidation rate is crystal orientation
independent as well as doped wafer in the range from1015 to 1022 atoms/ cm2
In the electrolyte process, an electrochemical potential is developed and establish the
equilibrium of charges as electrons come out from the silicon surface leaving the holes
on the silicon surface.
Si = 2h + 2H2O = SiO2 + 2H+ + H2
Other electrolytic solutions are:
0.1 MH3BO3 + Na2B4O7 +H2O DC V

H3PO4 + H2O
N-methylacetamide (NMA) + KNO3
Ethylene Glycol + KNO3 + H2O
Tectrahydrofuryl Alcohol (THFA) + NH4NO3.

.
Girija 38
Silicon oxidation by plasma oxidation technique.
Silicon can be oxidized in electrical discharge technique (see chapter 11)

The silicon wafers are kept on cathode and high DC or RF voltage is applied
between the electrodes in oxygen gas at low pressure.
Oxygen species are formed and react with the silicon atoms and oxide is form.
Most probably the oxygen species go inside the silicon dioxide film or the silicon
atoms move at the oxide/silicon interface and then react with the oxygen species.

It has advantages of low temperature deposition and it is clean oxidation process.

A thick oxide as well as good quality of oxide can be obtained, but it suffers from
non-uniformity of oxide thickness across the wafer.

Wafer jig
Wafers
Plasma
Target

Power
Oxygen Gas Vacuum

Girija 39