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Path Base Analysis: BY Mahesh.I Hawkeye Team
Path Base Analysis: BY Mahesh.I Hawkeye Team
BY
MAHESH.I
HAWKEYE TEAM
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Static timing analysis
The static time analysis has two types of methodologies they are
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SLEW
Slew is the transition time for signal. Transition time for input signal is called
input slew and for output signal it is called output slew
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TIMING ARC
● A timing arc defines the propagation of signals through logic gates/nets and
defines a timing relationship between two related pins
● Static timing analysis works on the concept of timing paths. Each path starts
from either primary input or a register and ends at a primary output or a register
● In-between, the path traverses through what are known as timing arcs
FOR EXAMPLE:
● IN Combinational cells like AND, NAND, NOT, full adder cell etc. gates have arcs
from each input pin to each output pin
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● sequential cells such as flops and latches have arcs from clock pin to output
pins and data pins
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TWO TYPES OF TIMING ARC
1. positive unate if a rising transition on an input causes the output to rise and a
falling transition on an input causes the output to fall
For example, the timing arcs for AND and OR type cells are
positive unate
For example, the timing arcs for nand and nor type cells are
negative unate
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MIN DELAY =0.5ns , MAX DELAY =1.5ns
MIN DELAY =0.2ns , MAX DELAY =1.2ns
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THANKYOU
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