UNIT III

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Introduction

A Basic MIPS Implementation

• We're ready to look at an implementation of the MIPS
• Simplified to contain only:
– memory-reference instructions: lw, sw
– arithmetic-logical instructions: add, sub, and, or, slt
– control flow instructions: beq, j
• Generic Implementation:
– use the program counter (PC) to supply instruction address
– get the instruction from memory
– read registers
– use the instruction to decide exactly what to do
• All instructions use the ALU after reading the registers
Why? memory-reference? arithmetic? control
flow?
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An Overview of the Implementation

• For most instructions: fetch instruction, fetch operands, execute,

store.

• Missing Multiplexers, and some Control lines for read and write.

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An Overview of the Implementation

• The program counter gives the instruction address to the instruction

memory.
• After the instruction is fetched ,the register operands required by an
instruction are specified by fields of that instruction.
• Once the register operands have been fetched, they can be used to
compute a memory address( for a load and store), to compute an
arithmetic result( for an integer arithmetic-logical instruction) or a
compare(for a branch).
• If the instruction is an arithmetic-logical instruction, the result from the
ALU must be written to a register.
• If the operation is a load or store, the ALU result is used as an address to
either store a value from memory into the registers. The result from the
ALU or memory is written back into the register file.
• Branches require the use of the ALU output to determine the next
instruction address which comes either from the ALU( where the PC and
branch offset are summed) or from an adder that increments the
PC by 4.
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• The basic implementation of the MIPS subset including the necessary

multiplexers and control lines.

• Multiplexer (data selector) selects from among several inputs based on

the setting of its control lines. The control lines are set based on
information taken from the instruction being executed. 5
 Building a Datapath

• Datapath
– Elements that process data and addresses within the CPU
• Register file, ALUs, Adders, Instruction and Data
Memories, …
We need functional units (datapath elements) for:
1. Fetching instructions and incrementing the PC.
2. Execute arithmetic-logical instructions: add, sub, and, or, and slt
3. Execute memory-reference instructions: lw, sw
4. Execute branch/jump instructions: beq, j

1. Fetching instructions and increment ing the PC.

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2. Execute arithmetic-logical instructions: add, sub, and, or, and slt

The arithmetic logic instructions read operands from two
registers, perform an ALU operation on the contents of
the registers and write the result to the
this instructions as R-type instructions. register. So

add $t1, $t2, $t3 # t1 = t2 + t3

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3. Execute memory-reference instructions: lw,

sw lw $t1, offset_value($t2)
sw $t1, offset_value($t2)

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4. Execute branch/jump instructions: beq, j

beq $t1, $t2, offset

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Creating a Single Datapath

• Sharing datapath elements between two different instruction classes ,

we have connected multiple connections to the input of an element and
used a multiplexer and control signals to select among the multiple
inputs.

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Now we con combine all the pieces to make a simple datapath

for the MIPS architecture:

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 A Simple Control Implementation
Scheme
The ALU Control

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Designing the Main Control Unit

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 Exceptions

• Exceptions
• Interrupts

Type of event From where? MIPS terminology

I/O device request External Interrupt
Invoke the operating system from user
Internal Exception
program
Arithmetic overflow Internal Exception
Using an undefined instruction
Hardware malfunction Internal Exception
Either Exception
or
interrupt

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How Exception Are Handled

To communicate the reason for an exception:

1. a status register ( called the Cause register)
2. vectored interrupts

Exception type Exception vector address (in hex)

Undefined instruction C000 0000hex
Arithmetic overflow C000 0020hex

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How Control Checks for Exception

Assume two possible exceptions:

 Undefined instruction
 Arithmetic overflow

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Continue

The multicycle datapath with the addition needed to implement exceptions

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Continue

The finite state machine with the additions to handle exception detection
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