Registers: PWM in LPC2148 ARM7 

PWM Timer Control Register– PWMTCR is

used to control the timer counter functions.
PWMTCR The Timer Counter can be disable or reset
through the PWMTCR.

PWM Prescale Register– The PWMTC (PWM

PWMPR Timer Counter) is incremented every
PWMPR+1 cycles of PCLK.
Registers: PWM in LPC2148 ARM7 

PWM Match Register 0- PWM Match Register

6– PWMMR0-6 can be enabled through
PWMMCR to reset the PWMTC, stop both the
PWMTC and PWMPC, and/or generate an
PWMMR0-PWMMR6 interrupt when it matches the PWMTC. In
addition, a match between PWMMR0-
PWMMR6 and the PWMTC sets all PWM
outputs that are single edge mode and sets
PWM1 if it is in double-edge mode.
Registers: PWM in LPC2148 ARM7 

PWMMCR PWM Match Control Register– The PWMMCR is used to control if an

interrupt is generated and if the PWMTC is reset when match occurs.

PWM Interrupt Register– The PWMIR can be written to clear

PWMIR interrupt. The PWMIR can be read to identify which of the possible
interrupt sources are pending.

PWMLER PWM Latch Enable Register– Enables use of new PWM Match values

PWMPCR PWM Control Register– Enables PWM outputs and selects PWM
channel types as either single edge or double edge controlled.
Steps necessary to setup PWM in LPC2148 ARM7 an output
a single value:

• Setup the Pin Select Register to select PWM for the port we want
• Setup the Clock Divider Register for the PCLK (VPBDIV)
• Setup the PWM Timer Prescale Register
• Setup the IO direction for the PWM pin you plan to use as output
• Enable the particular PWM channel you want to use in the PWM Control Register(PWMCR)
• Set the maximum number of counts in one cycle. This is done in Match Register 0 (PWMMR0)
• Set the value for duty cycle in the particular match register you want to use (PWMMRx where
“x” is from 1 to 6)
• Setup the PWM Match Control Register to cause a counter reset when the match register occurs
(PWMMCR)
• Set the PWM latch Enable Register to enable the use of match value (PWMLER)
• Reset the timer counter using a bit in the PWM Timer Control Register (PWMTCR)
• Enable the timer counter and enable the PWM mode using the PWM timer control register
(PWMTCR).
PWM output

OUTPUT PWM1 PWM2 PWM3 PWM4 PWM5 PWM6

PIN NAME P0.0 P0.7 P0.1 P0.8 P0.21 P0.9
EXAMPLE

• In this example we have to control the brightness of LED connected at

Pin P0.8 of LPC2148. We will be using period of 10ms. We also have
to connect Four Switches at Pin P1.16, P1.17, P1.18, and P1.19 which
controls the pulse width and so when we press any switch among
these. We will get equivalent brightness.
Circuit Setup: PWM in LPC2148 ARM7
PWM Register
.  PWMTCR (PWM Timer Control Register) 
It is an 8-bit register.
It is used to control the operation of the PWM Timer Counter
PWMTCR (PWM Timer Control
Register) 
• Bit 0 – Counter Enable
When 1, PWM Timer Counter and Prescale Counter are enabled.
When 0, the counters are disabled.
• Bit 1 – Counter Reset
When 1, the PWM Timer Counter and PWM Prescale Counter are synchronously reset on next
positive edge of PCLK.
Counter remains reset until this bit is returned to 0.
• Bit 3 – PWM Enable
This bit always needs to be 1 for PWM operation. Otherwise PWM will operate as a normal
timer.
When 1, PWM mode is enabled and the shadow registers operate along with match registers.
A write to a match register will have no effect as long as corresponding bit in PWMLER is not set.
Note : PWMMR0 must always be set before PWM is enabled, otherwise match event will not
occur to cause shadow register contents to become effective.
PWM Register
.  PWMIR (PWM Interrupt Register) 
•It is a 16-bit register.

•It has 7 interrupt bits corresponding to the 7 PWM match registers.

•If an interrupt is generated, then the corresponding bit in this register
becomes HIGH.
•Otherwise the bit will be LOW.
•Writing a 1 to a bit in this register clears that interrupt.
•Writing a 0 has no effect
PWM Register

•  PWMTC (PWM Timer Counter) 

• It is a 32-bit register.
• It is incremented when the PWM Prescale Counter (PWMPC) reaches its terminal
count.       
• 
 PWMPR (PWM Prescale Register) 
• It is a 32-bit register.
• It holds the maximum value of the Prescale Counter.
• 
PWMMCR (PWM Match Control
Register)
PWMLER (PWM Latch Enable Register) 

•t is used to control the update of the PWM Match Registers when they
are used for PWM generation.
•When a value is written to a PWM Match Register while the timer is in
PWM mode, the value is held in the shadow register. The contents of
the shadow register are transferred to the PWM Match Register when
the timer resets (PWM Match 0 event occurs) and if the corresponding
bit in PWMLER is set.
Web Link
https://binaryupdates.com/pwm-in-lpc2148-arm7/

https://www.electronicwings.com/arm7/lpc2148-
pwm#:~:text=LPC2148%20has%207%20PWM%20match,in%20Double
%20Edge%20Controlled%20PWM.