8086 Segmentation and Addressing Modes

Addressing mode Mnemonic Segment for Symbolic representation
memory
access
IMMEDIATE
memory
access
IMMEDIATE MOV AX,1000
memory
access
IMMEDIATE MOV AX,1000 CODE
memory
access
IMMEDIATE MOV AX,1000 CODE AH<=10, AL<=00
memory
access
REGISTER
memory
access
REGISTER MOV DX,CX

memory
access
REGISTER MOV DX,CX WITHIN THE

CPU
memory
access
REGISTER MOV DX,CX WITHIN THE DX<=CX

CPU
memory
access

CPU
DIRECT
memory
access

CPU
DIRECT MOV AL,[2000]

memory
access

CPU
DIRECT MOV AL,[2000] DATA

memory
access

CPU
DIRECT MOV AL,[2000] DATA AL<=[2000]

memory
access

CPU
REGISTER
INDIRECT
memory
access

CPU
REGISTER MOV AX,[SI]

INDIRECT
JMP [DI]
INC BYTEPTR[BP]
DEC WORDPTR[BX]
memory
access

CPU
REGISTER MOV AX,[SI] DATA

INDIRECT
JMP [DI] DATA
INC BYTEPTR[BP] STACK
DEC WORDPTR[BX] DATA

memory
access

CPU
REGISTER MOV AX,[SI] DATA AL<=[SI]

INDIRECT AH<=[SI+1]
JMP [DI] DATA

memory
access

CPU

INDIRECT AH<=[SI+1]
JMP [DI] DATA IP <={[DI+1] [DI]}

memory
access

CPU

INDIRECT AH<=[SI+1]
INC BYTEPTR[BP] STACK [BP]<=[BP]+1

memory
access

CPU

INDIRECT AH<=[SI+1]
INC BYTEPTR[BP] STACK [BP]<=[BP]+1
DEC WORDPTR[BX] DATA {[BX+1][BX]}<={[BX+1][BX]} –

1
memory
access
RELATIVE MOV AX,[SI+6]

INDEXED
(RELATIVE
REGISTER
INDIRECT) JMP [DI+6]
RELATIVE MOV AX,[BP+2]

BASED
(RELATIVE
REGISTER
INDIRECT) JMP [BX+2]
memory
access
RELATIVE MOV AX,[SI+6] DATA

INDEXED
(RELATIVE
REGISTER
INDIRECT) JMP [DI+6] DATA
RELATIVE MOV AX,[BP+2] STACK

BASED
(RELATIVE
REGISTER
INDIRECT) JMP [BX+2] DATA
memory
access
RELATIVE MOV AX,[SI+6] DATA AL<=[SI+6], AH<=[SI+7]

INDEXED
(RELATIVE
REGISTER
INDIRECT) JMP [DI+6] DATA

BASED
(RELATIVE
REGISTER
memory
access

INDEXED
(RELATIVE
REGISTER
INDIRECT) JMP [DI+6] DATA IP <={[DI+7] [DI+6]}

BASED
(RELATIVE
REGISTER
memory
access

INDEXED
(RELATIVE
REGISTER
RELATIVE MOV AX,[BP+2] STACK AL<=[BP+2], AH<=[BP+3]

BASED
(RELATIVE
REGISTER
memory
access

INDEXED
(RELATIVE
REGISTER
RELATIVE MOV AX,[BP+2] STACK AL<=[BP+2], AH<=[BP+3]

BASED
(RELATIVE
REGISTER
INDIRECT) JMP [BX+2] DATA IP <={[BP+3] [BP+2]}
memory
access
BASED AND MOV AX,[BX+SI]
INDEXED
JMP [BX+DI]
INC BYTEPTR[BP+SI]
DEC
WORDPTR[BP+DI]
memory
access
BASED AND MOV AX,[BX+SI] DATA
INDEXED
JMP [BX+DI] DATA
INC BYTEPTR[BP+SI] STACK
DEC STACK
WORDPTR[BP+DI]
memory
access
BASED AND MOV AX,[BX+SI] DATA AL<=[BX+SI], AH<=[BX+SI+1]
INDEXED
JMP [BX+DI] DATA
DEC STACK
WORDPTR[BP+DI]
memory
access
INDEXED
JMP [BX+DI] DATA IP <={[BX+DI+1] [BX+DI]}
DEC STACK
WORDPTR[BP+DI]
memory
access
INDEXED
INC BYTEPTR[BP+SI] STACK [BP+SI]<=[BP+SI]+1
DEC STACK
WORDPTR[BP+DI]
memory
access
INDEXED
INC BYTEPTR[BP+SI] STACK [BP+SI]<=[BP+SI]+1
DEC STACK {[BP+DI+1][BP+DI]}

WORDPTR[BP+DI] <={[BP+DI+1][BP+DI]} - 1
memory
access
BASED AND MOV AX,[BX+SI+5]
INDEXED WITH
DISPLACEMENT
(RELATIVE BASED JMP [BX+DI+5]
AND INDEXED]
INC
BYTEPTR[BP+SI+5]
DEC
WORDPTR[BP+DI+5]
memory
access
BASED AND MOV AX,[BX+SI+5] DATA
INDEXED WITH
DISPLACEMENT
(RELATIVE BASED JMP [BX+DI+5] DATA
AND INDEXED]
INC STACK
BYTEPTR[BP+SI+5]
DEC STACK
WORDPTR[BP+DI+5]
memory
access
BASED AND MOV AX,[BX+SI+5] DATA AL<=[BX+SI+5], AH<=[BX+SI+6]
INDEXED WITH
DISPLACEMENT
(RELATIVE BASED JMP [BX+DI+5] DATA
AND INDEXED]
INC STACK
BYTEPTR[BP+SI+5]
DEC STACK
WORDPTR[BP+DI+5]
memory
access
INDEXED WITH
DISPLACEMENT
(RELATIVE BASED JMP [BX+DI+5] DATA IP <={[BX+DI+6] [BX+DI+5]}
AND INDEXED]
INC STACK
BYTEPTR[BP+SI+5]
DEC STACK
WORDPTR[BP+DI+5]
memory
access
INDEXED WITH
DISPLACEMENT
AND INDEXED]
INC STACK [BP+SI+5]<=[BP+SI+5]+1
BYTEPTR[BP+SI+5]
DEC STACK
WORDPTR[BP+DI+5]
memory
access
INDEXED WITH
DISPLACEMENT
AND INDEXED]
INC STACK [BP+SI+5]<=[BP+SI+5]+1
BYTEPTR[BP+SI+5]
DEC STACK {[BP+DI+6][BP+DI+5]}

WORDPTR[BP+DI+5] <={[BP+DI+6][BP+DI+5]} - 1
memory
access
STRING MOVSB
IMPLICIT CLD
memory
access
STRING MOVSB EXTRA, DATA
IMPLICIT CLD WITHIN THE

CPU
memory
access
STRING MOVSB EXTRA, DATA ES:[DI]<=DS:[SI]
IF DF=0, INCREMENT SI AND DI
BY 1
IF DF =1, DECREMENT SI AND
DI BY 1
IMPLICIT CLD WITHIN THE DF = 0
CPU
IDENTIFY THE ADDRESSING MODE
MOV AH,47
MOV AH,[BP+2]
MOV AL,[BP+SI]
STD
MOV AH,BL
MOV DX,[2002]
Problem statement – clear the
contents of three memory location
Memory content
location
62380 00
62381 00
62382 00
8086 Sample programs
MOV AX,6000H move 6000h into AX
MOV ES,AX move AX contents into ES
MOV DI,2380H move 2380H into DI
MOV CX,0003H move 0003H into CX
MOV AL,00H move 00H into AL
Again MOV [DI],AL AL => ES:[DI}
INC DI Increment the contents of DI
LOOP AGAIN dec CX, and if CX is NZ go to again
HLT Halt
8086 Sample programs
MOV AX,6000H move 6000h into AX
MOV ES,AX move AX contents into ES
MOV DI,2380H move 2380H into DI
CLD clear the direction flag
MOV CX,0003H move 0003H into CX
MOV AL,00H move 00H into AL
REP STOSB AL => ES:[DI]and increment DI
(rep this CX times)
HLT Halt
(CX=0003h) (AL = 00h)(DI=2380h)(ES=6000h)
• 1st time REP STOSB
AL =>ES:[DI] i.e. 00=> [62380]h and DI = 2381h
CX=0002h
• 2ND time REP STOSB
CX=0001h
• 3RD time REP STOSB
CX=0000h
• 4TH Time will not happen cos CX = 0000h
REP LOOP
PREFIX INSTRUCTION
USED ONLY BEFORE USED ANYWHERE
STRING INSTRUCTION
USED TO REPEAT ONLY USED TO REPEAT SERIES
THAT STRING OF INSTRUCTION
INSTRUCTION
String instructions
STOSB AL=>ES:[DI]
After string opr, if DF = 0, then DI is incremented by 1
and viceversa
LODSB AL<=DS:[SI]
After string opr, if DF = 0, then SI is incremented by 1
and viceversa
MOVSB DS:[SI]=>ES:[DI]
After string opr, if DF = 0, then SI and DI is incremented by 1
and viceversa
SCASB AL – ES:[DI]
After string opr, if DF = 0, then DI is incremented by 1
and viceversa
CMPSB DS:[SI] – ES:[DI]
After string opr, if DF = 0, then SI and DI is incremented by 1
and viceversa
Problem statement
block transfer
Transfer contents of 52500 to 62500 and 52501
to 62501
Block transfer
MOV AX,5000 H
MOV DS,AX
MOV SI,2500H
MOV AX,6000H
MOV DI,2500H
CLD
MOV CX,0002H
REP MOVSB DS:[SI] =>ES:[DI] and increment DI
and SI (rep this CX times)
HLT
(CX=0002h) (DS=5000h)(SI=2500h)(DI=2500h)
(ES=6000h)
• 1st time REP MOVSB

DS:[SI] =>ES:[DI] i.e. [52500]=>[62500]
SI =2501 and DI = 2501
CX=0001h
• 2ND time REP MOVSB
DS:[SI] =>ES:[DI] i.e. [52501]=>[62501]
SI =2502 and DI = 2502
CX=0000h
• 3rd Time will not happen cos CX = 0000h
8086 sample programs
When both the numbers are positive
(+03)h x (+02)h = (+06)h
MOV AL,03H
MOV BL,02H
IMUL BL
Result: (+0006)h => AX
When both the numbers are not positive
(+03)h x (-02)h = (-06)h
2’s complement of 02
= 1’s complement of 00000010 + 1
=11111110 = FEh
MOV AL,03H
MOV BL,FEH
IMUL BL
Result: (FFFA)h => AX
(FFFA)h is actually –(0006)h
(+09)h / (-02)h
MOV AX,0009H
MOV BL,FEH
IDIV BL
Result: (01FC)h => AX
01 =>AH is the remainder
FC =>AL is the quotient (-04)h
(-09)h / (+02)h
MOV AX,FFF7H
MOV BL,02H
IDIV BL
Result: (FFFC)h => AX
FF =>AH is the remainder (-01)h
FC =>AL is the quotient (-04)h
MOV AX,5000 H MEMORY CONTENT MEMORY CONTENT
SOURCE DEST
MOV DS,AX
52500 42 62500 98
MOV SI,2500H
MOV AX,6000H 52501 45 62501 34
MOV ES,AX
52502 34 62502 34
MOV DI,2500H
CLD 52503 23 62503 23
MOV CX,0004H
REPNE CMPSB DS:[SI] - ES:[DI] and increment DI
and SI (REPNE)
HLT
(CX=0004h) (DS=5000h)(SI=2500h)(DI=2500h)
(ES=6000h)
• 1st time REPNE CMPSB
DS:[SI] - ES:[DI] i.e. [52500]-[62500] i.e. 42-98(NE)
SI =2501 and DI = 2501
CX=0003h(this is cos of REP prefix)
• 2ND time REP CMPSB
DS:[SI] - ES:[DI] i.e. [52501]-[62501] i.e. 45-34(NE)
SI =2502 and DI = 2502
• 3rd Time REPNE CMPSB
DS:[SI] - ES:[DI] i.e. [52502]-[62502] i.e. 34-34(E)
SI =2503 and DI = 2503
• 4TH Time REPNE CMPSB will not happen cos locations are no
longer NE

8086 Segmentation and Addressing Modes

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8086 Segmentation and Addressing Modes

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Addressing mode Mnemonic Segment for Symbolic representation

REGISTER MOV DX,CX

REGISTER MOV DX,CX WITHIN THE

REGISTER MOV DX,CX WITHIN THE DX<=CX

REGISTER MOV DX,CX WITHIN THE DX<=CX

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000]

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000] DATA

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000] DATA AL<=[2000]

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000] DATA AL<=[2000]

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000] DATA AL<=[2000]

REGISTER MOV AX,[SI]

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000] DATA AL<=[2000]

REGISTER MOV AX,[SI] DATA

JMP [DI] DATA

INC BYTEPTR[BP] STACK

DEC WORDPTR[BX] DATA

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000] DATA AL<=[2000]

REGISTER MOV AX,[SI] DATA AL<=[SI]

JMP [DI] DATA

INC BYTEPTR[BP] STACK

DEC WORDPTR[BX] DATA

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000] DATA AL<=[2000]

REGISTER MOV AX,[SI] DATA AL<=[SI]

JMP [DI] DATA IP <={[DI+1] [DI]}

INC BYTEPTR[BP] STACK

DEC WORDPTR[BX] DATA

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000] DATA AL<=[2000]

REGISTER MOV AX,[SI] DATA AL<=[SI]

JMP [DI] DATA IP <={[DI+1] [DI]}

INC BYTEPTR[BP] STACK [BP]<=[BP]+1

DEC WORDPTR[BX] DATA

REGISTER MOV DX,CX WITHIN THE DX<=CX

DIRECT MOV AL,[2000] DATA AL<=[2000]

REGISTER MOV AX,[SI] DATA AL<=[SI]

JMP [DI] DATA IP <={[DI+1] [DI]}

INC BYTEPTR[BP] STACK [BP]<=[BP]+1

DEC WORDPTR[BX] DATA {[BX+1][BX]}<={[BX+1][BX]} –

RELATIVE MOV AX,[SI+6]

RELATIVE MOV AX,[BP+2]

RELATIVE MOV AX,[SI+6] DATA

RELATIVE MOV AX,[BP+2] STACK

RELATIVE MOV AX,[SI+6] DATA AL<=[SI+6], AH<=[SI+7]

RELATIVE MOV AX,[BP+2] STACK

RELATIVE MOV AX,[SI+6] DATA AL<=[SI+6], AH<=[SI+7]

RELATIVE MOV AX,[BP+2] STACK

RELATIVE MOV AX,[SI+6] DATA AL<=[SI+6], AH<=[SI+7]

RELATIVE MOV AX,[BP+2] STACK AL<=[BP+2], AH<=[BP+3]

RELATIVE MOV AX,[SI+6] DATA AL<=[SI+6], AH<=[SI+7]

RELATIVE MOV AX,[BP+2] STACK AL<=[BP+2], AH<=[BP+3]